[llvm] r320806 - Fix code causing fallthrough warnings in the PPC back end.

[Nemanja Ivanovic via llvm-commits]

Author: nemanjai
Date: Fri Dec 15 03:47:48 2017
New Revision: 320806

URL: http://llvm.org/viewvc/llvm-project?rev=320806&view=rev
Log:
Fix code causing fallthrough warnings in the PPC back end.

Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
    llvm/trunk/lib/Target/PowerPC/PPCMIPeephole.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=320806&r1=320805&r2=320806&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Fri Dec 15 03:47:48 2017
@@ -2224,6 +2224,7 @@ public:
       if (CmpInGPR == ICGPR_Sext || CmpInGPR == ICGPR_SextI32 ||
           CmpInGPR == ICGPR_SextI64)
         return nullptr;
+      LLVM_FALLTHROUGH;
     case ISD::SIGN_EXTEND:
       if (CmpInGPR == ICGPR_Zext || CmpInGPR == ICGPR_ZextI32 ||
           CmpInGPR == ICGPR_ZextI64)

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=320806&r1=320805&r2=320806&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Dec 15 03:47:48 2017
@@ -13045,6 +13045,7 @@ PPCTargetLowering::getRegForInlineAsmCon
         return std::make_pair(0U, &PPC::QSRCRegClass);
       if (Subtarget.hasAltivec())
         return std::make_pair(0U, &PPC::VRRCRegClass);
+      break;
     case 'y':   // crrc
       return std::make_pair(0U, &PPC::CRRCRegClass);
     }

Modified: llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp?rev=320806&r1=320805&r2=320806&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp Fri Dec 15 03:47:48 2017
@@ -2415,6 +2415,7 @@ bool PPCInstrInfo::convertToImmediateFor
       NewImm = Addend + SExtImm;
       break;
     }
+    return false;
   }
   case PPC::RLDICL:
   case PPC::RLDICLo:

Modified: llvm/trunk/lib/Target/PowerPC/PPCMIPeephole.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCMIPeephole.cpp?rev=320806&r1=320805&r2=320806&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCMIPeephole.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCMIPeephole.cpp Fri Dec 15 03:47:48 2017
@@ -774,7 +774,7 @@ bool PPCMIPeephole::simplifyCode(void) {
   // Eliminate all the TOC save instructions which are redundant.
   Simplified |= eliminateRedundantTOCSaves(TOCSaves);
   // We try to eliminate redundant compare instruction.
-  //Simplified |= eliminateRedundantCompare();
+  Simplified |= eliminateRedundantCompare();
 
   return Simplified;
 }
@@ -1025,6 +1025,9 @@ bool PPCMIPeephole::eliminateRedundantTO
 //   bge    0, .LBB0_4
 
 bool PPCMIPeephole::eliminateRedundantCompare(void) {
+  // FIXME: this transformation is causing miscompiles. Disabling it for now
+  // until we can resolve the issue.
+  return false;
   bool Simplified = false;
 
   for (MachineBasicBlock &MBB2 : *MF) {