[lld] r320802 - [ELF] Add missing test from r320800

[Peter Smith via llvm-commits]

Author: psmith
Date: Fri Dec 15 03:02:50 2017
New Revision: 320802

URL: http://llvm.org/viewvc/llvm-project?rev=320802&view=rev
Log:
[ELF] Add missing test from r320800

Forgot to svn add the additional test for the commit. Adding with this one.

Added:
    lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s

Added: lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s?rev=320802&view=auto
==============================================================================
--- lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s (added)
+++ lld/trunk/test/ELF/aarch64-cortex-a53-843419-large.s Fri Dec 15 03:02:50 2017
@@ -0,0 +1,115 @@
+// REQUIRES: aarch64
+// RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
+// RUN: ld.lld --fix-cortex-a53-843419 %t.o -o %t2
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=131072 -stop-address=131084 | FileCheck --check-prefix=CHECK1 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=135168 -stop-address=135172 | FileCheck --check-prefix=CHECK2 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=139256 -stop-address=139272 | FileCheck --check-prefix=CHECK3 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=67256312 -stop-address=67256328 | FileCheck --check-prefix=CHECK4 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=100810760 -stop-address=100810776 | FileCheck --check-prefix=CHECK5 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=134352908 -stop-address=134352912 | FileCheck --check-prefix=CHECK6 %s
+// RUN: llvm-objdump -triple=aarch64-linux-gnu -d %t2 -start-address=134356988 -stop-address=134357012 | FileCheck --check-prefix=CHECK7 %s
+// Test case for Cortex-A53 Erratum 843419 in an OutputSection exceeding
+// the maximum branch range. Both range extension thunks and patches are
+// required.
+
+// CHECK1:  __AArch64AbsLongThunk_need_thunk_after_patch:
+// CHECK1-NEXT:    20000:       50 00 00 58     ldr     x16, #8
+// CHECK1-NEXT:    20004:       00 02 1f d6     br      x16
+// CHECK1: $d:
+// CHECK1-NEXT:    20008:       0c 10 02 08     .word   0x0802100c
+
+        .section .text.01, "ax", %progbits
+        .balign 4096
+        .globl _start
+        .type _start, %function
+_start:
+        // Expect thunk on pass 2
+        bl need_thunk_after_patch
+        .section .text.02, "ax", %progbits
+        .space 4096 - 12
+
+// CHECK2: _start:
+// CHECK2-NEXT:    21000:       00 fc ff 97     bl      #-4096
+
+        // Expect patch on pass 1
+        .section .text.03, "ax", %progbits
+        .globl t3_ff8_ldr
+        .type t3_ff8_ldr, %function
+t3_ff8_ldr:
+        adrp x0, dat
+        ldr x1, [x1, #0]
+        ldr x0, [x0, :got_lo12:dat]
+        ret
+
+// CHECK3: t3_ff8_ldr:
+// CHECK3-NEXT:    21ff8:       60 00 04 f0     adrp    x0, #134279168
+// CHECK3-NEXT:    21ffc:       21 00 40 f9     ldr     x1, [x1]
+// CHECK3-NEXT:    22000:       02 08 80 15     b       #100671496
+// CHECK3-NEXT:    22004:       c0 03 5f d6     ret
+
+        .section .text.04, "ax", %progbits
+        .space 64 * 1024 * 1024
+
+        // Expect patch on pass 1
+        .section .text.05, "ax", %progbits
+        .balign 4096
+        .space 4096 - 8
+        .globl t3_ff8_str
+        .type t3_ff8_str, %function
+t3_ff8_str:
+        adrp x0, dat
+        ldr x1, [x1, #0]
+        str x0, [x0, :got_lo12:dat]
+        ret
+
+// CHECK4: t3_ff8_str:
+// CHECK4-NEXT:  4023ff8:       60 00 02 b0     adrp    x0, #67162112
+// CHECK4-NEXT:  4023ffc:       21 00 40 f9     ldr     x1, [x1]
+// CHECK4-NEXT:  4024000:       04 00 80 14     b       #33554448
+// CHECK4-NEXT:  4024004:       c0 03 5f d6     ret
+
+        .section .text.06, "ax", %progbits
+        .space 32 * 1024 * 1024
+
+// CHECK5: __CortexA53843419_21000:
+// CHECK5-NEXT:  6024008:       00 00 40 f9     ldr     x0, [x0]
+// CHECK5-NEXT:  602400c:       fe f7 7f 16     b       #-100671496
+// CHECK5: __CortexA53843419_4023000:
+// CHECK5-NEXT:  6024010:       00 00 00 f9     str     x0, [x0]
+// CHECK5-NEXT:  6024014:       fc ff 7f 17     b       #-33554448
+
+        .section .text.07, "ax", %progbits
+        .space (32 * 1024 * 1024) - 12300
+
+        .section .text.08, "ax", %progbits
+        .globl need_thunk_after_patch
+        .type need_thunk_after_patch, %function
+need_thunk_after_patch:
+        ret
+
+// CHECK6: need_thunk_after_patch:
+// CHECK6-NEXT:  802100c:       c0 03 5f d6     ret
+
+        // Will need a patch on pass 2
+        .section .text.09, "ax", %progbits
+        .space 4096 - 20
+        .globl t3_ffc_ldr
+        .type t3_ffc_ldr, %function
+t3_ffc_ldr:
+        adrp x0, dat
+        ldr x1, [x1, #0]
+        ldr x0, [x0, :got_lo12:dat]
+        ret
+
+// CHECK7: t3_ffc_ldr:
+// CHECK7-NEXT:  8021ffc:       60 00 00 f0     adrp    x0, #61440
+// CHECK7-NEXT:  8022000:       21 00 40 f9     ldr     x1, [x1]
+// CHECK7-NEXT:  8022004:       02 00 00 14     b       #8
+// CHECK7-NEXT:  8022008:       c0 03 5f d6     ret
+// CHECK7: __CortexA53843419_8022004:
+// CHECK7-NEXT:  802200c:       00 00 40 f9     ldr     x0, [x0]
+// CHECK7-NEXT:  8022010:       fe ff ff 17     b       #-8
+
+        .section .data
+        .globl dat
+dat:    .quad 0