[PATCH] D41246: [LLD][ELF] Optimize Arm PLT entries

[Rafael Avila de Espindola via llvm-commits]

Peter Smith via Phabricator <reviews at reviews.llvm.org> writes:

> peter.smith added a comment.
>
> In https://reviews.llvm.org/D41246#955551, @pcc wrote:
>
>> Instead of making the behaviour conditional on the flag, could we always emit the long PLT header and then conditionally emit short or long PLTs depending on what the offset is?
>
>
> That sounds like it should work given that the entries are the same
> size.

The advantage of the smaller sequence is just that it has 1 load instead
of 2, right? If so please add a comment saying that.

Cheers,
Rafael