[PATCH] D41096: [X86] Initial support for prefer-vector-width function attribute

Hal Finkel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 13 17:02:16 PST 2017


hfinkel added a comment.

In https://reviews.llvm.org/D41096#954711, @craig.topper wrote:

> Also doesn't this mean that we have to explicitly force +avx512-wide-vectors somewhere if the user passes "-mavx512f" with no -march?
>
>   def FeatureAVX512WideVectors : SubtargetFeature<"avx512-wide-vectors", "HasAVX512WideVectors", "true", "Enable use of 512-bit Vector Registers", [FeatureAVX512]>;
>


Yes, we could do that in the frontend. Or, we can make "core" AVX512 have a different name, add that to the processor feature lists, and then have a tablegen "avx512f" feature that implies both (that way -mavx512f will still act as it does today).


https://reviews.llvm.org/D41096





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