[llvm] r320581 - [X86] Add RDMSR/WRMSR, RDPMC + RDTSC/RDTSCP schedule tests
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 13 06:22:04 PST 2017
Author: rksimon
Date: Wed Dec 13 06:22:04 2017
New Revision: 320581
URL: http://llvm.org/viewvc/llvm-project?rev=320581&view=rev
Log:
[X86] Add RDMSR/WRMSR, RDPMC + RDTSC/RDTSCP schedule tests
Add missing RDTSCP itinerary
Modified:
llvm/trunk/lib/Target/X86/X86InstrSystem.td
llvm/trunk/lib/Target/X86/X86Schedule.td
llvm/trunk/lib/Target/X86/X86ScheduleAtom.td
llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=320581&r1=320580&r2=320581&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Wed Dec 13 06:22:04 2017
@@ -19,7 +19,8 @@ let Defs = [RAX, RDX] in
TB;
let Defs = [RAX, RCX, RDX] in
- def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", [(X86rdtscp)]>, TB;
+ def RDTSCP : I<0x01, MRM_F9, (outs), (ins), "rdtscp", [(X86rdtscp)],
+ IIC_RDTSCP>, TB;
// CPU flow control instructions
Modified: llvm/trunk/lib/Target/X86/X86Schedule.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Schedule.td?rev=320581&r1=320580&r2=320581&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Schedule.td (original)
+++ llvm/trunk/lib/Target/X86/X86Schedule.td Wed Dec 13 06:22:04 2017
@@ -508,6 +508,7 @@ def IIC_RDPID : InstrItinClass;
def IIC_RDRAND : InstrItinClass;
def IIC_RDSEED : InstrItinClass;
def IIC_RDTSC : InstrItinClass;
+def IIC_RDTSCP : InstrItinClass;
def IIC_RSM : InstrItinClass;
def IIC_SIDT : InstrItinClass;
def IIC_SGDT : InstrItinClass;
Modified: llvm/trunk/lib/Target/X86/X86ScheduleAtom.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleAtom.td?rev=320581&r1=320580&r2=320581&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleAtom.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleAtom.td Wed Dec 13 06:22:04 2017
@@ -409,6 +409,7 @@ def AtomItineraries : ProcessorItinerari
InstrItinData<IIC_LXS, [InstrStage<10, [Port0, Port1]>] >,
InstrItinData<IIC_LTR, [InstrStage<83, [Port0, Port1]>] >,
InstrItinData<IIC_RDTSC, [InstrStage<30, [Port0, Port1]>] >,
+ InstrItinData<IIC_RDTSCP, [InstrStage<30, [Port0, Port1]>] >,
InstrItinData<IIC_RSM, [InstrStage<741, [Port0, Port1]>] >,
InstrItinData<IIC_SIDT, [InstrStage<4, [Port0, Port1]>] >,
InstrItinData<IIC_SGDT, [InstrStage<4, [Port0, Port1]>] >,
Modified: llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll?rev=320581&r1=320580&r2=320581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/schedule-x86_64.ll Wed Dec 13 06:22:04 2017
@@ -9102,6 +9102,248 @@ define void @test_rcl_rcr_64(i64 %a0, i6
ret void
}
+define void @test_rdmsr_wrmsr() optsize {
+; GENERIC-LABEL: test_rdmsr_wrmsr:
+; GENERIC: # %bb.0:
+; GENERIC-NEXT: #APP
+; GENERIC-NEXT: rdmsr # sched: [100:0.33]
+; GENERIC-NEXT: wrmsr # sched: [100:0.33]
+; GENERIC-NEXT: #NO_APP
+; GENERIC-NEXT: retq # sched: [1:1.00]
+;
+; ATOM-LABEL: test_rdmsr_wrmsr:
+; ATOM: # %bb.0:
+; ATOM-NEXT: #APP
+; ATOM-NEXT: rdmsr # sched: [78:39.00]
+; ATOM-NEXT: wrmsr # sched: [202:101.00]
+; ATOM-NEXT: #NO_APP
+; ATOM-NEXT: retq # sched: [79:39.50]
+;
+; SLM-LABEL: test_rdmsr_wrmsr:
+; SLM: # %bb.0:
+; SLM-NEXT: #APP
+; SLM-NEXT: rdmsr # sched: [100:1.00]
+; SLM-NEXT: wrmsr # sched: [100:1.00]
+; SLM-NEXT: #NO_APP
+; SLM-NEXT: retq # sched: [4:1.00]
+;
+; SANDY-LABEL: test_rdmsr_wrmsr:
+; SANDY: # %bb.0:
+; SANDY-NEXT: #APP
+; SANDY-NEXT: rdmsr # sched: [100:0.33]
+; SANDY-NEXT: wrmsr # sched: [100:0.33]
+; SANDY-NEXT: #NO_APP
+; SANDY-NEXT: retq # sched: [1:1.00]
+;
+; HASWELL-LABEL: test_rdmsr_wrmsr:
+; HASWELL: # %bb.0:
+; HASWELL-NEXT: #APP
+; HASWELL-NEXT: rdmsr # sched: [100:0.25]
+; HASWELL-NEXT: wrmsr # sched: [100:0.25]
+; HASWELL-NEXT: #NO_APP
+; HASWELL-NEXT: retq # sched: [7:1.00]
+;
+; BROADWELL-LABEL: test_rdmsr_wrmsr:
+; BROADWELL: # %bb.0:
+; BROADWELL-NEXT: #APP
+; BROADWELL-NEXT: rdmsr # sched: [100:0.25]
+; BROADWELL-NEXT: wrmsr # sched: [100:0.25]
+; BROADWELL-NEXT: #NO_APP
+; BROADWELL-NEXT: retq # sched: [7:1.00]
+;
+; SKYLAKE-LABEL: test_rdmsr_wrmsr:
+; SKYLAKE: # %bb.0:
+; SKYLAKE-NEXT: #APP
+; SKYLAKE-NEXT: rdmsr # sched: [100:0.25]
+; SKYLAKE-NEXT: wrmsr # sched: [100:0.25]
+; SKYLAKE-NEXT: #NO_APP
+; SKYLAKE-NEXT: retq # sched: [7:1.00]
+;
+; SKX-LABEL: test_rdmsr_wrmsr:
+; SKX: # %bb.0:
+; SKX-NEXT: #APP
+; SKX-NEXT: rdmsr # sched: [100:0.25]
+; SKX-NEXT: wrmsr # sched: [100:0.25]
+; SKX-NEXT: #NO_APP
+; SKX-NEXT: retq # sched: [7:1.00]
+;
+; BTVER2-LABEL: test_rdmsr_wrmsr:
+; BTVER2: # %bb.0:
+; BTVER2-NEXT: #APP
+; BTVER2-NEXT: rdmsr # sched: [100:0.17]
+; BTVER2-NEXT: wrmsr # sched: [100:0.17]
+; BTVER2-NEXT: #NO_APP
+; BTVER2-NEXT: retq # sched: [4:1.00]
+;
+; ZNVER1-LABEL: test_rdmsr_wrmsr:
+; ZNVER1: # %bb.0:
+; ZNVER1-NEXT: #APP
+; ZNVER1-NEXT: rdmsr # sched: [100:?]
+; ZNVER1-NEXT: wrmsr # sched: [100:?]
+; ZNVER1-NEXT: #NO_APP
+; ZNVER1-NEXT: retq # sched: [1:0.50]
+ call void asm sideeffect "rdmsr \0A\09 wrmsr", ""()
+ ret void
+}
+
+define void @test_rdpmc() optsize {
+; GENERIC-LABEL: test_rdpmc:
+; GENERIC: # %bb.0:
+; GENERIC-NEXT: #APP
+; GENERIC-NEXT: rdpmc # sched: [100:0.33]
+; GENERIC-NEXT: #NO_APP
+; GENERIC-NEXT: retq # sched: [1:1.00]
+;
+; ATOM-LABEL: test_rdpmc:
+; ATOM: # %bb.0:
+; ATOM-NEXT: #APP
+; ATOM-NEXT: rdpmc # sched: [46:23.00]
+; ATOM-NEXT: #NO_APP
+; ATOM-NEXT: retq # sched: [79:39.50]
+;
+; SLM-LABEL: test_rdpmc:
+; SLM: # %bb.0:
+; SLM-NEXT: #APP
+; SLM-NEXT: rdpmc # sched: [100:1.00]
+; SLM-NEXT: #NO_APP
+; SLM-NEXT: retq # sched: [4:1.00]
+;
+; SANDY-LABEL: test_rdpmc:
+; SANDY: # %bb.0:
+; SANDY-NEXT: #APP
+; SANDY-NEXT: rdpmc # sched: [100:0.33]
+; SANDY-NEXT: #NO_APP
+; SANDY-NEXT: retq # sched: [1:1.00]
+;
+; HASWELL-LABEL: test_rdpmc:
+; HASWELL: # %bb.0:
+; HASWELL-NEXT: #APP
+; HASWELL-NEXT: rdpmc # sched: [1:?]
+; HASWELL-NEXT: #NO_APP
+; HASWELL-NEXT: retq # sched: [7:1.00]
+;
+; BROADWELL-LABEL: test_rdpmc:
+; BROADWELL: # %bb.0:
+; BROADWELL-NEXT: #APP
+; BROADWELL-NEXT: rdpmc # sched: [100:0.25]
+; BROADWELL-NEXT: #NO_APP
+; BROADWELL-NEXT: retq # sched: [7:1.00]
+;
+; SKYLAKE-LABEL: test_rdpmc:
+; SKYLAKE: # %bb.0:
+; SKYLAKE-NEXT: #APP
+; SKYLAKE-NEXT: rdpmc # sched: [100:0.25]
+; SKYLAKE-NEXT: #NO_APP
+; SKYLAKE-NEXT: retq # sched: [7:1.00]
+;
+; SKX-LABEL: test_rdpmc:
+; SKX: # %bb.0:
+; SKX-NEXT: #APP
+; SKX-NEXT: rdpmc # sched: [100:0.25]
+; SKX-NEXT: #NO_APP
+; SKX-NEXT: retq # sched: [7:1.00]
+;
+; BTVER2-LABEL: test_rdpmc:
+; BTVER2: # %bb.0:
+; BTVER2-NEXT: #APP
+; BTVER2-NEXT: rdpmc # sched: [100:0.17]
+; BTVER2-NEXT: #NO_APP
+; BTVER2-NEXT: retq # sched: [4:1.00]
+;
+; ZNVER1-LABEL: test_rdpmc:
+; ZNVER1: # %bb.0:
+; ZNVER1-NEXT: #APP
+; ZNVER1-NEXT: rdpmc # sched: [100:?]
+; ZNVER1-NEXT: #NO_APP
+; ZNVER1-NEXT: retq # sched: [1:0.50]
+ call void asm sideeffect "rdpmc", ""()
+ ret void
+}
+
+define void @test_rdtsc_rdtscp() optsize {
+; GENERIC-LABEL: test_rdtsc_rdtscp:
+; GENERIC: # %bb.0:
+; GENERIC-NEXT: #APP
+; GENERIC-NEXT: rdtsc # sched: [100:0.33]
+; GENERIC-NEXT: rdtscp # sched: [100:0.33]
+; GENERIC-NEXT: #NO_APP
+; GENERIC-NEXT: retq # sched: [1:1.00]
+;
+; ATOM-LABEL: test_rdtsc_rdtscp:
+; ATOM: # %bb.0:
+; ATOM-NEXT: #APP
+; ATOM-NEXT: rdtsc # sched: [30:15.00]
+; ATOM-NEXT: rdtscp # sched: [30:15.00]
+; ATOM-NEXT: #NO_APP
+; ATOM-NEXT: retq # sched: [79:39.50]
+;
+; SLM-LABEL: test_rdtsc_rdtscp:
+; SLM: # %bb.0:
+; SLM-NEXT: #APP
+; SLM-NEXT: rdtsc # sched: [100:1.00]
+; SLM-NEXT: rdtscp # sched: [100:1.00]
+; SLM-NEXT: #NO_APP
+; SLM-NEXT: retq # sched: [4:1.00]
+;
+; SANDY-LABEL: test_rdtsc_rdtscp:
+; SANDY: # %bb.0:
+; SANDY-NEXT: #APP
+; SANDY-NEXT: rdtsc # sched: [100:0.33]
+; SANDY-NEXT: rdtscp # sched: [100:0.33]
+; SANDY-NEXT: #NO_APP
+; SANDY-NEXT: retq # sched: [1:1.00]
+;
+; HASWELL-LABEL: test_rdtsc_rdtscp:
+; HASWELL: # %bb.0:
+; HASWELL-NEXT: #APP
+; HASWELL-NEXT: rdtsc # sched: [18:2.00]
+; HASWELL-NEXT: rdtscp # sched: [18:2.00]
+; HASWELL-NEXT: #NO_APP
+; HASWELL-NEXT: retq # sched: [7:1.00]
+;
+; BROADWELL-LABEL: test_rdtsc_rdtscp:
+; BROADWELL: # %bb.0:
+; BROADWELL-NEXT: #APP
+; BROADWELL-NEXT: rdtsc # sched: [18:2.00]
+; BROADWELL-NEXT: rdtscp # sched: [18:2.00]
+; BROADWELL-NEXT: #NO_APP
+; BROADWELL-NEXT: retq # sched: [7:1.00]
+;
+; SKYLAKE-LABEL: test_rdtsc_rdtscp:
+; SKYLAKE: # %bb.0:
+; SKYLAKE-NEXT: #APP
+; SKYLAKE-NEXT: rdtsc # sched: [18:2.00]
+; SKYLAKE-NEXT: rdtscp # sched: [18:2.00]
+; SKYLAKE-NEXT: #NO_APP
+; SKYLAKE-NEXT: retq # sched: [7:1.00]
+;
+; SKX-LABEL: test_rdtsc_rdtscp:
+; SKX: # %bb.0:
+; SKX-NEXT: #APP
+; SKX-NEXT: rdtsc # sched: [18:2.00]
+; SKX-NEXT: rdtscp # sched: [18:2.00]
+; SKX-NEXT: #NO_APP
+; SKX-NEXT: retq # sched: [7:1.00]
+;
+; BTVER2-LABEL: test_rdtsc_rdtscp:
+; BTVER2: # %bb.0:
+; BTVER2-NEXT: #APP
+; BTVER2-NEXT: rdtsc # sched: [100:0.17]
+; BTVER2-NEXT: rdtscp # sched: [100:0.17]
+; BTVER2-NEXT: #NO_APP
+; BTVER2-NEXT: retq # sched: [4:1.00]
+;
+; ZNVER1-LABEL: test_rdtsc_rdtscp:
+; ZNVER1: # %bb.0:
+; ZNVER1-NEXT: #APP
+; ZNVER1-NEXT: rdtsc # sched: [100:?]
+; ZNVER1-NEXT: rdtscp # sched: [100:?]
+; ZNVER1-NEXT: #NO_APP
+; ZNVER1-NEXT: retq # sched: [1:0.50]
+ call void asm sideeffect "rdtsc \0A\09 rdtscp", ""()
+ ret void
+}
+
; TODO - test_ret
define void @test_rol_ror_8(i8 %a0, i8 %a1, i8 *%a2) optsize {
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