[PATCH] D41161: [X86][PREFETCH]: Adding full coverage of MC encoding for the PREFETCH isa sets.<NFC>

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 13 05:34:28 PST 2017


RKSimon added a comment.

What about PREFETCHNTA/PREFETCH0/PREFETCH1/PREFETCH2 ?

PREFETCHNTA mem8 0F 18 /0 Move data closer to the processor using the NTA reference.
PREFETCHT0 mem8 0F 18 /1 Move data closer to the processor using the T0 reference.
PREFETCHT1 mem8 0F 18 /2 Move data closer to the processor using the T1 reference.
PREFETCHT2 mem8 0F 18 /3 Move data closer to the processor using the T2 reference.


Repository:
  rL LLVM

https://reviews.llvm.org/D41161





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