[PATCH] D41071: [RISCV] implemented assembler pseudo floating point instructions

[Alex Bradbury via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL320569: [RISCV] Implement floating point assembler pseudo instructions (authored by asb, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D41071?vs=126372&id=126714#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D41071

Files:
  llvm/trunk/lib/Target/RISCV/RISCVInstrInfoD.td
  llvm/trunk/lib/Target/RISCV/RISCVInstrInfoF.td
  llvm/trunk/test/MC/RISCV/rvd-aliases-valid.s
  llvm/trunk/test/MC/RISCV/rvf-aliases-valid.s

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