[PATCH] D41132: CodeGen: Fix assertion in machine inst sheduler due to llvm.dbg.value
Yaxun Liu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 13:40:26 PST 2017
yaxunl created this revision.
yaxunl added reviewers: arsenm, rampitec.
Herald added subscribers: javed.absar, nhaehnle, wdng, MatzeB.
Two issues were found about machine inst scheduler when compiling AMD APPSDK BinomialOption
with -g for amdgcn target:
1. GCNScheduleDAGMILive::schedule tries to update LiveIntervals for DBG_VALUE, which it
should not since DBG_VALUE is not mapped in LiveIntervals.
2. when DBG_VALUE is the last instruction of MBB, ScheduleDAGInstrs::buildSchedGraph and
ScheduleDAGMILive::scheduleMI does not move RPTracker properly, which causes assertion.
This patch fixes that.
https://reviews.llvm.org/D41132
Files:
lib/CodeGen/MachineScheduler.cpp
lib/CodeGen/ScheduleDAGInstrs.cpp
lib/Target/AMDGPU/GCNSchedStrategy.cpp
test/CodeGen/AMDGPU/debug-value.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D41132.126617.patch
Type: text/x-patch
Size: 31224 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171212/0e13b69f/attachment.bin>
More information about the llvm-commits
mailing list