[PATCH] D41096: [X86] Initial support for prefer-vector-width function attribute
Hal Finkel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 11:50:14 PST 2017
hfinkel added a comment.
In https://reviews.llvm.org/D41096#952697, @efriedma wrote:
> > If it finds any vector code, the pass would override the prefer-vector-width attribute to the length of the widest vector in that code.
>
> That makes sense... sort of. If this target-specific pass runs as part of the optimization pass pipeline (as opposed to the codegen pass pipeline), we need to make sure we generate correct code even if the optimization pass doesn't run (if someone is using -O0, opt-bisect, etc.). So we probably need two attributes: one clang attribute "try to avoid zmm registers if possible" and one attribute "disable all avx-512 instructions which use zmm registers", and we only set the second attribute if we've analyzed the function and proved we don't need to use zmm registers.
Hrmm. I thought that this "preference" attribute was only going to affect TTI and other cost-model-based optimized-driven vectorization, not the lowering of explicit vectors. Does it do the latter?
https://reviews.llvm.org/D41096
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