[PATCH] D39400: WIP: [MachineOperand][MIR] Add isRenamable to MachineOperand.

[Geoff Berry via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL320503: [MachineOperand][MIR] Add isRenamable to MachineOperand. (authored by gberry, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D39400?vs=125994&id=126568#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D39400

Files:
  llvm/trunk/docs/MIRLangRef.rst
  llvm/trunk/include/llvm/CodeGen/MachineInstrBuilder.h
  llvm/trunk/include/llvm/CodeGen/MachineOperand.h
  llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
  llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
  llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/trunk/lib/CodeGen/MachineOperand.cpp
  llvm/trunk/lib/CodeGen/MachineVerifier.cpp
  llvm/trunk/lib/CodeGen/RegAllocFast.cpp
  llvm/trunk/lib/CodeGen/VirtRegMap.cpp
  llvm/trunk/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/trunk/lib/Target/ARM/ARMExpandPseudoInsts.cpp
  llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
  llvm/trunk/test/CodeGen/AArch64/arm64-misched-multimmo.ll
  llvm/trunk/test/CodeGen/AMDGPU/shrink-carry.mir
  llvm/trunk/test/CodeGen/AMDGPU/splitkit.mir
  llvm/trunk/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
  llvm/trunk/test/CodeGen/AMDGPU/subreg_interference.mir
  llvm/trunk/test/CodeGen/AMDGPU/syncscopes.ll
  llvm/trunk/test/CodeGen/Hexagon/regalloc-bad-undef.mir
  llvm/trunk/test/CodeGen/MIR/X86/renamable-register-flag.mir
  llvm/trunk/test/CodeGen/PowerPC/byval-agg-info.ll
  llvm/trunk/test/CodeGen/SystemZ/regalloc-fast-invalid-kill-flag.mir
  llvm/trunk/test/CodeGen/X86/tail-merge-debugloc.ll
  llvm/trunk/test/DebugInfo/X86/pr34545.ll
  llvm/trunk/test/DebugInfo/X86/sdag-salvage-add.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D39400.126568.patch
Type: text/x-patch
Size: 29348 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171212/44774b7b/attachment.bin>