[llvm] r320491 - [RISCV][NFC] Formatting fix in RISCVInstrInfo.td
Alex Bradbury via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 12 08:10:21 PST 2017
Author: asb
Date: Tue Dec 12 08:10:21 2017
New Revision: 320491
URL: http://llvm.org/viewvc/llvm-project?rev=320491&view=rev
Log:
[RISCV][NFC] Formatting fix in RISCVInstrInfo.td
Modified:
llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.td
Modified: llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.td?rev=320491&r1=320490&r2=320491&view=diff
==============================================================================
--- llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.td (original)
+++ llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.td Tue Dec 12 08:10:21 2017
@@ -190,13 +190,13 @@ class ALU_rr<bits<7> funct7, bits<3> fun
opcodestr, "$rd, $rs1, $rs2">;
let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
-class CSR_ir<bits<3> funct3, string opcodestr> :
- RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd), (ins uimm12:$imm12, GPR:$rs1),
+class CSR_ir<bits<3> funct3, string opcodestr>
+ : RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd), (ins uimm12:$imm12, GPR:$rs1),
opcodestr, "$rd, $imm12, $rs1">;
let hasSideEffects = 1, mayLoad = 0, mayStore = 0 in
-class CSR_ii<bits<3> funct3, string opcodestr> :
- RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd),
+class CSR_ii<bits<3> funct3, string opcodestr>
+ : RVInstI<funct3, OPC_SYSTEM, (outs GPR:$rd),
(ins uimm12:$imm12, uimm5:$rs1),
opcodestr, "$rd, $imm12, $rs1">;
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