[PATCH] D40003: [RISCV] MC layer support for the rest instructions of standard compress instruction set

[Shiva Chen via Phabricator via llvm-commits]

shiva0217 added a comment.

Hi Alex, I add the floating compress instructions after F+D floating patches landing and add IsRV32 predicate for RV32 only compress instructions.
Some RV32 only instruction using the same encoding with RV64 instructions to compact the compress instruction coding space. To avoid decode conflict, I split these instructions to another decode table.


Repository:
  rL LLVM

https://reviews.llvm.org/D40003