[llvm] r320382 - [X86] Add CLZERO schedule test

[Simon Pilgrim via llvm-commits]

Author: rksimon
Date: Mon Dec 11 07:53:12 2017
New Revision: 320382

URL: http://llvm.org/viewvc/llvm-project?rev=320382&view=rev
Log:
[X86] Add CLZERO schedule test

Added:
    llvm/trunk/test/CodeGen/X86/clzero-schedule.ll

Added: llvm/trunk/test/CodeGen/X86/clzero-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/clzero-schedule.ll?rev=320382&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/clzero-schedule.ll (added)
+++ llvm/trunk/test/CodeGen/X86/clzero-schedule.ll Mon Dec 11 07:53:12 2017
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+clzero | FileCheck %s --check-prefix=GENERIC
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=ZNVER1
+
+define void @test_clzero(i8* %p) {
+; GENERIC-LABEL: test_clzero:
+; GENERIC:       # %bb.0:
+; GENERIC-NEXT:    leaq (%rdi), %rax # sched: [1:0.50]
+; GENERIC-NEXT:    clzero # sched: [100:0.33]
+; GENERIC-NEXT:    retq # sched: [1:1.00]
+;
+; ZNVER1-LABEL: test_clzero:
+; ZNVER1:       # %bb.0:
+; ZNVER1-NEXT:    leaq (%rdi), %rax # sched: [1:0.25]
+; ZNVER1-NEXT:    clzero # sched: [100:?]
+; ZNVER1-NEXT:    retq # sched: [1:0.50]
+  tail call void @llvm.x86.clzero(i8* %p)
+  ret void
+}
+declare void @llvm.x86.clzero(i8*)