[PATCH] D39849: [RISCV] Implement prolog and epilog insertion
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 10 09:18:06 PST 2017
asb updated this revision to Diff 126295.
asb added a comment.
Rebase and use an adjustReg helper (this minimises the diff for https://reviews.llvm.org/D40807).
https://reviews.llvm.org/D39849
Files:
lib/Target/RISCV/RISCVFrameLowering.cpp
lib/Target/RISCV/RISCVFrameLowering.h
test/CodeGen/RISCV/addc-adde-sube-subc.ll
test/CodeGen/RISCV/alu32.ll
test/CodeGen/RISCV/bare-select.ll
test/CodeGen/RISCV/blockaddress.ll
test/CodeGen/RISCV/branch.ll
test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
test/CodeGen/RISCV/calls.ll
test/CodeGen/RISCV/div.ll
test/CodeGen/RISCV/frame.ll
test/CodeGen/RISCV/i32-icmp.ll
test/CodeGen/RISCV/imm.ll
test/CodeGen/RISCV/indirectbr.ll
test/CodeGen/RISCV/jumptable.ll
test/CodeGen/RISCV/mem.ll
test/CodeGen/RISCV/mul.ll
test/CodeGen/RISCV/rem.ll
test/CodeGen/RISCV/rotl-rotr.ll
test/CodeGen/RISCV/select-cc.ll
test/CodeGen/RISCV/sext-zext-trunc.ll
test/CodeGen/RISCV/shifts.ll
test/CodeGen/RISCV/wide-mem.ll
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