[llvm] r320274 - [X86] Tag TLS instructions as system scheduler classes
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 9 16:12:57 PST 2017
Author: rksimon
Date: Sat Dec 9 16:12:57 2017
New Revision: 320274
URL: http://llvm.org/viewvc/llvm-project?rev=320274&view=rev
Log:
[X86] Tag TLS instructions as system scheduler classes
Modified:
llvm/trunk/lib/Target/X86/X86InstrCompiler.td
Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=320274&r1=320273&r2=320274&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Sat Dec 9 16:12:57 2017
@@ -464,6 +464,7 @@ let Defs = [RCX,RDI], isCodeGenOnly = 1
//===----------------------------------------------------------------------===//
// Thread Local Storage Instructions
//
+let SchedRW = [WriteSystem] in {
// ELF TLS Support
// All calls clobber the non-callee saved registers. ESP is marked as
@@ -529,7 +530,7 @@ def TLSCall_64 : I<0, Pseudo, (outs), (i
"# TLSCall_64",
[(X86TLSCall addr:$sym)]>,
Requires<[In64BitMode]>;
-
+} // SchedRW
//===----------------------------------------------------------------------===//
// Conditional Move Pseudo Instructions
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