[PATCH] D40922: [ARM] Optimize {s|u}mul.with.overflow.
Roger Ferrer Ibanez via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 8 10:35:54 PST 2017
rogfer01 added inline comments.
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:3955
+ case ISD::SMULO:
+ // We generate a SMUL_LOHI and then check if the high word is 0 or
+ // 0xffffffff.
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What about
```lang=cpp
// We generate a SMUL_LOHI and then check if all the bits of the high word
// are the same as the sign bit of the low word.
```
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Comment at: lib/Target/ARM/ARMISelLowering.cpp:4479
// Optimize {s|u}{add|sub}.with.overflow feeding into a branch instruction.
unsigned Opc = Cond.getOpcode();
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I think this comment should be updated after this change.
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:4527
// Optimize {s|u}{add|sub}.with.overflow feeding into a branch instruction.
unsigned Opc = LHS.getOpcode();
----------------
I think this comment should be updated after this change.
================
Comment at: test/CodeGen/ARM/su-addsub-overflow.ll:80
+define i32 @smul(i32 %a, i32 %b) local_unnamed_addr #0 {
+; CHECK-LABEL: smul:
----------------
Looks like we are overloading a bit the name of this test file. Perhaps add a new testfile `su-mul-overflow.ll` instead?
https://reviews.llvm.org/D40922
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