[llvm] r320140 - [CodeGen] Move printing MO_CImmediate operands to MachineOperand::print

[Francis Visoiu Mistrih via llvm-commits]

Author: thegameg
Date: Fri Dec  8 03:40:06 2017
New Revision: 320140

URL: http://llvm.org/viewvc/llvm-project?rev=320140&view=rev
Log:
[CodeGen] Move printing MO_CImmediate operands to MachineOperand::print

Work towards the unification of MIR and debug output by refactoring the
interfaces.

Modified:
    llvm/trunk/docs/MIRLangRef.rst
    llvm/trunk/lib/CodeGen/MIRPrinter.cpp
    llvm/trunk/lib/CodeGen/MachineOperand.cpp
    llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp

Modified: llvm/trunk/docs/MIRLangRef.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/MIRLangRef.rst?rev=320140&r1=320139&r2=320140&view=diff
==============================================================================
--- llvm/trunk/docs/MIRLangRef.rst (original)
+++ llvm/trunk/docs/MIRLangRef.rst Fri Dec  8 03:40:06 2017
@@ -430,7 +430,11 @@ immediate machine operand ``-42``:
 
     %eax = MOV32ri -42
 
-.. TODO: Describe the CIMM (Rare) and FPIMM immediate operands.
+For integers > 64bit, we use a special machine operand, ``MO_CImmediate``,
+which stores the immediate in a ``ConstantInt`` using an ``APInt`` (LLVM's
+arbitrary precision integers).
+
+.. TODO: Describe the FPIMM immediate operands.
 
 .. _register-operands:
 

Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=320140&r1=320139&r2=320140&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Fri Dec  8 03:40:06 2017
@@ -854,7 +854,8 @@ void MIPrinter::print(const MachineInstr
   const MachineOperand &Op = MI.getOperand(OpIdx);
   printTargetFlags(Op);
   switch (Op.getType()) {
-  case MachineOperand::MO_Register: {
+  case MachineOperand::MO_Register:
+  case MachineOperand::MO_CImmediate: {
     unsigned TiedOperandIdx = 0;
     if (ShouldPrintRegisterTies && Op.isTied() && !Op.isDef())
       TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
@@ -869,9 +870,6 @@ void MIPrinter::print(const MachineInstr
     else
       OS << Op.getImm();
     break;
-  case MachineOperand::MO_CImmediate:
-    Op.getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);
-    break;
   case MachineOperand::MO_FPImmediate:
     Op.getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);
     break;

Modified: llvm/trunk/lib/CodeGen/MachineOperand.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineOperand.cpp?rev=320140&r1=320139&r2=320140&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineOperand.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineOperand.cpp Fri Dec  8 03:40:06 2017
@@ -410,7 +410,7 @@ void MachineOperand::print(raw_ostream &
     OS << getImm();
     break;
   case MachineOperand::MO_CImmediate:
-    getCImm()->getValue().print(OS, false);
+    getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);
     break;
   case MachineOperand::MO_FPImmediate:
     if (getFPImm()->getType()->isFloatTy()) {

Modified: llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp?rev=320140&r1=320139&r2=320140&view=diff
==============================================================================
--- llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp (original)
+++ llvm/trunk/unittests/CodeGen/MachineOperandTest.cpp Fri Dec  8 03:40:06 2017
@@ -9,6 +9,8 @@
 
 #include "llvm/ADT/ilist_node.h"
 #include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/IR/Constants.h"
+#include "llvm/IR/LLVMContext.h"
 #include "llvm/Support/raw_ostream.h"
 #include "gtest/gtest.h"
 
@@ -76,4 +78,26 @@ TEST(MachineOperandTest, PrintSubReg) {
   ASSERT_TRUE(OS.str() == "%physreg1.subreg5");
 }
 
+TEST(MachineOperandTest, PrintCImm) {
+  LLVMContext Context;
+  APInt Int(128, UINT64_MAX);
+  ++Int;
+  ConstantInt *CImm = ConstantInt::get(Context, Int);
+  // Create a MachineOperand with an Imm=(UINT64_MAX + 1)
+  MachineOperand MO = MachineOperand::CreateCImm(CImm);
+
+  // Checking some preconditions on the newly created
+  // MachineOperand.
+  ASSERT_TRUE(MO.isCImm());
+  ASSERT_TRUE(MO.getCImm() == CImm);
+  ASSERT_TRUE(MO.getCImm()->getValue() == Int);
+
+  // Print a MachineOperand containing a SubReg. Here we check that without a
+  // TRI and IntrinsicInfo we can still print the subreg index.
+  std::string str;
+  raw_string_ostream OS(str);
+  MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr);
+  ASSERT_TRUE(OS.str() == "i128 18446744073709551616");
+}
+
 } // end namespace