[llvm] r320047 - [X86][SVM] Tag SVM instructions scheduler classes
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 7 06:35:17 PST 2017
Author: rksimon
Date: Thu Dec 7 06:35:17 2017
New Revision: 320047
URL: http://llvm.org/viewvc/llvm-project?rev=320047&view=rev
Log:
[X86][SVM] Tag SVM instructions scheduler classes
Tagged all as system instructions
Modified:
llvm/trunk/lib/Target/X86/X86InstrSVM.td
llvm/trunk/lib/Target/X86/X86Schedule.td
Modified: llvm/trunk/lib/Target/X86/X86InstrSVM.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSVM.td?rev=320047&r1=320046&r2=320047&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSVM.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSVM.td Thu Dec 7 06:35:17 2017
@@ -15,44 +15,44 @@
//===----------------------------------------------------------------------===//
// SVM instructions
+let SchedRW = [WriteSystem] in {
// 0F 01 D9
-def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB;
+def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", [], IIC_SVM>, TB;
// 0F 01 DC
-def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB;
+def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", [], IIC_STGI>, TB;
// 0F 01 DD
-def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB;
+def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", [], IIC_CLGI>, TB;
// 0F 01 DE
let Uses = [EAX] in
-def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit\t{%eax|eax}", []>, TB;
+def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit\t{%eax|eax}", [], IIC_SKINIT>, TB;
// 0F 01 D8
let Uses = [EAX] in
def VMRUN32 : I<0x01, MRM_D8, (outs), (ins),
- "vmrun\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
+ "vmrun\t{%eax|eax}", [], IIC_SVM>, TB, Requires<[Not64BitMode]>;
let Uses = [RAX] in
def VMRUN64 : I<0x01, MRM_D8, (outs), (ins),
- "vmrun\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
+ "vmrun\t{%rax|rax}", [], IIC_SVM>, TB, Requires<[In64BitMode]>;
// 0F 01 DA
let Uses = [EAX] in
def VMLOAD32 : I<0x01, MRM_DA, (outs), (ins),
- "vmload\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
+ "vmload\t{%eax|eax}", [], IIC_SVM>, TB, Requires<[Not64BitMode]>;
let Uses = [RAX] in
def VMLOAD64 : I<0x01, MRM_DA, (outs), (ins),
- "vmload\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
+ "vmload\t{%rax|rax}", [], IIC_SVM>, TB, Requires<[In64BitMode]>;
// 0F 01 DB
let Uses = [EAX] in
def VMSAVE32 : I<0x01, MRM_DB, (outs), (ins),
- "vmsave\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
+ "vmsave\t{%eax|eax}", [], IIC_SVM>, TB, Requires<[Not64BitMode]>;
let Uses = [RAX] in
def VMSAVE64 : I<0x01, MRM_DB, (outs), (ins),
- "vmsave\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
+ "vmsave\t{%rax|rax}", [], IIC_SVM>, TB, Requires<[In64BitMode]>;
-let SchedRW = [WriteSystem] in {
// 0F 01 DF
let Uses = [EAX, ECX] in
def INVLPGA32 : I<0x01, MRM_DF, (outs), (ins),
Modified: llvm/trunk/lib/Target/X86/X86Schedule.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Schedule.td?rev=320047&r1=320046&r2=320047&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Schedule.td (original)
+++ llvm/trunk/lib/Target/X86/X86Schedule.td Thu Dec 7 06:35:17 2017
@@ -506,6 +506,10 @@ def IIC_SIDT : InstrItinClass;
def IIC_SGDT : InstrItinClass;
def IIC_SLDT : InstrItinClass;
def IIC_STR : InstrItinClass;
+def IIC_SKINIT : InstrItinClass;
+def IIC_SVM : InstrItinClass;
+def IIC_CLGI : InstrItinClass;
+def IIC_STGI : InstrItinClass;
def IIC_SWAPGS : InstrItinClass;
def IIC_SYSCALL : InstrItinClass;
def IIC_SYS_ENTER_EXIT : InstrItinClass;
More information about the llvm-commits
mailing list