[PATCH] D39895: [RISCV] MC layer support for the standard RV32D instruction set extension

[Alex Bradbury via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL320023: [RISCV] MC layer support for the standard RV32D instruction set extension (authored by asb).

Changed prior to commit:
  https://reviews.llvm.org/D39895?vs=123765&id=125917#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D39895

Files:
  llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/trunk/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
  llvm/trunk/lib/Target/RISCV/RISCV.td
  llvm/trunk/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/trunk/lib/Target/RISCV/RISCVInstrInfoD.td
  llvm/trunk/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/trunk/lib/Target/RISCV/RISCVSubtarget.h
  llvm/trunk/test/MC/RISCV/rv32d-invalid.s
  llvm/trunk/test/MC/RISCV/rv32d-valid.s
  llvm/trunk/test/MC/RISCV/rv32f-invalid.s

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