[PATCH] D40865: X86 AVX2: Prefer one VPERMV over ShuffleAsRepeatedMaskAndLanePermute

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

This looks like another case for a scheduler driven shuffle combine, possibly in the MC like https://reviews.llvm.org/D40602, although I'm still not sure if that is late enough to properly account for the increase in register pressure from the shuffle mask load.


https://reviews.llvm.org/D40865