[PATCH] D35267: Pass Divergence Analysis data to selection DAG to drive divergence dependent instruction selection

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Does ReplaceAllUsesWith need to propagate changes to the "IsDivergent" bit?



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Comment at: include/llvm/CodeGen/SelectionDAG.h:360
     Node->OperandList = Ops;
+    Node->SDNodeBits.IsDivergent = IsDivergent;
     checkForCycles(Node);
----------------
I like this. :)


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Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h:688
   void setValue(const Value *V, SDValue NewN) {
+    NewN.getNode()->SDNodeBits.IsDivergent = DA ? DA->isDivergent(V) : 0;
     SDValue &N = NodeMap[V];
----------------
You're mutating the node after it's been inserted into the CSEMap, which is generally bad.  Also, it's not clear this is the node you need to set the "divergent" bit on (NewN could be something which will be eliminated by DAGCombine, like a BITCAST or MERGE_VALUES).  Can we do this some other way which is more obviously correct?


https://reviews.llvm.org/D35267