[llvm] r319892 - [SystemZ] Bugfix in expandRxSBG()
Jonas Paulsson via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 6 05:53:24 PST 2017
Author: jonpa
Date: Wed Dec 6 05:53:24 2017
New Revision: 319892
URL: http://llvm.org/viewvc/llvm-project?rev=319892&view=rev
Log:
[SystemZ] Bugfix in expandRxSBG()
Csmith discovered a program that caused wrong code generation with -O0:
When handling a SIGN_EXTEND in expandRxSBG(), RxSBG.BitSize may be less than
the Input width (if a truncate was previously traversed), so maskMatters()
should be called with a masked based on the width of the sign extend result
instead.
Review: Ulrich Weigand
Added:
llvm/trunk/test/CodeGen/SystemZ/rosbg-02.ll
Modified:
llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp?rev=319892&r1=319891&r2=319892&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp Wed Dec 6 05:53:24 2017
@@ -838,9 +838,16 @@ bool SystemZDAGToDAGISel::expandRxSBG(Rx
case ISD::SIGN_EXTEND: {
// Check that the extension bits are don't-care (i.e. are masked out
// by the final mask).
+ unsigned BitSize = N.getValueSizeInBits();
unsigned InnerBitSize = N.getOperand(0).getValueSizeInBits();
- if (maskMatters(RxSBG, allOnes(RxSBG.BitSize) - allOnes(InnerBitSize)))
- return false;
+ if (maskMatters(RxSBG, allOnes(BitSize) - allOnes(InnerBitSize))) {
+ // In the case where only the sign bit is active, increase Rotate with
+ // the extension width.
+ if (RxSBG.Mask == 1 && RxSBG.Rotate == 1)
+ RxSBG.Rotate += (BitSize - InnerBitSize);
+ else
+ return false;
+ }
RxSBG.Input = N.getOperand(0);
return true;
Added: llvm/trunk/test/CodeGen/SystemZ/rosbg-02.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/rosbg-02.ll?rev=319892&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/rosbg-02.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/rosbg-02.ll Wed Dec 6 05:53:24 2017
@@ -0,0 +1,24 @@
+; Test that a rosbg conversion involving a sign extend operation rotates with
+; the right number of steps.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O0 | FileCheck %s
+
+ at g_136 = external global i16, align 2
+ at g_999 = external global i32, align 4
+
+; Function Attrs: nounwind
+define void @main() {
+ %1 = load i32, i32* undef, align 4
+ store i16 -28141, i16* @g_136, align 2
+ %2 = load i32, i32* undef, align 4
+ %3 = xor i32 -28141, %2
+ %4 = xor i32 %1, %3
+ %5 = sext i32 %4 to i64
+ %6 = icmp sgt i64 0, %5
+ %7 = zext i1 %6 to i32
+ %8 = load i32, i32* @g_999, align 4
+ %9 = or i32 %8, %7
+; CHECK: rosbg %r1, %r3, 63, 63, 33
+ store i32 %9, i32* @g_999, align 4
+ ret void
+}
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