[llvm] r319888 - [mips] Fix definition of 'bc' instruction
Simon Dardis via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 6 04:42:49 PST 2017
Author: sdardis
Date: Wed Dec 6 04:42:49 2017
New Revision: 319888
URL: http://llvm.org/viewvc/llvm-project?rev=319888&view=rev
Log:
[mips] Fix definition of 'bc' instruction
Modified:
llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/trunk/test/MC/Mips/micromips32r6/valid.s
llvm/trunk/test/MC/Mips/mips32r6/valid.s
Modified: llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td?rev=319888&r1=319887&r2=319888&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips32r6InstrInfo.td Wed Dec 6 04:42:49 2017
@@ -822,9 +822,7 @@ let AdditionalPredicates = [NotInMicroMi
def BC1NEZ : BC1NEZ_ENC, BC1NEZ_DESC, ISA_MIPS32R6, HARDFLOAT;
def BC2EQZ : BC2EQZ_ENC, BC2EQZ_DESC, ISA_MIPS32R6;
def BC2NEZ : BC2NEZ_ENC, BC2NEZ_DESC, ISA_MIPS32R6;
-}
-def BC : R6MMR6Rel, BC_ENC, BC_DESC, ISA_MIPS32R6;
-let AdditionalPredicates = [NotInMicroMips] in {
+ def BC : R6MMR6Rel, BC_ENC, BC_DESC, ISA_MIPS32R6;
def BEQC : R6MMR6Rel, BEQC_ENC, BEQC_DESC, ISA_MIPS32R6;
def BEQZALC : R6MMR6Rel, BEQZALC_ENC, BEQZALC_DESC, ISA_MIPS32R6;
def BEQZC : R6MMR6Rel, BEQZC_ENC, BEQZC_DESC, ISA_MIPS32R6;
Modified: llvm/trunk/test/MC/Mips/micromips32r6/valid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips32r6/valid.s?rev=319888&r1=319887&r2=319888&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips32r6/valid.s (original)
+++ llvm/trunk/test/MC/Mips/micromips32r6/valid.s Wed Dec 6 04:42:49 2017
@@ -1,4 +1,4 @@
-# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 -mattr=micromips | FileCheck %s
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -show-inst -mcpu=mips32r6 -mattr=micromips | FileCheck %s
.set noat
add $3, $4, $5 # CHECK: add $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x10]
@@ -37,6 +37,7 @@
balc 7286128 # CHECK: balc 7286128 # encoding: [0xb4,0x37,0x96,0xb8]
b 132 # CHECK: bc16 132 # encoding: [0xcc,0x42]
bc 7286128 # CHECK: bc 7286128 # encoding: [0x94,0x37,0x96,0xb8]
+ # CHECK-NEXT: # <MCInst #{{[0-9]+}} BC_MMR6
bc16 132 # CHECK: bc16 132 # encoding: [0xcc,0x42]
beqzc16 $6, 20 # CHECK: beqzc16 $6, 20 # encoding: [0x8f,0x0a]
bnezc16 $6, 20 # CHECK: bnezc16 $6, 20 # encoding: [0xaf,0x0a]
Modified: llvm/trunk/test/MC/Mips/mips32r6/valid.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips32r6/valid.s?rev=319888&r1=319887&r2=319888&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips32r6/valid.s (original)
+++ llvm/trunk/test/MC/Mips/mips32r6/valid.s Wed Dec 6 04:42:49 2017
@@ -10,7 +10,7 @@
# rs > rt
# appropriately for each branch instruction
#
-# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r6 2> %t0 | FileCheck %s
+# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -show-inst -mcpu=mips32r6 2> %t0 | FileCheck %s
# RUN: FileCheck %s -check-prefix=WARNING < %t0
a:
.set noat
@@ -25,6 +25,7 @@ a:
bal 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
balc 14572256 # CHECK: balc 14572256 # encoding: [0xe8,0x37,0x96,0xb8]
bc 14572256 # CHECK: bc 14572256 # encoding: [0xc8,0x37,0x96,0xb8]
+ # CHECK-NEXT: # <MCInst #{{[0-9]+}} BC
bc1eqz $f0,4 # CHECK: bc1eqz $f0, 4 # encoding: [0x45,0x20,0x00,0x01]
bc1eqz $f31,4 # CHECK: bc1eqz $f31, 4 # encoding: [0x45,0x3f,0x00,0x01]
bc1nez $f0,4 # CHECK: bc1nez $f0, 4 # encoding: [0x45,0xa0,0x00,0x01]
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