[PATCH] D40855: [PowerPC] LSR tunings for PowerPC

[Eric Christopher via Phabricator via llvm-commits]

echristo added inline comments.


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Comment at: lib/Target/PowerPC/PPCTargetTransformInfo.cpp:249-250
+ 
+  // PowerPC specific: check instruction count as well as default 
+  // cost calculation. 
+  return C1.Insns <= C2.Insns && BaseT::isLSRCostLess(C1, C2);
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Probably best to explain why this is useful and you can remove the "PowerPC specific" bit.


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Comment at: test/Transforms/LoopStrengthReduce/PowerPC/lsr-insns-3.ll:3
+; RUN: llc < %s -O2 -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-n32:64"
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Good to have a comment here of exactly what you're looking for as part of the test to make updating it easier. Right now I'd have no idea.


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Comment at: test/Transforms/LoopStrengthReduce/PowerPC/lsr-insns-3.ll:69
+
+attributes #0 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { nounwind readnone speculatable }
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Can limit the attributes of all the functions as well?


https://reviews.llvm.org/D40855