[PATCH] D39845: [TableGen] Give the option of tolerating duplicate register names

Alex Bradbury via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 5 13:34:34 PST 2017


asb added a comment.

@kparzysz: that's a good point. In my use of this, I actually have been assuming that the returned id is predictable. Currently, register ids seems to be assigned based on sorting register def names, so R0_32 is always preferred to R0_64 if they alias. It could be worth documenting and testing this? Or do you think it's better to leave undefined and update my RV32D patch so it's coded more defensively? (it will at least currently assert if an unexpected register id is returned).


https://reviews.llvm.org/D39845





More information about the llvm-commits mailing list