[PATCH] D40846: Add branch flag on branch instructions

[Leonardo Bianconi via Phabricator via llvm-commits]

lbianc created this revision.
Herald added a subscriber: kbarton.

Some branch patterns of PPC64 was missing the branch flag, impacting on LLDB execution.
The test case is the "next" command, which should stop on the next line, but without
this change, it continue executing as the "continue" command.


https://reviews.llvm.org/D40846

Files:
  lib/Target/PowerPC/PPCInstrInfo.td


Index: lib/Target/PowerPC/PPCInstrInfo.td
===================================================================
--- lib/Target/PowerPC/PPCInstrInfo.td
+++ lib/Target/PowerPC/PPCInstrInfo.td
@@ -1288,7 +1288,7 @@
                            "b${cond:cc}lr${cond:pm} ${cond:reg}", IIC_BrB, []>;
   }
 
-  let isCodeGenOnly = 1 in {
+  let isCodeGenOnly = 1, isBranch = 1 in {
     let Pattern = [(brcond i1:$bi, bb:$dst)] in
     def BC  : BForm_4<16, 12, 0, 0, (outs), (ins crbitrc:$bi, condbrtarget:$dst),
              "bc 12, $bi, $dst">;
@@ -4280,14 +4280,14 @@
 // These generic branch instruction forms are used for the assembler parser only.
 // Defs and Uses are conservative, since we don't know the BO value.
 let PPC970_Unit = 7 in {
-  let Defs = [CTR], Uses = [CTR, RM] in {
+  let isBranch = 1, Defs = [CTR], Uses = [CTR, RM] in {
     def gBC : BForm_3<16, 0, 0, (outs),
                       (ins u5imm:$bo, crbitrc:$bi, condbrtarget:$dst),
                       "bc $bo, $bi, $dst">;
     def gBCA : BForm_3<16, 1, 0, (outs),
                        (ins u5imm:$bo, crbitrc:$bi, abscondbrtarget:$dst),
                        "bca $bo, $bi, $dst">;
-    let isAsmParserOnly = 1 in {
+    let isBranch = 1, isAsmParserOnly = 1 in {
       def gBCat : BForm_3_at<16, 0, 0, (outs),
                              (ins u5imm:$bo, atimm:$at, crbitrc:$bi,
                                   condbrtarget:$dst),
@@ -4298,14 +4298,14 @@
                                    "bca$at $bo, $bi, $dst">;
     } // isAsmParserOnly = 1
   }
-  let Defs = [LR, CTR], Uses = [CTR, RM] in {
+  let isBranch = 1, Defs = [LR, CTR], Uses = [CTR, RM] in {
     def gBCL : BForm_3<16, 0, 1, (outs),
                        (ins u5imm:$bo, crbitrc:$bi, condbrtarget:$dst),
                        "bcl $bo, $bi, $dst">;
     def gBCLA : BForm_3<16, 1, 1, (outs),
                         (ins u5imm:$bo, crbitrc:$bi, abscondbrtarget:$dst),
                         "bcla $bo, $bi, $dst">;
-    let isAsmParserOnly = 1 in {
+    let isBranch = 1, isAsmParserOnly = 1 in {
       def gBCLat : BForm_3_at<16, 0, 1, (outs),
                          (ins u5imm:$bo, atimm:$at, crbitrc:$bi,
                               condbrtarget:$dst),
@@ -4316,19 +4316,19 @@
                                "bcla$at $bo, $bi, $dst">;
     } // // isAsmParserOnly = 1
   }
-  let Defs = [CTR], Uses = [CTR, LR, RM] in
+  let isBranch = 1, Defs = [CTR], Uses = [CTR, LR, RM] in
     def gBCLR : XLForm_2<19, 16, 0, (outs),
                          (ins u5imm:$bo, crbitrc:$bi, i32imm:$bh),
                          "bclr $bo, $bi, $bh", IIC_BrB, []>;
-  let Defs = [LR, CTR], Uses = [CTR, LR, RM] in
+  let isBranch = 1, Defs = [LR, CTR], Uses = [CTR, LR, RM] in
     def gBCLRL : XLForm_2<19, 16, 1, (outs),
                           (ins u5imm:$bo, crbitrc:$bi, i32imm:$bh),
                           "bclrl $bo, $bi, $bh", IIC_BrB, []>;
-  let Defs = [CTR], Uses = [CTR, LR, RM] in
+  let isBranch = 1, Defs = [CTR], Uses = [CTR, LR, RM] in
     def gBCCTR : XLForm_2<19, 528, 0, (outs),
                           (ins u5imm:$bo, crbitrc:$bi, i32imm:$bh),
                           "bcctr $bo, $bi, $bh", IIC_BrB, []>;
-  let Defs = [LR, CTR], Uses = [CTR, LR, RM] in
+  let isBranch = 1, Defs = [LR, CTR], Uses = [CTR, LR, RM] in
     def gBCCTRL : XLForm_2<19, 528, 1, (outs),
                            (ins u5imm:$bo, crbitrc:$bi, i32imm:$bh),
                            "bcctrl $bo, $bi, $bh", IIC_BrB, []>;


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