[PATCH] D40830: [RISCV] Implement support for the BranchRelaxation pass
Alex Bradbury via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 5 02:52:54 PST 2017
asb created this revision.
Herald added subscribers: jordy.potman.lists, simoncook, johnrusso, rbar.
Branch relaxation is needed to support branch displacements that overflow the instruction's immediate field.
This is the last non-trivial patch required for a 100% pass rate of the GCC torture suite targeting RV32I.
The churn in bswap-ctlz-cttz-ctpop.ll and jumptable.ll seems unfortunate, but I don't think it's caused by lib/Target/RISCV logic.
https://reviews.llvm.org/D40830
Files:
lib/Target/RISCV/RISCVInstrInfo.cpp
lib/Target/RISCV/RISCVInstrInfo.h
lib/Target/RISCV/RISCVMCInstLower.cpp
lib/Target/RISCV/RISCVRegisterInfo.h
lib/Target/RISCV/RISCVTargetMachine.cpp
test/CodeGen/RISCV/analyze-branch.ll
test/CodeGen/RISCV/branch-relaxation.ll
test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
test/CodeGen/RISCV/jumptable.ll
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