[PATCH] D39845: [TableGen] Give the option of tolerating duplicate register names

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

Hi Krzysztof, I agree that further tablegen support for selecting aliased registers could be helpful. For what it's worth, you can see how this sort of case is handled for RV32D parsing in https://reviews.llvm.org/D39895. My main concern is creating false generality: adding a new tablegen feature that seems general-purpose but actually has a very very narrow set of sensible uses.

In my case, a tablegen'erated function conversion function based on the FPR32 reg being a subregister of the FPR64 reg would be sufficient, but this may not work for aliased register names in other contexts.


https://reviews.llvm.org/D39845