[llvm] r319726 - [X86] Don't use kunpck for vXi1 concat_vectors if the upper bits are undef.

[Craig Topper via llvm-commits]

Author: ctopper
Date: Mon Dec  4 17:28:06 2017
New Revision: 319726

URL: http://llvm.org/viewvc/llvm-project?rev=319726&view=rev
Log:
[X86] Don't use kunpck for vXi1 concat_vectors if the upper bits are undef.

This can be efficiently selected by a COPY_TO_REGCLASS without the need for an extra instruction.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/avx512-skx-insert-subvec.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=319726&r1=319725&r2=319726&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Dec  4 17:28:06 2017
@@ -8318,6 +8318,11 @@ static SDValue LowerCONCAT_VECTORSvXi1(S
          V1.getValueType().getVectorNumElements() == NumElems/2 &&
          "Unexpected operands in CONCAT_VECTORS");
 
+  // If this can be done with a subreg insert do that first.
+  SDValue ZeroIdx = DAG.getIntPtrConstant(0, dl);
+  if (V2.isUndef())
+    return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Undef, V1, ZeroIdx);
+
   if (ResVT.getSizeInBits() >= 16)
     return Op; // The operation is legal with KUNPCK
 
@@ -8327,9 +8332,6 @@ static SDValue LowerCONCAT_VECTORSvXi1(S
   if (IsZeroV1 && IsZeroV2)
     return ZeroVec;
 
-  SDValue ZeroIdx = DAG.getIntPtrConstant(0, dl);
-  if (V2.isUndef())
-    return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, Undef, V1, ZeroIdx);
   if (IsZeroV2)
     return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResVT, ZeroVec, V1, ZeroIdx);
 

Modified: llvm/trunk/test/CodeGen/X86/avx512-skx-insert-subvec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-skx-insert-subvec.ll?rev=319726&r1=319725&r2=319726&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-skx-insert-subvec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-skx-insert-subvec.ll Mon Dec  4 17:28:06 2017
@@ -100,7 +100,6 @@ define <16 x i1> @test6(<2 x i1> %a, <2
 ; CHECK-NEXT:    kshiftlb $2, %k0, %k0
 ; CHECK-NEXT:    kshiftrb $2, %k0, %k0
 ; CHECK-NEXT:    korb %k1, %k0, %k0
-; CHECK-NEXT:    kunpckbw %k0, %k0, %k0
 ; CHECK-NEXT:    vpmovm2b %k0, %xmm0
 ; CHECK-NEXT:    retq
 
@@ -119,8 +118,6 @@ define <32 x i1> @test7(<4 x i1> %a, <4
 ; CHECK-NEXT:    kshiftlb $4, %k0, %k0
 ; CHECK-NEXT:    kshiftrb $4, %k0, %k0
 ; CHECK-NEXT:    korb %k1, %k0, %k0
-; CHECK-NEXT:    kunpckbw %k0, %k0, %k0
-; CHECK-NEXT:    kunpckwd %k0, %k0, %k0
 ; CHECK-NEXT:    vpmovm2b %k0, %ymm0
 ; CHECK-NEXT:    retq