[llvm] r319665 - [CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 4 09:18:56 PST 2017
Modified: llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-interleaved-access.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define <4 x double> @load_factorf64_4(<16 x double>* %ptr) {
; AVX1-LABEL: load_factorf64_4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovupd (%rdi), %ymm0
; AVX1-NEXT: vmovupd 32(%rdi), %ymm1
; AVX1-NEXT: vmovupd 64(%rdi), %ymm2
@@ -22,7 +22,7 @@ define <4 x double> @load_factorf64_4(<1
; AVX1-NEXT: retq
;
; AVX-LABEL: load_factorf64_4:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovupd (%rdi), %ymm0
; AVX-NEXT: vmovupd 32(%rdi), %ymm1
; AVX-NEXT: vmovupd 64(%rdi), %ymm2
@@ -50,7 +50,7 @@ define <4 x double> @load_factorf64_4(<1
define <4 x double> @load_factorf64_2(<16 x double>* %ptr) {
; AVX1-LABEL: load_factorf64_2:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovupd (%rdi), %ymm0
; AVX1-NEXT: vmovupd 32(%rdi), %ymm1
; AVX1-NEXT: vmovupd 64(%rdi), %ymm2
@@ -65,7 +65,7 @@ define <4 x double> @load_factorf64_2(<1
; AVX1-NEXT: retq
;
; AVX-LABEL: load_factorf64_2:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovupd (%rdi), %ymm0
; AVX-NEXT: vmovupd 32(%rdi), %ymm1
; AVX-NEXT: vmovupd 64(%rdi), %ymm2
@@ -87,7 +87,7 @@ define <4 x double> @load_factorf64_2(<1
define <4 x double> @load_factorf64_1(<16 x double>* %ptr) {
; AVX1-LABEL: load_factorf64_1:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovupd (%rdi), %ymm0
; AVX1-NEXT: vmovupd 32(%rdi), %ymm1
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[0,1],mem[0,1]
@@ -97,7 +97,7 @@ define <4 x double> @load_factorf64_1(<1
; AVX1-NEXT: retq
;
; AVX-LABEL: load_factorf64_1:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovupd (%rdi), %ymm0
; AVX-NEXT: vmovupd 32(%rdi), %ymm1
; AVX-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[0,1],mem[0,1]
@@ -114,7 +114,7 @@ define <4 x double> @load_factorf64_1(<1
define <4 x i64> @load_factori64_4(<16 x i64>* %ptr) {
; AVX1-LABEL: load_factori64_4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovups (%rdi), %ymm0
; AVX1-NEXT: vmovups 32(%rdi), %ymm1
; AVX1-NEXT: vmovups 64(%rdi), %ymm2
@@ -141,7 +141,7 @@ define <4 x i64> @load_factori64_4(<16 x
; AVX1-NEXT: retq
;
; AVX-LABEL: load_factori64_4:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqu (%rdi), %ymm0
; AVX-NEXT: vmovdqu 32(%rdi), %ymm1
; AVX-NEXT: vmovdqu 64(%rdi), %ymm2
@@ -171,7 +171,7 @@ define <4 x i64> @load_factori64_4(<16 x
define void @store_factorf64_4(<16 x double>* %ptr, <4 x double> %v0, <4 x double> %v1, <4 x double> %v2, <4 x double> %v3) {
; AVX1-LABEL: store_factorf64_4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm4
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm5
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm2[2,3]
@@ -188,7 +188,7 @@ define void @store_factorf64_4(<16 x dou
; AVX1-NEXT: retq
;
; AVX2-LABEL: store_factorf64_4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm4
; AVX2-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm5
; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm2[2,3]
@@ -205,7 +205,7 @@ define void @store_factorf64_4(<16 x dou
; AVX2-NEXT: retq
;
; AVX512-LABEL: store_factorf64_4:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm4
; AVX512-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm5
; AVX512-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm2[2,3]
@@ -229,7 +229,7 @@ define void @store_factorf64_4(<16 x dou
define void @store_factori64_4(<16 x i64>* %ptr, <4 x i64> %v0, <4 x i64> %v1, <4 x i64> %v2, <4 x i64> %v3) {
; AVX1-LABEL: store_factori64_4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm4
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm5
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm2[2,3]
@@ -246,7 +246,7 @@ define void @store_factori64_4(<16 x i64
; AVX1-NEXT: retq
;
; AVX2-LABEL: store_factori64_4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm4
; AVX2-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm5
; AVX2-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm2[2,3]
@@ -263,7 +263,7 @@ define void @store_factori64_4(<16 x i64
; AVX2-NEXT: retq
;
; AVX512-LABEL: store_factori64_4:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm4
; AVX512-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm5
; AVX512-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3],ymm2[2,3]
@@ -288,7 +288,7 @@ define void @store_factori64_4(<16 x i64
define void @interleaved_store_vf32_i8_stride4(<32 x i8> %x1, <32 x i8> %x2, <32 x i8> %x3, <32 x i8> %x4, <128 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf32_i8_stride4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm6
@@ -325,7 +325,7 @@ define void @interleaved_store_vf32_i8_s
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_store_vf32_i8_stride4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpunpcklbw {{.*#+}} ymm4 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[16],ymm1[16],ymm0[17],ymm1[17],ymm0[18],ymm1[18],ymm0[19],ymm1[19],ymm0[20],ymm1[20],ymm0[21],ymm1[21],ymm0[22],ymm1[22],ymm0[23],ymm1[23]
; AVX2-NEXT: vpunpckhbw {{.*#+}} ymm0 = ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15],ymm0[24],ymm1[24],ymm0[25],ymm1[25],ymm0[26],ymm1[26],ymm0[27],ymm1[27],ymm0[28],ymm1[28],ymm0[29],ymm1[29],ymm0[30],ymm1[30],ymm0[31],ymm1[31]
; AVX2-NEXT: vpunpcklbw {{.*#+}} ymm1 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[4],ymm3[4],ymm2[5],ymm3[5],ymm2[6],ymm3[6],ymm2[7],ymm3[7],ymm2[16],ymm3[16],ymm2[17],ymm3[17],ymm2[18],ymm3[18],ymm2[19],ymm3[19],ymm2[20],ymm3[20],ymm2[21],ymm3[21],ymm2[22],ymm3[22],ymm2[23],ymm3[23]
@@ -346,7 +346,7 @@ define void @interleaved_store_vf32_i8_s
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_store_vf32_i8_stride4:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpunpcklbw {{.*#+}} ymm4 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[4],ymm1[4],ymm0[5],ymm1[5],ymm0[6],ymm1[6],ymm0[7],ymm1[7],ymm0[16],ymm1[16],ymm0[17],ymm1[17],ymm0[18],ymm1[18],ymm0[19],ymm1[19],ymm0[20],ymm1[20],ymm0[21],ymm1[21],ymm0[22],ymm1[22],ymm0[23],ymm1[23]
; AVX512-NEXT: vpunpckhbw {{.*#+}} ymm0 = ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11],ymm0[12],ymm1[12],ymm0[13],ymm1[13],ymm0[14],ymm1[14],ymm0[15],ymm1[15],ymm0[24],ymm1[24],ymm0[25],ymm1[25],ymm0[26],ymm1[26],ymm0[27],ymm1[27],ymm0[28],ymm1[28],ymm0[29],ymm1[29],ymm0[30],ymm1[30],ymm0[31],ymm1[31]
; AVX512-NEXT: vpunpcklbw {{.*#+}} ymm1 = ymm2[0],ymm3[0],ymm2[1],ymm3[1],ymm2[2],ymm3[2],ymm2[3],ymm3[3],ymm2[4],ymm3[4],ymm2[5],ymm3[5],ymm2[6],ymm3[6],ymm2[7],ymm3[7],ymm2[16],ymm3[16],ymm2[17],ymm3[17],ymm2[18],ymm3[18],ymm2[19],ymm3[19],ymm2[20],ymm3[20],ymm2[21],ymm3[21],ymm2[22],ymm3[22],ymm2[23],ymm3[23]
@@ -374,7 +374,7 @@ ret void
define void @interleaved_store_vf16_i8_stride4(<16 x i8> %x1, <16 x i8> %x2, <16 x i8> %x3, <16 x i8> %x4, <64 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf16_i8_stride4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
@@ -391,7 +391,7 @@ define void @interleaved_store_vf16_i8_s
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_store_vf16_i8_stride4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX2-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
@@ -408,7 +408,7 @@ define void @interleaved_store_vf16_i8_s
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_store_vf16_i8_stride4:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
; AVX512-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
; AVX512-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7]
@@ -432,7 +432,7 @@ ret void
define <8 x i8> @interleaved_load_vf8_i8_stride4(<32 x i8>* %ptr) {
; AVX1-LABEL: interleaved_load_vf8_i8_stride4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqu (%rdi), %ymm0
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
@@ -460,7 +460,7 @@ define <8 x i8> @interleaved_load_vf8_i8
; AVX1-NEXT: retq
;
; AVX-LABEL: interleaved_load_vf8_i8_stride4:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqu (%rdi), %ymm0
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm2
@@ -500,7 +500,7 @@ define <8 x i8> @interleaved_load_vf8_i8
define <16 x i1> @interleaved_load_vf16_i8_stride4(<64 x i8>* %ptr) {
; AVX1-LABEL: interleaved_load_vf16_i8_stride4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %ymm0
; AVX1-NEXT: vmovdqa 32(%rdi), %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
@@ -551,7 +551,7 @@ define <16 x i1> @interleaved_load_vf16_
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_load_vf16_i8_stride4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqa (%rdi), %ymm0
; AVX2-NEXT: vmovdqa 32(%rdi), %ymm1
; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <u,u,u,u,0,4,8,12,u,u,u,u,u,u,u,u>
@@ -602,7 +602,7 @@ define <16 x i1> @interleaved_load_vf16_
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_load_vf16_i8_stride4:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0
; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
; AVX512-NEXT: vextracti128 $1, %ymm1, %xmm2
@@ -669,7 +669,7 @@ define <16 x i1> @interleaved_load_vf16_
define <32 x i1> @interleaved_load_vf32_i8_stride4(<128 x i8>* %ptr) {
; AVX1-LABEL: interleaved_load_vf32_i8_stride4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %ymm10
; AVX1-NEXT: vmovdqa 32(%rdi), %ymm13
; AVX1-NEXT: vmovdqa 64(%rdi), %ymm2
@@ -769,7 +769,7 @@ define <32 x i1> @interleaved_load_vf32_
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_load_vf32_i8_stride4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqa (%rdi), %ymm11
; AVX2-NEXT: vmovdqa 32(%rdi), %ymm1
; AVX2-NEXT: vmovdqa 64(%rdi), %ymm7
@@ -867,7 +867,7 @@ define <32 x i1> @interleaved_load_vf32_
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_load_vf32_i8_stride4:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa64 (%rdi), %zmm0
; AVX512-NEXT: vmovdqa64 64(%rdi), %zmm7
; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
@@ -984,7 +984,7 @@ define <32 x i1> @interleaved_load_vf32_
define void @interleaved_store_vf8_i8_stride4(<8 x i8> %x1, <8 x i8> %x2, <8 x i8> %x3, <8 x i8> %x4, <32 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf8_i8_stride4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm4, %xmm1, %xmm1
; AVX1-NEXT: vpshufb %xmm4, %xmm0, %xmm0
@@ -1000,7 +1000,7 @@ define void @interleaved_store_vf8_i8_st
; AVX1-NEXT: retq
;
; AVX-LABEL: interleaved_store_vf8_i8_stride4:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
; AVX-NEXT: vpshufb %xmm4, %xmm1, %xmm1
; AVX-NEXT: vpshufb %xmm4, %xmm0, %xmm0
@@ -1023,7 +1023,7 @@ ret void
define <32 x i8> @interleaved_load_vf32_i8_stride3(<96 x i8>* %ptr){
; AVX1-LABEL: interleaved_load_vf32_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %xmm0
; AVX1-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX1-NEXT: vmovdqa 32(%rdi), %xmm2
@@ -1068,7 +1068,7 @@ define <32 x i8> @interleaved_load_vf32_
; AVX1-NEXT: retq
;
; AVX-LABEL: interleaved_load_vf32_i8_stride3:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa (%rdi), %xmm0
; AVX-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX-NEXT: vmovdqa 32(%rdi), %xmm2
@@ -1101,7 +1101,7 @@ define <32 x i8> @interleaved_load_vf32_
define <16 x i8> @interleaved_load_vf16_i8_stride3(<48 x i8>* %ptr){
; AVX1-LABEL: interleaved_load_vf16_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %xmm0
; AVX1-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX1-NEXT: vmovdqa 32(%rdi), %xmm2
@@ -1123,7 +1123,7 @@ define <16 x i8> @interleaved_load_vf16_
; AVX1-NEXT: retq
;
; AVX-LABEL: interleaved_load_vf16_i8_stride3:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa (%rdi), %xmm0
; AVX-NEXT: vmovdqa 16(%rdi), %xmm1
; AVX-NEXT: vmovdqa 32(%rdi), %xmm2
@@ -1154,7 +1154,7 @@ define <16 x i8> @interleaved_load_vf16_
define <8 x i8> @interleaved_load_vf8_i8_stride3(<24 x i8>* %ptr){
; AVX1-LABEL: interleaved_load_vf8_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa (%rdi), %ymm0
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpshufb {{.*#+}} xmm2 = zero,xmm1[u],zero,xmm1[u],zero,xmm1[u],zero,xmm1[u],zero,xmm1[u],zero,xmm1[u,2,u,5,u]
@@ -1172,7 +1172,7 @@ define <8 x i8> @interleaved_load_vf8_i8
; AVX1-NEXT: retq
;
; AVX-LABEL: interleaved_load_vf8_i8_stride3:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa (%rdi), %ymm0
; AVX-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX-NEXT: vpshufb {{.*#+}} xmm2 = zero,xmm1[u],zero,xmm1[u],zero,xmm1[u],zero,xmm1[u],zero,xmm1[u],zero,xmm1[u,2,u,5,u]
@@ -1199,7 +1199,7 @@ define <8 x i8> @interleaved_load_vf8_i8
define void @interleaved_store_vf8_i8_stride3(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c, <24 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf8_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
; AVX1-NEXT: vpshufb %xmm3, %xmm1, %xmm1
; AVX1-NEXT: vpshufb %xmm3, %xmm0, %xmm0
@@ -1216,7 +1216,7 @@ define void @interleaved_store_vf8_i8_st
; AVX1-NEXT: retq
;
; AVX-LABEL: interleaved_store_vf8_i8_stride3:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
; AVX-NEXT: vpshufb %xmm3, %xmm1, %xmm1
; AVX-NEXT: vpshufb %xmm3, %xmm0, %xmm0
@@ -1240,7 +1240,7 @@ ret void
define void @interleaved_store_vf16_i8_stride3(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <48 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf16_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5]
; AVX1-NEXT: vpalignr {{.*#+}} xmm1 = xmm1[11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10]
; AVX1-NEXT: vpalignr {{.*#+}} xmm3 = xmm0[5,6,7,8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4]
@@ -1264,7 +1264,7 @@ define void @interleaved_store_vf16_i8_s
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_store_vf16_i8_stride3:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5]
; AVX2-NEXT: vpalignr {{.*#+}} xmm1 = xmm1[11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10]
; AVX2-NEXT: vpalignr {{.*#+}} xmm3 = xmm0[5,6,7,8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4]
@@ -1288,7 +1288,7 @@ define void @interleaved_store_vf16_i8_s
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_store_vf16_i8_stride3:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5]
; AVX512-NEXT: vpalignr {{.*#+}} xmm1 = xmm1[11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10]
; AVX512-NEXT: vpalignr {{.*#+}} xmm3 = xmm0[5,6,7,8,9,10,11,12,13,14,15],xmm2[0,1,2,3,4]
@@ -1320,7 +1320,7 @@ ret void
define void @interleaved_store_vf32_i8_stride3(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c, <96 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf32_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpalignr {{.*#+}} xmm3 = xmm3[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5]
; AVX1-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5]
@@ -1357,7 +1357,7 @@ define void @interleaved_store_vf32_i8_s
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_store_vf32_i8_stride3:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpalignr {{.*#+}} ymm0 = ymm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,22,23,24,25,26,27,28,29,30,31,16,17,18,19,20,21]
; AVX2-NEXT: vpalignr {{.*#+}} ymm1 = ymm1[11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,27,28,29,30,31,16,17,18,19,20,21,22,23,24,25,26]
; AVX2-NEXT: vpalignr {{.*#+}} ymm3 = ymm0[5,6,7,8,9,10,11,12,13,14,15],ymm2[0,1,2,3,4],ymm0[21,22,23,24,25,26,27,28,29,30,31],ymm2[16,17,18,19,20]
@@ -1380,7 +1380,7 @@ define void @interleaved_store_vf32_i8_s
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_store_vf32_i8_stride3:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpalignr {{.*#+}} ymm0 = ymm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,22,23,24,25,26,27,28,29,30,31,16,17,18,19,20,21]
; AVX512-NEXT: vpalignr {{.*#+}} ymm1 = ymm1[11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,27,28,29,30,31,16,17,18,19,20,21,22,23,24,25,26]
; AVX512-NEXT: vpalignr {{.*#+}} ymm3 = ymm0[5,6,7,8,9,10,11,12,13,14,15],ymm2[0,1,2,3,4],ymm0[21,22,23,24,25,26,27,28,29,30,31],ymm2[16,17,18,19,20]
@@ -1410,7 +1410,7 @@ ret void
define void @interleaved_store_vf64_i8_stride3(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <192 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf64_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm6
; AVX1-NEXT: vpalignr {{.*#+}} xmm8 = xmm6[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5]
; AVX1-NEXT: vpalignr {{.*#+}} xmm9 = xmm1[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5]
@@ -1478,7 +1478,7 @@ define void @interleaved_store_vf64_i8_s
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_store_vf64_i8_stride3:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpalignr {{.*#+}} ymm1 = ymm1[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,22,23,24,25,26,27,28,29,30,31,16,17,18,19,20,21]
; AVX2-NEXT: vpalignr {{.*#+}} ymm0 = ymm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,22,23,24,25,26,27,28,29,30,31,16,17,18,19,20,21]
; AVX2-NEXT: vpalignr {{.*#+}} ymm3 = ymm3[11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,27,28,29,30,31,16,17,18,19,20,21,22,23,24,25,26]
@@ -1518,7 +1518,7 @@ define void @interleaved_store_vf64_i8_s
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_store_vf64_i8_stride3:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpalignr {{.*#+}} zmm0 = zmm0[6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,22,23,24,25,26,27,28,29,30,31,16,17,18,19,20,21,38,39,40,41,42,43,44,45,46,47,32,33,34,35,36,37,54,55,56,57,58,59,60,61,62,63,48,49,50,51,52,53]
; AVX512-NEXT: vpalignr {{.*#+}} zmm1 = zmm1[11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,27,28,29,30,31,16,17,18,19,20,21,22,23,24,25,26,43,44,45,46,47,32,33,34,35,36,37,38,39,40,41,42,59,60,61,62,63,48,49,50,51,52,53,54,55,56,57,58]
; AVX512-NEXT: vpalignr {{.*#+}} zmm3 = zmm0[5,6,7,8,9,10,11,12,13,14,15],zmm2[0,1,2,3,4],zmm0[21,22,23,24,25,26,27,28,29,30,31],zmm2[16,17,18,19,20],zmm0[37,38,39,40,41,42,43,44,45,46,47],zmm2[32,33,34,35,36],zmm0[53,54,55,56,57,58,59,60,61,62,63],zmm2[48,49,50,51,52]
@@ -1560,7 +1560,7 @@ ret void
define <64 x i8> @interleaved_load_vf64_i8_stride3(<192 x i8>* %ptr){
; AVX1-LABEL: interleaved_load_vf64_i8_stride3:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqu (%rdi), %xmm11
; AVX1-NEXT: vmovdqu 16(%rdi), %xmm10
; AVX1-NEXT: vmovdqu 32(%rdi), %xmm8
@@ -1643,7 +1643,7 @@ define <64 x i8> @interleaved_load_vf64_
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_load_vf64_i8_stride3:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqu (%rdi), %xmm0
; AVX2-NEXT: vmovdqu 16(%rdi), %xmm1
; AVX2-NEXT: vmovdqu 32(%rdi), %xmm2
@@ -1686,7 +1686,7 @@ define <64 x i8> @interleaved_load_vf64_
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_load_vf64_i8_stride3:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqu (%rdi), %xmm0
; AVX512-NEXT: vmovdqu 16(%rdi), %xmm1
; AVX512-NEXT: vmovdqu 32(%rdi), %xmm2
@@ -1736,7 +1736,7 @@ ret <64 x i8> %add2
define void @interleaved_store_vf64_i8_stride4(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c,<64 x i8> %d, <256 x i8>* %p) {
; AVX1-LABEL: interleaved_store_vf64_i8_stride4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: subq $24, %rsp
; AVX1-NEXT: .cfi_def_cfa_offset 32
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm8 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
@@ -1820,7 +1820,7 @@ define void @interleaved_store_vf64_i8_s
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleaved_store_vf64_i8_stride4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpunpcklbw {{.*#+}} ymm8 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[16],ymm2[16],ymm0[17],ymm2[17],ymm0[18],ymm2[18],ymm0[19],ymm2[19],ymm0[20],ymm2[20],ymm0[21],ymm2[21],ymm0[22],ymm2[22],ymm0[23],ymm2[23]
; AVX2-NEXT: vpunpcklbw {{.*#+}} ymm9 = ymm1[0],ymm3[0],ymm1[1],ymm3[1],ymm1[2],ymm3[2],ymm1[3],ymm3[3],ymm1[4],ymm3[4],ymm1[5],ymm3[5],ymm1[6],ymm3[6],ymm1[7],ymm3[7],ymm1[16],ymm3[16],ymm1[17],ymm3[17],ymm1[18],ymm3[18],ymm1[19],ymm3[19],ymm1[20],ymm3[20],ymm1[21],ymm3[21],ymm1[22],ymm3[22],ymm1[23],ymm3[23]
; AVX2-NEXT: vpunpckhbw {{.*#+}} ymm0 = ymm0[8],ymm2[8],ymm0[9],ymm2[9],ymm0[10],ymm2[10],ymm0[11],ymm2[11],ymm0[12],ymm2[12],ymm0[13],ymm2[13],ymm0[14],ymm2[14],ymm0[15],ymm2[15],ymm0[24],ymm2[24],ymm0[25],ymm2[25],ymm0[26],ymm2[26],ymm0[27],ymm2[27],ymm0[28],ymm2[28],ymm0[29],ymm2[29],ymm0[30],ymm2[30],ymm0[31],ymm2[31]
@@ -1857,7 +1857,7 @@ define void @interleaved_store_vf64_i8_s
; AVX2-NEXT: retq
;
; AVX512-LABEL: interleaved_store_vf64_i8_stride4:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpunpcklbw {{.*#+}} zmm4 = zmm0[0],zmm1[0],zmm0[1],zmm1[1],zmm0[2],zmm1[2],zmm0[3],zmm1[3],zmm0[4],zmm1[4],zmm0[5],zmm1[5],zmm0[6],zmm1[6],zmm0[7],zmm1[7],zmm0[16],zmm1[16],zmm0[17],zmm1[17],zmm0[18],zmm1[18],zmm0[19],zmm1[19],zmm0[20],zmm1[20],zmm0[21],zmm1[21],zmm0[22],zmm1[22],zmm0[23],zmm1[23],zmm0[32],zmm1[32],zmm0[33],zmm1[33],zmm0[34],zmm1[34],zmm0[35],zmm1[35],zmm0[36],zmm1[36],zmm0[37],zmm1[37],zmm0[38],zmm1[38],zmm0[39],zmm1[39],zmm0[48],zmm1[48],zmm0[49],zmm1[49],zmm0[50],zmm1[50],zmm0[51],zmm1[51],zmm0[52],zmm1[52],zmm0[53],zmm1[53],zmm0[54],zmm1[54],zmm0[55],zmm1[55]
; AVX512-NEXT: vpunpckhbw {{.*#+}} zmm0 = zmm0[8],zmm1[8],zmm0[9],zmm1[9],zmm0[10],zmm1[10],zmm0[11],zmm1[11],zmm0[12],zmm1[12],zmm0[13],zmm1[13],zmm0[14],zmm1[14],zmm0[15],zmm1[15],zmm0[24],zmm1[24],zmm0[25],zmm1[25],zmm0[26],zmm1[26],zmm0[27],zmm1[27],zmm0[28],zmm1[28],zmm0[29],zmm1[29],zmm0[30],zmm1[30],zmm0[31],zmm1[31],zmm0[40],zmm1[40],zmm0[41],zmm1[41],zmm0[42],zmm1[42],zmm0[43],zmm1[43],zmm0[44],zmm1[44],zmm0[45],zmm1[45],zmm0[46],zmm1[46],zmm0[47],zmm1[47],zmm0[56],zmm1[56],zmm0[57],zmm1[57],zmm0[58],zmm1[58],zmm0[59],zmm1[59],zmm0[60],zmm1[60],zmm0[61],zmm1[61],zmm0[62],zmm1[62],zmm0[63],zmm1[63]
; AVX512-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm2[0],zmm3[0],zmm2[1],zmm3[1],zmm2[2],zmm3[2],zmm2[3],zmm3[3],zmm2[4],zmm3[4],zmm2[5],zmm3[5],zmm2[6],zmm3[6],zmm2[7],zmm3[7],zmm2[16],zmm3[16],zmm2[17],zmm3[17],zmm2[18],zmm3[18],zmm2[19],zmm3[19],zmm2[20],zmm3[20],zmm2[21],zmm3[21],zmm2[22],zmm3[22],zmm2[23],zmm3[23],zmm2[32],zmm3[32],zmm2[33],zmm3[33],zmm2[34],zmm3[34],zmm2[35],zmm3[35],zmm2[36],zmm3[36],zmm2[37],zmm3[37],zmm2[38],zmm3[38],zmm2[39],zmm3[39],zmm2[48],zmm3[48],zmm2[49],zmm3[49],zmm2[50],zmm3[50],zmm2[51],zmm3[51],zmm2[52],zmm3[52],zmm2[53],zmm3[53],zmm2[54],zmm3[54],zmm2[55],zmm3[55]
Modified: llvm/trunk/test/CodeGen/X86/x86-interleaved-check.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-interleaved-check.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-interleaved-check.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-interleaved-check.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define void @validate() {
; AVX-LABEL: validate:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
entry:
%0 = bitcast i8 addrspace(1)* undef to <96 x i8> addrspace(1)*
%wide.vec = load <96 x i8>, <96 x i8> addrspace(1)* %0, align 1
Modified: llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@
;; (that are modified by the function) should be preserved (%rdx and %xmm1).
define x86_64_sysvcc i32 @bar(i32 %a0, i32 %a1, float %b0) #0 {
; CHECK-LABEL: bar:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rdx
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp) # 16-byte Spill
Modified: llvm/trunk/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ define <4 x float> @foo(<4 x float> %val
; CHECK-NEXT: .long 1065353216 ## 0x3f800000
; CHECK-NEXT: .long 1065353216 ## 0x3f800000
; CHECK-LABEL: foo:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: cmpeqps %xmm1, %xmm0
; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq
@@ -27,7 +27,7 @@ define void @foo1(<4 x float> %val, <4 x
; CHECK-NEXT: .long 1 ## 0x1
; CHECK-NEXT: .long 1 ## 0x1
; CHECK-LABEL: foo1:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: cmpeqps %xmm1, %xmm0
; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
@@ -51,7 +51,7 @@ define void @foo2(<4 x float>* noalias %
; CHECK-NEXT: .long 1086324736 ## float 6
; CHECK-NEXT: .long 1088421888 ## float 7
; CHECK-LABEL: foo2:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00]
; CHECK-NEXT: movaps %xmm0, (%rdi)
; CHECK-NEXT: retq
@@ -69,7 +69,7 @@ define <4 x float> @foo3(<4 x float> %va
; CHECK-NEXT: .long 1065353216 ## 0x3f800000
; CHECK-NEXT: .long 0 ## 0x0
; CHECK-LABEL: foo3:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: cmpeqps %xmm1, %xmm0
; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq
@@ -88,7 +88,7 @@ define void @foo4(<4 x float>* noalias %
; CHECK-NEXT: .long 1124073472 ## float 128
; CHECK-NEXT: .long 1132396544 ## float 255
; CHECK-LABEL: foo4:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,1.270000e+02,1.280000e+02,2.550000e+02]
; CHECK-NEXT: movaps %xmm0, (%rdi)
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/x86-shifts.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-shifts.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-shifts.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-shifts.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define <4 x i32> @shl4(<4 x i32> %A) nounwind {
; X32-LABEL: shl4:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: pslld $2, %xmm1
; X32-NEXT: paddd %xmm0, %xmm0
@@ -14,7 +14,7 @@ define <4 x i32> @shl4(<4 x i32> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: shl4:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: pslld $2, %xmm1
; X64-NEXT: paddd %xmm0, %xmm0
@@ -29,7 +29,7 @@ entry:
define <4 x i32> @shr4(<4 x i32> %A) nounwind {
; X32-LABEL: shr4:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psrld $2, %xmm1
; X32-NEXT: psrld $1, %xmm0
@@ -37,7 +37,7 @@ define <4 x i32> @shr4(<4 x i32> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: shr4:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psrld $2, %xmm1
; X64-NEXT: psrld $1, %xmm0
@@ -52,7 +52,7 @@ entry:
define <4 x i32> @sra4(<4 x i32> %A) nounwind {
; X32-LABEL: sra4:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psrad $2, %xmm1
; X32-NEXT: psrad $1, %xmm0
@@ -60,7 +60,7 @@ define <4 x i32> @sra4(<4 x i32> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: sra4:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psrad $2, %xmm1
; X64-NEXT: psrad $1, %xmm0
@@ -75,7 +75,7 @@ entry:
define <2 x i64> @shl2(<2 x i64> %A) nounwind {
; X32-LABEL: shl2:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psllq $2, %xmm1
; X32-NEXT: psllq $9, %xmm0
@@ -83,7 +83,7 @@ define <2 x i64> @shl2(<2 x i64> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: shl2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psllq $2, %xmm1
; X64-NEXT: psllq $9, %xmm0
@@ -98,7 +98,7 @@ entry:
define <2 x i64> @shr2(<2 x i64> %A) nounwind {
; X32-LABEL: shr2:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psrlq $8, %xmm1
; X32-NEXT: psrlq $1, %xmm0
@@ -106,7 +106,7 @@ define <2 x i64> @shr2(<2 x i64> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: shr2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psrlq $8, %xmm1
; X64-NEXT: psrlq $1, %xmm0
@@ -122,7 +122,7 @@ entry:
define <8 x i16> @shl8(<8 x i16> %A) nounwind {
; X32-LABEL: shl8:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psllw $2, %xmm1
; X32-NEXT: paddw %xmm0, %xmm0
@@ -130,7 +130,7 @@ define <8 x i16> @shl8(<8 x i16> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: shl8:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psllw $2, %xmm1
; X64-NEXT: paddw %xmm0, %xmm0
@@ -145,7 +145,7 @@ entry:
define <8 x i16> @shr8(<8 x i16> %A) nounwind {
; X32-LABEL: shr8:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psrlw $2, %xmm1
; X32-NEXT: psrlw $1, %xmm0
@@ -153,7 +153,7 @@ define <8 x i16> @shr8(<8 x i16> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: shr8:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psrlw $2, %xmm1
; X64-NEXT: psrlw $1, %xmm0
@@ -168,7 +168,7 @@ entry:
define <8 x i16> @sra8(<8 x i16> %A) nounwind {
; X32-LABEL: sra8:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psraw $2, %xmm1
; X32-NEXT: psraw $1, %xmm0
@@ -176,7 +176,7 @@ define <8 x i16> @sra8(<8 x i16> %A) nou
; X32-NEXT: retl
;
; X64-LABEL: sra8:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psraw $2, %xmm1
; X64-NEXT: psraw $1, %xmm0
@@ -194,7 +194,7 @@ entry:
define <8 x i16> @sll8_nosplat(<8 x i16> %A) nounwind {
; X32-LABEL: sll8_nosplat:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa {{.*#+}} xmm1 = [2,4,8,64,4,4,4,4]
; X32-NEXT: pmullw %xmm0, %xmm1
; X32-NEXT: pmullw {{\.LCPI.*}}, %xmm0
@@ -202,7 +202,7 @@ define <8 x i16> @sll8_nosplat(<8 x i16>
; X32-NEXT: retl
;
; X64-LABEL: sll8_nosplat:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa {{.*#+}} xmm1 = [2,4,8,64,4,4,4,4]
; X64-NEXT: pmullw %xmm0, %xmm1
; X64-NEXT: pmullw {{.*}}(%rip), %xmm0
@@ -218,7 +218,7 @@ entry:
define <2 x i64> @shr2_nosplat(<2 x i64> %A) nounwind {
; X32-LABEL: shr2_nosplat:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm2
; X32-NEXT: psrlq $8, %xmm2
; X32-NEXT: movdqa %xmm0, %xmm1
@@ -230,7 +230,7 @@ define <2 x i64> @shr2_nosplat(<2 x i64>
; X32-NEXT: retl
;
; X64-LABEL: shr2_nosplat:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm2
; X64-NEXT: psrlq $8, %xmm2
; X64-NEXT: movdqa %xmm0, %xmm1
@@ -252,7 +252,7 @@ entry:
define <2 x i32> @shl2_other(<2 x i32> %A) nounwind {
; X32-LABEL: shl2_other:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psllq $2, %xmm1
; X32-NEXT: psllq $9, %xmm0
@@ -260,7 +260,7 @@ define <2 x i32> @shl2_other(<2 x i32> %
; X32-NEXT: retl
;
; X64-LABEL: shl2_other:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psllq $2, %xmm1
; X64-NEXT: psllq $9, %xmm0
@@ -275,7 +275,7 @@ entry:
define <2 x i32> @shr2_other(<2 x i32> %A) nounwind {
; X32-LABEL: shr2_other:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: pand {{\.LCPI.*}}, %xmm0
; X32-NEXT: movdqa %xmm0, %xmm1
; X32-NEXT: psrlq $8, %xmm1
@@ -284,7 +284,7 @@ define <2 x i32> @shr2_other(<2 x i32> %
; X32-NEXT: retl
;
; X64-LABEL: shr2_other:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: pand {{.*}}(%rip), %xmm0
; X64-NEXT: movdqa %xmm0, %xmm1
; X64-NEXT: psrlq $8, %xmm1
@@ -300,13 +300,13 @@ entry:
define <16 x i8> @shl9(<16 x i8> %A) nounwind {
; X32-LABEL: shl9:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: psllw $3, %xmm0
; X32-NEXT: pand {{\.LCPI.*}}, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: shl9:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: psllw $3, %xmm0
; X64-NEXT: pand {{.*}}(%rip), %xmm0
; X64-NEXT: retq
@@ -316,13 +316,13 @@ define <16 x i8> @shl9(<16 x i8> %A) nou
define <16 x i8> @shr9(<16 x i8> %A) nounwind {
; X32-LABEL: shr9:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: psrlw $3, %xmm0
; X32-NEXT: pand {{\.LCPI.*}}, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: shr9:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: psrlw $3, %xmm0
; X64-NEXT: pand {{.*}}(%rip), %xmm0
; X64-NEXT: retq
@@ -332,14 +332,14 @@ define <16 x i8> @shr9(<16 x i8> %A) nou
define <16 x i8> @sra_v16i8_7(<16 x i8> %A) nounwind {
; X32-LABEL: sra_v16i8_7:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pxor %xmm1, %xmm1
; X32-NEXT: pcmpgtb %xmm0, %xmm1
; X32-NEXT: movdqa %xmm1, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: sra_v16i8_7:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: pxor %xmm1, %xmm1
; X64-NEXT: pcmpgtb %xmm0, %xmm1
; X64-NEXT: movdqa %xmm1, %xmm0
@@ -350,7 +350,7 @@ define <16 x i8> @sra_v16i8_7(<16 x i8>
define <16 x i8> @sra_v16i8(<16 x i8> %A) nounwind {
; X32-LABEL: sra_v16i8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: psrlw $3, %xmm0
; X32-NEXT: pand {{\.LCPI.*}}, %xmm0
; X32-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
@@ -359,7 +359,7 @@ define <16 x i8> @sra_v16i8(<16 x i8> %A
; X32-NEXT: retl
;
; X64-LABEL: sra_v16i8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: psrlw $3, %xmm0
; X64-NEXT: pand {{.*}}(%rip), %xmm0
; X64-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
Modified: llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-shrink-wrapping.ll Mon Dec 4 09:18:51 2017
@@ -989,16 +989,16 @@ attributes #4 = { "no-frame-pointer-elim
; looking for the nearest common post-dominator of an "unreachable" block.
; CHECK-LABEL: infiniteLoopNoSuccessor:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; Make sure the prologue happens in the entry block.
; CHECK-NEXT: pushq %rbp
; ...
; Make sure we don't shrink-wrap.
-; CHECK: ## BB#1
+; CHECK: ## %bb.1
; CHECK-NOT: pushq %rbp
; ...
; Make sure the epilogue happens in the exit block.
-; CHECK: ## BB#5
+; CHECK: ## %bb.5
; CHECK: popq %rbp
; CHECK-NEXT: retq
define void @infiniteLoopNoSuccessor() #5 {
Modified: llvm/trunk/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@ target datalayout = "e-m:o-i64:64-f80:12
define <4 x float> @test_mm_broadcast_ss(float* readonly %__a){
; CHECK-LABEL: test_mm_broadcast_ss:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: vbroadcastss (%rdi), %xmm0
; CHECK-NEXT: retq
entry:
@@ -21,7 +21,7 @@ declare <8 x float> @llvm.x86.avx.vbroad
define <4 x double> @test_mm256_broadcast_sd(double* readonly %__a) {
; CHECK-LABEL: test_mm256_broadcast_sd:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: vbroadcastsd (%rdi), %ymm0
; CHECK-NEXT: retq
entry:
@@ -33,7 +33,7 @@ declare <4 x double> @llvm.x86.avx.vbroa
define <8 x float> @test_mm256_broadcast_ss(float* readonly %__a) {
; CHECK-LABEL: test_mm256_broadcast_ss:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: vbroadcastss (%rdi), %ymm0
; CHECK-NEXT: retq
entry:
Modified: llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x86-upgrade-avx2-vbroadcast.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ target datalayout = "e-m:o-i64:64-f80:12
define <4 x i64> @broadcast128(<2 x i64> %src) {
; CHECK-LABEL: broadcast128:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: ## kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; CHECK-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
Modified: llvm/trunk/test/CodeGen/X86/x87-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/x87-schedule.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/x87-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/x87-schedule.ll Mon Dec 4 09:18:51 2017
@@ -13,70 +13,70 @@
define void @test_f2xm1() optsize {
; GENERIC-LABEL: test_f2xm1:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: f2xm1
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_f2xm1:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: f2xm1 # sched: [99:49.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_f2xm1:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: f2xm1 # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_f2xm1:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: f2xm1 # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_f2xm1:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: f2xm1 # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_f2xm1:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: f2xm1 # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_f2xm1:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: f2xm1 # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_f2xm1:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: f2xm1 # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_f2xm1:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: f2xm1 # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_f2xm1:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: f2xm1 # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -87,70 +87,70 @@ define void @test_f2xm1() optsize {
define void @test_fabs() optsize {
; GENERIC-LABEL: test_fabs:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fabs
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fabs:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fabs # sched: [1:1.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fabs:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fabs # sched: [1:0.50]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fabs:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fabs # sched: [1:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fabs:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fabs # sched: [1:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fabs:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fabs # sched: [1:0.33]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fabs:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fabs # sched: [1:0.33]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fabs:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fabs # sched: [1:0.33]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fabs:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fabs # sched: [1:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fabs:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fabs # sched: [2:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -161,7 +161,7 @@ define void @test_fabs() optsize {
define void @test_fadd(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fadd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -173,7 +173,7 @@ define void @test_fadd(float *%a0, doubl
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fadd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -185,7 +185,7 @@ define void @test_fadd(float *%a0, doubl
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fadd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -197,7 +197,7 @@ define void @test_fadd(float *%a0, doubl
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fadd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -209,7 +209,7 @@ define void @test_fadd(float *%a0, doubl
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fadd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -221,7 +221,7 @@ define void @test_fadd(float *%a0, doubl
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fadd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -233,7 +233,7 @@ define void @test_fadd(float *%a0, doubl
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fadd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -245,7 +245,7 @@ define void @test_fadd(float *%a0, doubl
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fadd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -257,7 +257,7 @@ define void @test_fadd(float *%a0, doubl
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fadd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -269,7 +269,7 @@ define void @test_fadd(float *%a0, doubl
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fadd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -285,7 +285,7 @@ define void @test_fadd(float *%a0, doubl
define void @test_faddp_fiadd(i16 *%a0, i32 *%a1) optsize {
; GENERIC-LABEL: test_faddp_fiadd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -297,7 +297,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_faddp_fiadd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -309,7 +309,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_faddp_fiadd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -321,7 +321,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_faddp_fiadd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -333,7 +333,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_faddp_fiadd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -345,7 +345,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_faddp_fiadd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -357,7 +357,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_faddp_fiadd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -369,7 +369,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_faddp_fiadd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -381,7 +381,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_faddp_fiadd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -393,7 +393,7 @@ define void @test_faddp_fiadd(i16 *%a0,
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_faddp_fiadd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -412,70 +412,70 @@ define void @test_faddp_fiadd(i16 *%a0,
define void @test_fchs() optsize {
; GENERIC-LABEL: test_fchs:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fchs
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fchs:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fchs # sched: [1:1.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fchs:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fchs # sched: [1:0.50]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fchs:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fchs # sched: [1:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fchs:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fchs # sched: [1:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fchs:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fchs # sched: [1:0.33]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fchs:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fchs # sched: [1:0.33]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fchs:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fchs # sched: [1:0.33]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fchs:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fchs # sched: [1:0.50]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fchs:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fchs # sched: [1:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -486,7 +486,7 @@ define void @test_fchs() optsize {
define void @test_fclex_fnclex() optsize {
; GENERIC-LABEL: test_fclex_fnclex:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: wait
; GENERIC-NEXT: fnclex
@@ -495,7 +495,7 @@ define void @test_fclex_fnclex() optsize
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fclex_fnclex:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: wait # sched: [1:0.50]
; ATOM-NEXT: fnclex # sched: [25:12.50]
@@ -504,7 +504,7 @@ define void @test_fclex_fnclex() optsize
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fclex_fnclex:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: wait # sched: [100:1.00]
; SLM-NEXT: fnclex # sched: [100:1.00]
@@ -513,7 +513,7 @@ define void @test_fclex_fnclex() optsize
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fclex_fnclex:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: wait # sched: [100:0.33]
; SANDY-NEXT: fnclex # sched: [100:0.33]
@@ -522,7 +522,7 @@ define void @test_fclex_fnclex() optsize
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fclex_fnclex:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: wait # sched: [1:0.50]
; HASWELL-NEXT: fnclex # sched: [1:1.25]
@@ -531,7 +531,7 @@ define void @test_fclex_fnclex() optsize
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fclex_fnclex:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: wait # sched: [2:0.50]
; BROADWELL-NEXT: fnclex # sched: [4:1.00]
@@ -540,7 +540,7 @@ define void @test_fclex_fnclex() optsize
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fclex_fnclex:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: wait # sched: [2:0.50]
; SKYLAKE-NEXT: fnclex # sched: [4:1.00]
@@ -549,7 +549,7 @@ define void @test_fclex_fnclex() optsize
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fclex_fnclex:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: wait # sched: [2:0.50]
; SKX-NEXT: fnclex # sched: [4:1.00]
@@ -558,7 +558,7 @@ define void @test_fclex_fnclex() optsize
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fclex_fnclex:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: wait # sched: [100:0.17]
; BTVER2-NEXT: fnclex # sched: [100:0.17]
@@ -567,7 +567,7 @@ define void @test_fclex_fnclex() optsize
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fclex_fnclex:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: wait # sched: [1:1.00]
; ZNVER1-NEXT: fnclex # sched: [100:?]
@@ -580,7 +580,7 @@ define void @test_fclex_fnclex() optsize
define void @test_fcmov() optsize {
; GENERIC-LABEL: test_fcmov:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fcmovb %st(1), %st(0)
; GENERIC-NEXT: fcmovbe %st(1), %st(0)
@@ -594,7 +594,7 @@ define void @test_fcmov() optsize {
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fcmov:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fcmovb %st(1), %st(0)
; ATOM-NEXT: fcmovbe %st(1), %st(0)
@@ -608,7 +608,7 @@ define void @test_fcmov() optsize {
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fcmov:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fcmovb %st(1), %st(0)
; SLM-NEXT: fcmovbe %st(1), %st(0)
@@ -622,7 +622,7 @@ define void @test_fcmov() optsize {
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fcmov:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fcmovb %st(1), %st(0) # sched: [3:2.00]
; SANDY-NEXT: fcmovbe %st(1), %st(0) # sched: [3:2.00]
@@ -636,7 +636,7 @@ define void @test_fcmov() optsize {
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fcmov:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fcmovb %st(1), %st(0)
; HASWELL-NEXT: fcmovbe %st(1), %st(0)
@@ -650,7 +650,7 @@ define void @test_fcmov() optsize {
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fcmov:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fcmovb %st(1), %st(0)
; BROADWELL-NEXT: fcmovbe %st(1), %st(0)
@@ -664,7 +664,7 @@ define void @test_fcmov() optsize {
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fcmov:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fcmovb %st(1), %st(0)
; SKYLAKE-NEXT: fcmovbe %st(1), %st(0)
@@ -678,7 +678,7 @@ define void @test_fcmov() optsize {
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fcmov:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fcmovb %st(1), %st(0)
; SKX-NEXT: fcmovbe %st(1), %st(0)
@@ -692,7 +692,7 @@ define void @test_fcmov() optsize {
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fcmov:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fcmovb %st(1), %st(0)
; BTVER2-NEXT: fcmovbe %st(1), %st(0)
@@ -706,7 +706,7 @@ define void @test_fcmov() optsize {
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fcmov:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fcmovb %st(1), %st(0) # sched: [100:?]
; ZNVER1-NEXT: fcmovbe %st(1), %st(0) # sched: [100:?]
@@ -724,7 +724,7 @@ define void @test_fcmov() optsize {
define void @test_fcom(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fcom:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -736,7 +736,7 @@ define void @test_fcom(float *%a0, doubl
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fcom:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -748,7 +748,7 @@ define void @test_fcom(float *%a0, doubl
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fcom:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -760,7 +760,7 @@ define void @test_fcom(float *%a0, doubl
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fcom:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -772,7 +772,7 @@ define void @test_fcom(float *%a0, doubl
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fcom:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -784,7 +784,7 @@ define void @test_fcom(float *%a0, doubl
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fcom:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -796,7 +796,7 @@ define void @test_fcom(float *%a0, doubl
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fcom:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -808,7 +808,7 @@ define void @test_fcom(float *%a0, doubl
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fcom:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -820,7 +820,7 @@ define void @test_fcom(float *%a0, doubl
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fcom:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -832,7 +832,7 @@ define void @test_fcom(float *%a0, doubl
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fcom:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -848,7 +848,7 @@ define void @test_fcom(float *%a0, doubl
define void @test_fcomp_fcompp(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fcomp_fcompp:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -861,7 +861,7 @@ define void @test_fcomp_fcompp(float *%a
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fcomp_fcompp:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -874,7 +874,7 @@ define void @test_fcomp_fcompp(float *%a
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fcomp_fcompp:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -887,7 +887,7 @@ define void @test_fcomp_fcompp(float *%a
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fcomp_fcompp:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -900,7 +900,7 @@ define void @test_fcomp_fcompp(float *%a
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fcomp_fcompp:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -913,7 +913,7 @@ define void @test_fcomp_fcompp(float *%a
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fcomp_fcompp:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -926,7 +926,7 @@ define void @test_fcomp_fcompp(float *%a
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fcomp_fcompp:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -939,7 +939,7 @@ define void @test_fcomp_fcompp(float *%a
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fcomp_fcompp:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -952,7 +952,7 @@ define void @test_fcomp_fcompp(float *%a
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fcomp_fcompp:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -965,7 +965,7 @@ define void @test_fcomp_fcompp(float *%a
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fcomp_fcompp:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -982,7 +982,7 @@ define void @test_fcomp_fcompp(float *%a
define void @test_fcomi_fcomip() optsize {
; GENERIC-LABEL: test_fcomi_fcomip:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fcomi %st(3)
; GENERIC-NEXT: fcompi %st(3)
@@ -990,7 +990,7 @@ define void @test_fcomi_fcomip() optsize
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fcomi_fcomip:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fcomi %st(3) # sched: [9:4.50]
; ATOM-NEXT: fcompi %st(3) # sched: [9:4.50]
@@ -998,7 +998,7 @@ define void @test_fcomi_fcomip() optsize
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fcomi_fcomip:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fcomi %st(3) # sched: [3:1.00]
; SLM-NEXT: fcompi %st(3) # sched: [3:1.00]
@@ -1006,7 +1006,7 @@ define void @test_fcomi_fcomip() optsize
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fcomi_fcomip:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fcomi %st(3) # sched: [3:1.00]
; SANDY-NEXT: fcompi %st(3) # sched: [3:1.00]
@@ -1014,7 +1014,7 @@ define void @test_fcomi_fcomip() optsize
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fcomi_fcomip:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fcomi %st(3) # sched: [1:0.50]
; HASWELL-NEXT: fcompi %st(3) # sched: [1:0.50]
@@ -1022,7 +1022,7 @@ define void @test_fcomi_fcomip() optsize
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fcomi_fcomip:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fcomi %st(3) # sched: [3:1.00]
; BROADWELL-NEXT: fcompi %st(3) # sched: [3:1.00]
@@ -1030,7 +1030,7 @@ define void @test_fcomi_fcomip() optsize
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fcomi_fcomip:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fcomi %st(3) # sched: [3:1.00]
; SKYLAKE-NEXT: fcompi %st(3) # sched: [3:1.00]
@@ -1038,7 +1038,7 @@ define void @test_fcomi_fcomip() optsize
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fcomi_fcomip:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fcomi %st(3) # sched: [3:1.00]
; SKX-NEXT: fcompi %st(3) # sched: [3:1.00]
@@ -1046,7 +1046,7 @@ define void @test_fcomi_fcomip() optsize
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fcomi_fcomip:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fcomi %st(3) # sched: [3:1.00]
; BTVER2-NEXT: fcompi %st(3) # sched: [3:1.00]
@@ -1054,7 +1054,7 @@ define void @test_fcomi_fcomip() optsize
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fcomi_fcomip:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fcomi %st(3) # sched: [9:0.50]
; ZNVER1-NEXT: fcompi %st(3) # sched: [9:0.50]
@@ -1066,70 +1066,70 @@ define void @test_fcomi_fcomip() optsize
define void @test_fcos() optsize {
; GENERIC-LABEL: test_fcos:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fcos
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fcos:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fcos # sched: [174:87.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fcos:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fcos # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fcos:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fcos # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fcos:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fcos # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fcos:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fcos # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fcos:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fcos # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fcos:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fcos # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fcos:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fcos # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fcos:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fcos # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -1140,70 +1140,70 @@ define void @test_fcos() optsize {
define void @test_fdecstp() optsize {
; GENERIC-LABEL: test_fdecstp:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fdecstp
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fdecstp:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fdecstp # sched: [1:0.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fdecstp:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fdecstp # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fdecstp:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fdecstp # sched: [1:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fdecstp:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fdecstp # sched: [2:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fdecstp:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fdecstp # sched: [2:1.00]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fdecstp:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fdecstp # sched: [2:1.00]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fdecstp:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fdecstp # sched: [2:1.00]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fdecstp:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fdecstp # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fdecstp:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fdecstp # sched: [11:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -1214,7 +1214,7 @@ define void @test_fdecstp() optsize {
define void @test_fdiv(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fdiv:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -1226,7 +1226,7 @@ define void @test_fdiv(float *%a0, doubl
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fdiv:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -1238,7 +1238,7 @@ define void @test_fdiv(float *%a0, doubl
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fdiv:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -1250,7 +1250,7 @@ define void @test_fdiv(float *%a0, doubl
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fdiv:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -1262,7 +1262,7 @@ define void @test_fdiv(float *%a0, doubl
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fdiv:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -1274,7 +1274,7 @@ define void @test_fdiv(float *%a0, doubl
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fdiv:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -1286,7 +1286,7 @@ define void @test_fdiv(float *%a0, doubl
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fdiv:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -1298,7 +1298,7 @@ define void @test_fdiv(float *%a0, doubl
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fdiv:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -1310,7 +1310,7 @@ define void @test_fdiv(float *%a0, doubl
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fdiv:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -1322,7 +1322,7 @@ define void @test_fdiv(float *%a0, doubl
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fdiv:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -1338,7 +1338,7 @@ define void @test_fdiv(float *%a0, doubl
define void @test_fdivp_fidiv(i16 *%a0, i32 *%a1) optsize {
; GENERIC-LABEL: test_fdivp_fidiv:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -1350,7 +1350,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fdivp_fidiv:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -1362,7 +1362,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fdivp_fidiv:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -1374,7 +1374,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fdivp_fidiv:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -1386,7 +1386,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fdivp_fidiv:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -1398,7 +1398,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fdivp_fidiv:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -1410,7 +1410,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fdivp_fidiv:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -1422,7 +1422,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fdivp_fidiv:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -1434,7 +1434,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fdivp_fidiv:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -1446,7 +1446,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fdivp_fidiv:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -1462,7 +1462,7 @@ define void @test_fdivp_fidiv(i16 *%a0,
define void @test_fdivr(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fdivr:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -1474,7 +1474,7 @@ define void @test_fdivr(float *%a0, doub
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fdivr:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -1486,7 +1486,7 @@ define void @test_fdivr(float *%a0, doub
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fdivr:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -1498,7 +1498,7 @@ define void @test_fdivr(float *%a0, doub
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fdivr:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -1510,7 +1510,7 @@ define void @test_fdivr(float *%a0, doub
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fdivr:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -1522,7 +1522,7 @@ define void @test_fdivr(float *%a0, doub
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fdivr:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -1534,7 +1534,7 @@ define void @test_fdivr(float *%a0, doub
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fdivr:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -1546,7 +1546,7 @@ define void @test_fdivr(float *%a0, doub
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fdivr:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -1558,7 +1558,7 @@ define void @test_fdivr(float *%a0, doub
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fdivr:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -1570,7 +1570,7 @@ define void @test_fdivr(float *%a0, doub
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fdivr:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -1586,7 +1586,7 @@ define void @test_fdivr(float *%a0, doub
define void @test_fdivrp_fidivr(i16 *%a0, i32 *%a1) optsize {
; GENERIC-LABEL: test_fdivrp_fidivr:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -1598,7 +1598,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fdivrp_fidivr:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -1610,7 +1610,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fdivrp_fidivr:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -1622,7 +1622,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fdivrp_fidivr:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -1634,7 +1634,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fdivrp_fidivr:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -1646,7 +1646,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fdivrp_fidivr:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -1658,7 +1658,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fdivrp_fidivr:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -1670,7 +1670,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fdivrp_fidivr:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -1682,7 +1682,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fdivrp_fidivr:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -1694,7 +1694,7 @@ define void @test_fdivrp_fidivr(i16 *%a0
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fdivrp_fidivr:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -1710,70 +1710,70 @@ define void @test_fdivrp_fidivr(i16 *%a0
define void @test_ffree() optsize {
; GENERIC-LABEL: test_ffree:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: ffree %st(0)
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_ffree:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: ffree %st(0) # sched: [1:0.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_ffree:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: ffree %st(0) # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_ffree:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: ffree %st(0) # sched: [1:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_ffree:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: ffree %st(0) # sched: [1:0.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_ffree:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: ffree %st(0) # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_ffree:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: ffree %st(0) # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_ffree:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: ffree %st(0) # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_ffree:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: ffree %st(0) # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_ffree:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: ffree %st(0) # sched: [11:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -1784,7 +1784,7 @@ define void @test_ffree() optsize {
define void @test_ficom(i16 *%a0, i32 *%a1) optsize {
; GENERIC-LABEL: test_ficom:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -1796,7 +1796,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_ficom:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -1808,7 +1808,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_ficom:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -1820,7 +1820,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_ficom:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -1832,7 +1832,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_ficom:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -1844,7 +1844,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_ficom:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -1856,7 +1856,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_ficom:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -1868,7 +1868,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_ficom:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -1880,7 +1880,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_ficom:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -1892,7 +1892,7 @@ define void @test_ficom(i16 *%a0, i32 *%
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_ficom:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -1908,7 +1908,7 @@ define void @test_ficom(i16 *%a0, i32 *%
define void @test_fild(i16 *%a0, i32 *%a1, i64 *%a2) optsize {
; GENERIC-LABEL: test_fild:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %edx
@@ -1920,7 +1920,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fild:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [1:1.00]
@@ -1932,7 +1932,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fild:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [3:1.00]
@@ -1944,7 +1944,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fild:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
@@ -1956,7 +1956,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fild:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [1:0.50]
@@ -1968,7 +1968,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fild:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
@@ -1980,7 +1980,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fild:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
@@ -1992,7 +1992,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fild:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:0.50]
@@ -2004,7 +2004,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fild:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [5:1.00]
@@ -2016,7 +2016,7 @@ define void @test_fild(i16 *%a0, i32 *%a
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fild:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %edx # sched: [8:0.50]
@@ -2032,70 +2032,70 @@ define void @test_fild(i16 *%a0, i32 *%a
define void @test_fincstp() optsize {
; GENERIC-LABEL: test_fincstp:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fincstp
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fincstp:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fincstp # sched: [1:0.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fincstp:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fincstp # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fincstp:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fincstp # sched: [1:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fincstp:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fincstp # sched: [1:0.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fincstp:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fincstp # sched: [1:0.50]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fincstp:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fincstp # sched: [1:0.50]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fincstp:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fincstp # sched: [1:0.50]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fincstp:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fincstp # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fincstp:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fincstp # sched: [11:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -2106,7 +2106,7 @@ define void @test_fincstp() optsize {
define void @test_finit_fninit() optsize {
; GENERIC-LABEL: test_finit_fninit:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: wait
; GENERIC-NEXT: fninit
@@ -2115,7 +2115,7 @@ define void @test_finit_fninit() optsize
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_finit_fninit:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: wait # sched: [1:0.50]
; ATOM-NEXT: fninit # sched: [63:31.50]
@@ -2124,7 +2124,7 @@ define void @test_finit_fninit() optsize
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_finit_fninit:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: wait # sched: [100:1.00]
; SLM-NEXT: fninit # sched: [100:1.00]
@@ -2133,7 +2133,7 @@ define void @test_finit_fninit() optsize
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_finit_fninit:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: wait # sched: [100:0.33]
; SANDY-NEXT: fninit # sched: [5:1.33]
@@ -2142,7 +2142,7 @@ define void @test_finit_fninit() optsize
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_finit_fninit:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: wait # sched: [1:0.50]
; HASWELL-NEXT: fninit # sched: [1:?]
@@ -2151,7 +2151,7 @@ define void @test_finit_fninit() optsize
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_finit_fninit:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: wait # sched: [2:0.50]
; BROADWELL-NEXT: fninit # sched: [75:6.00]
@@ -2160,7 +2160,7 @@ define void @test_finit_fninit() optsize
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_finit_fninit:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: wait # sched: [2:0.50]
; SKYLAKE-NEXT: fninit # sched: [75:6.00]
@@ -2169,7 +2169,7 @@ define void @test_finit_fninit() optsize
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_finit_fninit:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: wait # sched: [2:0.50]
; SKX-NEXT: fninit # sched: [75:6.00]
@@ -2178,7 +2178,7 @@ define void @test_finit_fninit() optsize
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_finit_fninit:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: wait # sched: [100:0.17]
; BTVER2-NEXT: fninit # sched: [100:0.17]
@@ -2187,7 +2187,7 @@ define void @test_finit_fninit() optsize
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_finit_fninit:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: wait # sched: [1:1.00]
; ZNVER1-NEXT: fninit # sched: [100:?]
@@ -2209,7 +2209,7 @@ define void @test_finit_fninit() optsize
define void @test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz() optsize {
; GENERIC-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fld1
; GENERIC-NEXT: fldl2e
@@ -2221,7 +2221,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fld1 # sched: [6:3.00]
; ATOM-NEXT: fldl2e # sched: [10:5.00]
@@ -2233,7 +2233,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fld1 # sched: [1:?]
; SLM-NEXT: fldl2e # sched: [100:1.00]
@@ -2245,7 +2245,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fld1 # sched: [1:?]
; SANDY-NEXT: fldl2e # sched: [100:0.33]
@@ -2257,7 +2257,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fld1 # sched: [1:?]
; HASWELL-NEXT: fldl2e # sched: [100:0.25]
@@ -2269,7 +2269,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fld1 # sched: [1:?]
; BROADWELL-NEXT: fldl2e # sched: [100:0.25]
@@ -2281,7 +2281,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fld1 # sched: [1:?]
; SKYLAKE-NEXT: fldl2e # sched: [100:0.25]
@@ -2293,7 +2293,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fld1 # sched: [1:?]
; SKX-NEXT: fldl2e # sched: [100:0.25]
@@ -2305,7 +2305,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fld1 # sched: [1:?]
; BTVER2-NEXT: fldl2e # sched: [100:0.17]
@@ -2317,7 +2317,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fld1_fldl2e_fldl2t_fldlg2_fldln2_fldpi_fldz:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fld1 # sched: [11:1.00]
; ZNVER1-NEXT: fldl2e # sched: [100:?]
@@ -2333,7 +2333,7 @@ define void @test_fld1_fldl2e_fldl2t_fld
define void @test_fmul(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fmul:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -2345,7 +2345,7 @@ define void @test_fmul(float *%a0, doubl
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fmul:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -2357,7 +2357,7 @@ define void @test_fmul(float *%a0, doubl
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fmul:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -2369,7 +2369,7 @@ define void @test_fmul(float *%a0, doubl
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fmul:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -2381,7 +2381,7 @@ define void @test_fmul(float *%a0, doubl
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fmul:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -2393,7 +2393,7 @@ define void @test_fmul(float *%a0, doubl
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fmul:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -2405,7 +2405,7 @@ define void @test_fmul(float *%a0, doubl
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fmul:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -2417,7 +2417,7 @@ define void @test_fmul(float *%a0, doubl
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fmul:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -2429,7 +2429,7 @@ define void @test_fmul(float *%a0, doubl
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fmul:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -2441,7 +2441,7 @@ define void @test_fmul(float *%a0, doubl
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fmul:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -2457,7 +2457,7 @@ define void @test_fmul(float *%a0, doubl
define void @test_fmulp_fimul(i16 *%a0, i32 *%a1) optsize {
; GENERIC-LABEL: test_fmulp_fimul:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -2469,7 +2469,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fmulp_fimul:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -2481,7 +2481,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fmulp_fimul:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -2493,7 +2493,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fmulp_fimul:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -2505,7 +2505,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fmulp_fimul:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -2517,7 +2517,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fmulp_fimul:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -2529,7 +2529,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fmulp_fimul:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -2541,7 +2541,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fmulp_fimul:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -2553,7 +2553,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fmulp_fimul:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -2565,7 +2565,7 @@ define void @test_fmulp_fimul(i16 *%a0,
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fmulp_fimul:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -2581,70 +2581,70 @@ define void @test_fmulp_fimul(i16 *%a0,
define void @test_fnop() optsize {
; GENERIC-LABEL: test_fnop:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fnop
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fnop:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fnop # sched: [1:0.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fnop:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fnop # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fnop:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fnop # sched: [1:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fnop:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fnop # sched: [1:0.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fnop:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fnop # sched: [1:0.50]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fnop:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fnop # sched: [1:0.50]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fnop:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fnop # sched: [1:0.50]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fnop:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fnop # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fnop:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fnop # sched: [1:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -2655,70 +2655,70 @@ define void @test_fnop() optsize {
define void @test_fpatan() optsize {
; GENERIC-LABEL: test_fpatan:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fpatan
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fpatan:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fpatan # sched: [183:91.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fpatan:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fpatan # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fpatan:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fpatan # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fpatan:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fpatan # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fpatan:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fpatan # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fpatan:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fpatan # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fpatan:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fpatan # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fpatan:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fpatan # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fpatan:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fpatan # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -2729,7 +2729,7 @@ define void @test_fpatan() optsize {
define void @test_fprem_fprem1() optsize {
; GENERIC-LABEL: test_fprem_fprem1:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fprem
; GENERIC-NEXT: fprem1
@@ -2737,7 +2737,7 @@ define void @test_fprem_fprem1() optsize
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fprem_fprem1:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fprem # sched: [55:27.50]
; ATOM-NEXT: fprem1 # sched: [71:35.50]
@@ -2745,7 +2745,7 @@ define void @test_fprem_fprem1() optsize
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fprem_fprem1:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fprem # sched: [100:1.00]
; SLM-NEXT: fprem1 # sched: [100:1.00]
@@ -2753,7 +2753,7 @@ define void @test_fprem_fprem1() optsize
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fprem_fprem1:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fprem # sched: [100:0.33]
; SANDY-NEXT: fprem1 # sched: [100:0.33]
@@ -2761,7 +2761,7 @@ define void @test_fprem_fprem1() optsize
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fprem_fprem1:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fprem # sched: [19:?]
; HASWELL-NEXT: fprem1 # sched: [19:?]
@@ -2769,7 +2769,7 @@ define void @test_fprem_fprem1() optsize
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fprem_fprem1:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fprem # sched: [100:0.25]
; BROADWELL-NEXT: fprem1 # sched: [100:0.25]
@@ -2777,7 +2777,7 @@ define void @test_fprem_fprem1() optsize
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fprem_fprem1:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fprem # sched: [100:0.25]
; SKYLAKE-NEXT: fprem1 # sched: [100:0.25]
@@ -2785,7 +2785,7 @@ define void @test_fprem_fprem1() optsize
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fprem_fprem1:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fprem # sched: [100:0.25]
; SKX-NEXT: fprem1 # sched: [100:0.25]
@@ -2793,7 +2793,7 @@ define void @test_fprem_fprem1() optsize
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fprem_fprem1:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fprem # sched: [100:0.17]
; BTVER2-NEXT: fprem1 # sched: [100:0.17]
@@ -2801,7 +2801,7 @@ define void @test_fprem_fprem1() optsize
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fprem_fprem1:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fprem # sched: [100:?]
; ZNVER1-NEXT: fprem1 # sched: [100:?]
@@ -2813,70 +2813,70 @@ define void @test_fprem_fprem1() optsize
define void @test_fptan() optsize {
; GENERIC-LABEL: test_fptan:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fptan
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fptan:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fptan # sched: [168:84.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fptan:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fptan # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fptan:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fptan # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fptan:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fptan # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fptan:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fptan # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fptan:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fptan # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fptan:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fptan # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fptan:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fptan # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fptan:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fptan # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -2887,70 +2887,70 @@ define void @test_fptan() optsize {
define void @test_frndint() optsize {
; GENERIC-LABEL: test_frndint:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: frndint
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_frndint:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: frndint # sched: [46:23.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_frndint:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: frndint # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_frndint:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: frndint # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_frndint:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: frndint # sched: [11:?]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_frndint:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: frndint # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_frndint:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: frndint # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_frndint:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: frndint # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_frndint:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: frndint # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_frndint:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: frndint # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -2965,70 +2965,70 @@ define void @test_frndint() optsize {
define void @test_fscale() optsize {
; GENERIC-LABEL: test_fscale:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fscale
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fscale:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fscale # sched: [77:38.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fscale:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fscale # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fscale:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fscale # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fscale:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fscale # sched: [75:?]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fscale:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fscale # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fscale:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fscale # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fscale:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fscale # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fscale:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fscale # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fscale:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fscale # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -3039,70 +3039,70 @@ define void @test_fscale() optsize {
define void @test_fsin() optsize {
; GENERIC-LABEL: test_fsin:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fsin
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fsin:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fsin # sched: [174:87.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fsin:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fsin # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fsin:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fsin # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fsin:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fsin # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fsin:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fsin # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fsin:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fsin # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fsin:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fsin # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fsin:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fsin # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fsin:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fsin # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -3113,70 +3113,70 @@ define void @test_fsin() optsize {
define void @test_fsincos() optsize {
; GENERIC-LABEL: test_fsincos:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fsincos
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fsincos:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fsincos # sched: [174:87.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fsincos:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fsincos # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fsincos:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fsincos # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fsincos:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fsincos # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fsincos:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fsincos # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fsincos:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fsincos # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fsincos:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fsincos # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fsincos:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fsincos # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fsincos:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fsincos # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -3187,70 +3187,70 @@ define void @test_fsincos() optsize {
define void @test_fsqrt() optsize {
; GENERIC-LABEL: test_fsqrt:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fsqrt
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fsqrt:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fsqrt # sched: [71:35.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fsqrt:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fsqrt # sched: [15:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fsqrt:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fsqrt # sched: [14:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fsqrt:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fsqrt # sched: [15:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fsqrt:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fsqrt # sched: [15:1.00]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fsqrt:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fsqrt # sched: [15:1.00]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fsqrt:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fsqrt # sched: [15:1.00]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fsqrt:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fsqrt # sched: [21:21.00]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fsqrt:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fsqrt # sched: [20:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -3273,7 +3273,7 @@ define void @test_fsqrt() optsize {
define void @test_fsub(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fsub:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -3285,7 +3285,7 @@ define void @test_fsub(float *%a0, doubl
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fsub:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -3297,7 +3297,7 @@ define void @test_fsub(float *%a0, doubl
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fsub:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -3309,7 +3309,7 @@ define void @test_fsub(float *%a0, doubl
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fsub:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -3321,7 +3321,7 @@ define void @test_fsub(float *%a0, doubl
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fsub:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -3333,7 +3333,7 @@ define void @test_fsub(float *%a0, doubl
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fsub:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -3345,7 +3345,7 @@ define void @test_fsub(float *%a0, doubl
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fsub:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -3357,7 +3357,7 @@ define void @test_fsub(float *%a0, doubl
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fsub:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -3369,7 +3369,7 @@ define void @test_fsub(float *%a0, doubl
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fsub:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -3381,7 +3381,7 @@ define void @test_fsub(float *%a0, doubl
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fsub:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -3397,7 +3397,7 @@ define void @test_fsub(float *%a0, doubl
define void @test_fsubp_fisub(i16 *%a0, i32 *%a1) optsize {
; GENERIC-LABEL: test_fsubp_fisub:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -3409,7 +3409,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fsubp_fisub:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -3421,7 +3421,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fsubp_fisub:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -3433,7 +3433,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fsubp_fisub:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -3445,7 +3445,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fsubp_fisub:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -3457,7 +3457,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fsubp_fisub:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -3469,7 +3469,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fsubp_fisub:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -3481,7 +3481,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fsubp_fisub:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -3493,7 +3493,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fsubp_fisub:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -3505,7 +3505,7 @@ define void @test_fsubp_fisub(i16 *%a0,
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fsubp_fisub:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -3521,7 +3521,7 @@ define void @test_fsubp_fisub(i16 *%a0,
define void @test_fsubr(float *%a0, double *%a1) optsize {
; GENERIC-LABEL: test_fsubr:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -3533,7 +3533,7 @@ define void @test_fsubr(float *%a0, doub
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fsubr:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -3545,7 +3545,7 @@ define void @test_fsubr(float *%a0, doub
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fsubr:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -3557,7 +3557,7 @@ define void @test_fsubr(float *%a0, doub
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fsubr:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -3569,7 +3569,7 @@ define void @test_fsubr(float *%a0, doub
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fsubr:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -3581,7 +3581,7 @@ define void @test_fsubr(float *%a0, doub
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fsubr:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -3593,7 +3593,7 @@ define void @test_fsubr(float *%a0, doub
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fsubr:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -3605,7 +3605,7 @@ define void @test_fsubr(float *%a0, doub
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fsubr:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -3617,7 +3617,7 @@ define void @test_fsubr(float *%a0, doub
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fsubr:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -3629,7 +3629,7 @@ define void @test_fsubr(float *%a0, doub
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fsubr:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -3645,7 +3645,7 @@ define void @test_fsubr(float *%a0, doub
define void @test_fsubrp_fisubr(i16 *%a0, i32 *%a1) optsize {
; GENERIC-LABEL: test_fsubrp_fisubr:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %ecx
; GENERIC-NEXT: #APP
@@ -3657,7 +3657,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fsubrp_fisubr:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:1.00]
; ATOM-NEXT: #APP
@@ -3669,7 +3669,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fsubrp_fisubr:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [3:1.00]
; SLM-NEXT: #APP
@@ -3681,7 +3681,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fsubrp_fisubr:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SANDY-NEXT: #APP
@@ -3693,7 +3693,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fsubrp_fisubr:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [1:0.50]
; HASWELL-NEXT: #APP
@@ -3705,7 +3705,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fsubrp_fisubr:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; BROADWELL-NEXT: #APP
@@ -3717,7 +3717,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fsubrp_fisubr:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
@@ -3729,7 +3729,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fsubrp_fisubr:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:0.50]
; SKX-NEXT: #APP
@@ -3741,7 +3741,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fsubrp_fisubr:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [5:1.00]
; BTVER2-NEXT: #APP
@@ -3753,7 +3753,7 @@ define void @test_fsubrp_fisubr(i16 *%a0
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fsubrp_fisubr:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %ecx # sched: [8:0.50]
; ZNVER1-NEXT: #APP
@@ -3769,70 +3769,70 @@ define void @test_fsubrp_fisubr(i16 *%a0
define void @test_ftst() optsize {
; GENERIC-LABEL: test_ftst:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: ftst
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_ftst:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: ftst # sched: [9:4.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_ftst:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: ftst # sched: [3:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_ftst:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: ftst # sched: [3:1.00]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_ftst:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: ftst # sched: [1:1.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_ftst:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: ftst # sched: [3:1.00]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_ftst:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: ftst # sched: [3:1.00]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_ftst:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: ftst # sched: [3:1.00]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_ftst:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: ftst # sched: [3:1.00]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_ftst:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: ftst # sched: [1:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -3843,7 +3843,7 @@ define void @test_ftst() optsize {
define void @test_fucom_fucomp_fucompp() optsize {
; GENERIC-LABEL: test_fucom_fucomp_fucompp:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fucom %st(1)
; GENERIC-NEXT: fucom %st(3)
@@ -3854,7 +3854,7 @@ define void @test_fucom_fucomp_fucompp()
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fucom_fucomp_fucompp:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fucom %st(1) # sched: [1:1.00]
; ATOM-NEXT: fucom %st(3) # sched: [1:1.00]
@@ -3865,7 +3865,7 @@ define void @test_fucom_fucomp_fucompp()
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fucom_fucomp_fucompp:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fucom %st(1) # sched: [3:1.00]
; SLM-NEXT: fucom %st(3) # sched: [3:1.00]
@@ -3876,7 +3876,7 @@ define void @test_fucom_fucomp_fucompp()
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fucom_fucomp_fucompp:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fucom %st(1) # sched: [1:1.00]
; SANDY-NEXT: fucom %st(3) # sched: [1:1.00]
@@ -3887,7 +3887,7 @@ define void @test_fucom_fucomp_fucompp()
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fucom_fucomp_fucompp:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fucom %st(1) # sched: [1:1.00]
; HASWELL-NEXT: fucom %st(3) # sched: [1:1.00]
@@ -3898,7 +3898,7 @@ define void @test_fucom_fucomp_fucompp()
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fucom_fucomp_fucompp:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fucom %st(1) # sched: [1:1.00]
; BROADWELL-NEXT: fucom %st(3) # sched: [1:1.00]
@@ -3909,7 +3909,7 @@ define void @test_fucom_fucomp_fucompp()
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fucom_fucomp_fucompp:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fucom %st(1) # sched: [1:1.00]
; SKYLAKE-NEXT: fucom %st(3) # sched: [1:1.00]
@@ -3920,7 +3920,7 @@ define void @test_fucom_fucomp_fucompp()
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fucom_fucomp_fucompp:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fucom %st(1) # sched: [1:1.00]
; SKX-NEXT: fucom %st(3) # sched: [1:1.00]
@@ -3931,7 +3931,7 @@ define void @test_fucom_fucomp_fucompp()
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fucom_fucomp_fucompp:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fucom %st(1) # sched: [3:1.00]
; BTVER2-NEXT: fucom %st(3) # sched: [3:1.00]
@@ -3942,7 +3942,7 @@ define void @test_fucom_fucomp_fucompp()
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fucom_fucomp_fucompp:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fucom %st(1) # sched: [1:1.00]
; ZNVER1-NEXT: fucom %st(3) # sched: [1:1.00]
@@ -3957,7 +3957,7 @@ define void @test_fucom_fucomp_fucompp()
define void @test_fucomi_fucomip() optsize {
; GENERIC-LABEL: test_fucomi_fucomip:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fucomi %st(3)
; GENERIC-NEXT: fucompi %st(3)
@@ -3965,7 +3965,7 @@ define void @test_fucomi_fucomip() optsi
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fucomi_fucomip:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fucomi %st(3) # sched: [9:4.50]
; ATOM-NEXT: fucompi %st(3) # sched: [9:4.50]
@@ -3973,7 +3973,7 @@ define void @test_fucomi_fucomip() optsi
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fucomi_fucomip:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fucomi %st(3) # sched: [3:1.00]
; SLM-NEXT: fucompi %st(3) # sched: [3:1.00]
@@ -3981,7 +3981,7 @@ define void @test_fucomi_fucomip() optsi
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fucomi_fucomip:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fucomi %st(3) # sched: [3:1.00]
; SANDY-NEXT: fucompi %st(3) # sched: [3:1.00]
@@ -3989,7 +3989,7 @@ define void @test_fucomi_fucomip() optsi
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fucomi_fucomip:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fucomi %st(3) # sched: [1:0.50]
; HASWELL-NEXT: fucompi %st(3) # sched: [1:0.50]
@@ -3997,7 +3997,7 @@ define void @test_fucomi_fucomip() optsi
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fucomi_fucomip:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fucomi %st(3) # sched: [3:1.00]
; BROADWELL-NEXT: fucompi %st(3) # sched: [3:1.00]
@@ -4005,7 +4005,7 @@ define void @test_fucomi_fucomip() optsi
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fucomi_fucomip:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fucomi %st(3) # sched: [3:1.00]
; SKYLAKE-NEXT: fucompi %st(3) # sched: [3:1.00]
@@ -4013,7 +4013,7 @@ define void @test_fucomi_fucomip() optsi
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fucomi_fucomip:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fucomi %st(3) # sched: [3:1.00]
; SKX-NEXT: fucompi %st(3) # sched: [3:1.00]
@@ -4021,7 +4021,7 @@ define void @test_fucomi_fucomip() optsi
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fucomi_fucomip:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fucomi %st(3) # sched: [3:1.00]
; BTVER2-NEXT: fucompi %st(3) # sched: [3:1.00]
@@ -4029,7 +4029,7 @@ define void @test_fucomi_fucomip() optsi
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fucomi_fucomip:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fucomi %st(3) # sched: [9:0.50]
; ZNVER1-NEXT: fucompi %st(3) # sched: [9:0.50]
@@ -4041,70 +4041,70 @@ define void @test_fucomi_fucomip() optsi
define void @test_fwait() optsize {
; GENERIC-LABEL: test_fwait:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: wait
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fwait:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: wait # sched: [1:0.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fwait:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: wait # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fwait:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: wait # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fwait:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: wait # sched: [1:0.50]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fwait:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: wait # sched: [2:0.50]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fwait:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: wait # sched: [2:0.50]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fwait:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: wait # sched: [2:0.50]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fwait:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: wait # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fwait:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: wait # sched: [1:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -4115,70 +4115,70 @@ define void @test_fwait() optsize {
define void @test_fxam() optsize {
; GENERIC-LABEL: test_fxam:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fxam
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fxam:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fxam # sched: [1:1.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fxam:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fxam # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fxam:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fxam # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fxam:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fxam # sched: [1:2.00]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fxam:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fxam # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fxam:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fxam # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fxam:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fxam # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fxam:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fxam # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fxam:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fxam # sched: [1:1.00]
; ZNVER1-NEXT: #NO_APP
@@ -4189,7 +4189,7 @@ define void @test_fxam() optsize {
define void @test_fxch() optsize {
; GENERIC-LABEL: test_fxch:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fxch %st(1)
; GENERIC-NEXT: fxch %st(3)
@@ -4197,7 +4197,7 @@ define void @test_fxch() optsize {
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fxch:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fxch %st(1) # sched: [1:1.00]
; ATOM-NEXT: fxch %st(3) # sched: [1:1.00]
@@ -4205,7 +4205,7 @@ define void @test_fxch() optsize {
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fxch:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fxch %st(1) # sched: [1:0.50]
; SLM-NEXT: fxch %st(3) # sched: [1:0.50]
@@ -4213,7 +4213,7 @@ define void @test_fxch() optsize {
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fxch:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fxch %st(1) # sched: [1:0.33]
; SANDY-NEXT: fxch %st(3) # sched: [1:0.33]
@@ -4221,7 +4221,7 @@ define void @test_fxch() optsize {
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fxch:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fxch %st(1) # sched: [17:4.00]
; HASWELL-NEXT: fxch %st(3) # sched: [17:4.00]
@@ -4229,7 +4229,7 @@ define void @test_fxch() optsize {
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fxch:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fxch %st(1) # sched: [14:4.00]
; BROADWELL-NEXT: fxch %st(3) # sched: [14:4.00]
@@ -4237,7 +4237,7 @@ define void @test_fxch() optsize {
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fxch:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fxch %st(1) # sched: [17:4.00]
; SKYLAKE-NEXT: fxch %st(3) # sched: [17:4.00]
@@ -4245,7 +4245,7 @@ define void @test_fxch() optsize {
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fxch:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fxch %st(1) # sched: [17:4.00]
; SKX-NEXT: fxch %st(3) # sched: [17:4.00]
@@ -4253,7 +4253,7 @@ define void @test_fxch() optsize {
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fxch:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fxch %st(1) # sched: [1:0.17]
; BTVER2-NEXT: fxch %st(3) # sched: [1:0.17]
@@ -4261,7 +4261,7 @@ define void @test_fxch() optsize {
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fxch:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fxch %st(1) # sched: [1:0.25]
; ZNVER1-NEXT: fxch %st(3) # sched: [1:0.25]
@@ -4273,7 +4273,7 @@ define void @test_fxch() optsize {
define void @test_fxrstor_fxsave(i8* %a0) optsize {
; GENERIC-LABEL: test_fxrstor_fxsave:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movl {{[0-9]+}}(%esp), %eax
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fxrstor (%eax)
@@ -4282,7 +4282,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fxrstor_fxsave:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:1.00]
; ATOM-NEXT: #APP
; ATOM-NEXT: fxrstor (%eax) # sched: [141:70.50]
@@ -4291,7 +4291,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fxrstor_fxsave:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [3:1.00]
; SLM-NEXT: #APP
; SLM-NEXT: fxrstor (%eax) # sched: [100:1.00]
@@ -4300,7 +4300,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fxrstor_fxsave:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SANDY-NEXT: #APP
; SANDY-NEXT: fxrstor (%eax) # sched: [5:2.00]
@@ -4309,7 +4309,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fxrstor_fxsave:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [1:0.50]
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fxrstor (%eax) # sched: [59:16.50]
@@ -4318,7 +4318,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fxrstor_fxsave:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fxrstor (%eax) # sched: [63:16.50]
@@ -4327,7 +4327,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fxrstor_fxsave:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fxrstor (%eax) # sched: [63:16.50]
@@ -4336,7 +4336,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fxrstor_fxsave:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:0.50]
; SKX-NEXT: #APP
; SKX-NEXT: fxrstor (%eax) # sched: [63:16.50]
@@ -4345,7 +4345,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fxrstor_fxsave:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [5:1.00]
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fxrstor (%eax) # sched: [100:0.17]
@@ -4354,7 +4354,7 @@ define void @test_fxrstor_fxsave(i8* %a0
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fxrstor_fxsave:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movl {{[0-9]+}}(%esp), %eax # sched: [8:0.50]
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fxrstor (%eax) # sched: [100:?]
@@ -4367,70 +4367,70 @@ define void @test_fxrstor_fxsave(i8* %a0
define void @test_fxtract() optsize {
; GENERIC-LABEL: test_fxtract:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fxtract
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fxtract:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fxtract # sched: [25:12.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fxtract:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fxtract # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fxtract:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fxtract # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fxtract:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fxtract # sched: [15:?]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fxtract:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fxtract # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fxtract:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fxtract # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fxtract:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fxtract # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fxtract:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fxtract # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fxtract:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fxtract # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -4441,70 +4441,70 @@ define void @test_fxtract() optsize {
define void @test_fyl2x() optsize {
; GENERIC-LABEL: test_fyl2x:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fyl2x
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fyl2x:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fyl2x # sched: [146:73.00]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fyl2x:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fyl2x # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fyl2x:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fyl2x # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fyl2x:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fyl2x # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fyl2x:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fyl2x # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fyl2x:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fyl2x # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fyl2x:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fyl2x # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fyl2x:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fyl2x # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fyl2x:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fyl2x # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
@@ -4515,70 +4515,70 @@ define void @test_fyl2x() optsize {
define void @test_fyl2xp1() optsize {
; GENERIC-LABEL: test_fyl2xp1:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: #APP
; GENERIC-NEXT: fyl2xp1
; GENERIC-NEXT: #NO_APP
; GENERIC-NEXT: retl
;
; ATOM-LABEL: test_fyl2xp1:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: #APP
; ATOM-NEXT: fyl2xp1 # sched: [147:73.50]
; ATOM-NEXT: #NO_APP
; ATOM-NEXT: retl # sched: [79:39.50]
;
; SLM-LABEL: test_fyl2xp1:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: #APP
; SLM-NEXT: fyl2xp1 # sched: [100:1.00]
; SLM-NEXT: #NO_APP
; SLM-NEXT: retl # sched: [4:1.00]
;
; SANDY-LABEL: test_fyl2xp1:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: #APP
; SANDY-NEXT: fyl2xp1 # sched: [100:0.33]
; SANDY-NEXT: #NO_APP
; SANDY-NEXT: retl # sched: [5:1.00]
;
; HASWELL-LABEL: test_fyl2xp1:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: #APP
; HASWELL-NEXT: fyl2xp1 # sched: [100:0.25]
; HASWELL-NEXT: #NO_APP
; HASWELL-NEXT: retl # sched: [5:0.50]
;
; BROADWELL-LABEL: test_fyl2xp1:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: #APP
; BROADWELL-NEXT: fyl2xp1 # sched: [100:0.25]
; BROADWELL-NEXT: #NO_APP
; BROADWELL-NEXT: retl # sched: [6:0.50]
;
; SKYLAKE-LABEL: test_fyl2xp1:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: #APP
; SKYLAKE-NEXT: fyl2xp1 # sched: [100:0.25]
; SKYLAKE-NEXT: #NO_APP
; SKYLAKE-NEXT: retl # sched: [6:0.50]
;
; SKX-LABEL: test_fyl2xp1:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: #APP
; SKX-NEXT: fyl2xp1 # sched: [100:0.25]
; SKX-NEXT: #NO_APP
; SKX-NEXT: retl # sched: [6:0.50]
;
; BTVER2-LABEL: test_fyl2xp1:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: fyl2xp1 # sched: [100:0.17]
; BTVER2-NEXT: #NO_APP
; BTVER2-NEXT: retl # sched: [4:1.00]
;
; ZNVER1-LABEL: test_fyl2xp1:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: #APP
; ZNVER1-NEXT: fyl2xp1 # sched: [100:?]
; ZNVER1-NEXT: #NO_APP
Modified: llvm/trunk/test/CodeGen/X86/xaluo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xaluo.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xaluo.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xaluo.ll Mon Dec 4 09:18:51 2017
@@ -9,14 +9,14 @@
; SADDO reg, reg
define zeroext i1 @saddoi8(i8 signext %v1, i8 signext %v2, i8* %res) {
; SDAG-LABEL: saddoi8:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addb %sil, %dil
; SDAG-NEXT: seto %al
; SDAG-NEXT: movb %dil, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi8:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addb %sil, %dil
; FAST-NEXT: seto %al
; FAST-NEXT: movb %dil, (%rdx)
@@ -25,7 +25,7 @@ define zeroext i1 @saddoi8(i8 signext %v
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi8:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addb %sil, %dil
; KNL-NEXT: seto %al
; KNL-NEXT: movb %dil, (%rdx)
@@ -39,14 +39,14 @@ define zeroext i1 @saddoi8(i8 signext %v
define zeroext i1 @saddoi16(i16 %v1, i16 %v2, i16* %res) {
; SDAG-LABEL: saddoi16:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addw %si, %di
; SDAG-NEXT: seto %al
; SDAG-NEXT: movw %di, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi16:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addw %si, %di
; FAST-NEXT: seto %al
; FAST-NEXT: movw %di, (%rdx)
@@ -55,7 +55,7 @@ define zeroext i1 @saddoi16(i16 %v1, i16
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi16:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addw %si, %di
; KNL-NEXT: seto %al
; KNL-NEXT: movw %di, (%rdx)
@@ -69,14 +69,14 @@ define zeroext i1 @saddoi16(i16 %v1, i16
define zeroext i1 @saddoi32(i32 %v1, i32 %v2, i32* %res) {
; SDAG-LABEL: saddoi32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addl %esi, %edi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movl %edi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addl %esi, %edi
; FAST-NEXT: seto %al
; FAST-NEXT: movl %edi, (%rdx)
@@ -85,7 +85,7 @@ define zeroext i1 @saddoi32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addl %esi, %edi
; KNL-NEXT: seto %al
; KNL-NEXT: movl %edi, (%rdx)
@@ -99,14 +99,14 @@ define zeroext i1 @saddoi32(i32 %v1, i32
define zeroext i1 @saddoi64(i64 %v1, i64 %v2, i64* %res) {
; SDAG-LABEL: saddoi64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addq %rsi, %rdi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movq %rdi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq %rsi, %rdi
; FAST-NEXT: seto %al
; FAST-NEXT: movq %rdi, (%rdx)
@@ -115,7 +115,7 @@ define zeroext i1 @saddoi64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addq %rsi, %rdi
; KNL-NEXT: seto %al
; KNL-NEXT: movq %rdi, (%rdx)
@@ -130,14 +130,14 @@ define zeroext i1 @saddoi64(i64 %v1, i64
; SADDO reg, 1 | INC
define zeroext i1 @saddoinci8(i8 %v1, i8* %res) {
; SDAG-LABEL: saddoinci8:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: incb %dil
; SDAG-NEXT: seto %al
; SDAG-NEXT: movb %dil, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoinci8:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: incb %dil
; FAST-NEXT: seto %al
; FAST-NEXT: movb %dil, (%rsi)
@@ -146,7 +146,7 @@ define zeroext i1 @saddoinci8(i8 %v1, i8
; FAST-NEXT: retq
;
; KNL-LABEL: saddoinci8:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: incb %dil
; KNL-NEXT: seto %al
; KNL-NEXT: movb %dil, (%rsi)
@@ -160,14 +160,14 @@ define zeroext i1 @saddoinci8(i8 %v1, i8
define zeroext i1 @saddoinci16(i16 %v1, i16* %res) {
; SDAG-LABEL: saddoinci16:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: incw %di
; SDAG-NEXT: seto %al
; SDAG-NEXT: movw %di, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoinci16:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: incw %di
; FAST-NEXT: seto %al
; FAST-NEXT: movw %di, (%rsi)
@@ -176,7 +176,7 @@ define zeroext i1 @saddoinci16(i16 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoinci16:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: incw %di
; KNL-NEXT: seto %al
; KNL-NEXT: movw %di, (%rsi)
@@ -190,14 +190,14 @@ define zeroext i1 @saddoinci16(i16 %v1,
define zeroext i1 @saddoinci32(i32 %v1, i32* %res) {
; SDAG-LABEL: saddoinci32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: incl %edi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movl %edi, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoinci32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: incl %edi
; FAST-NEXT: seto %al
; FAST-NEXT: movl %edi, (%rsi)
@@ -206,7 +206,7 @@ define zeroext i1 @saddoinci32(i32 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoinci32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: incl %edi
; KNL-NEXT: seto %al
; KNL-NEXT: movl %edi, (%rsi)
@@ -220,14 +220,14 @@ define zeroext i1 @saddoinci32(i32 %v1,
define zeroext i1 @saddoinci64(i64 %v1, i64* %res) {
; SDAG-LABEL: saddoinci64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: incq %rdi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movq %rdi, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoinci64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: incq %rdi
; FAST-NEXT: seto %al
; FAST-NEXT: movq %rdi, (%rsi)
@@ -236,7 +236,7 @@ define zeroext i1 @saddoinci64(i64 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoinci64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: incq %rdi
; KNL-NEXT: seto %al
; KNL-NEXT: movq %rdi, (%rsi)
@@ -252,7 +252,7 @@ define zeroext i1 @saddoinci64(i64 %v1,
; FIXME: DAG doesn't optimize immediates on the LHS.
define zeroext i1 @saddoi64imm1(i64 %v1, i64* %res) {
; SDAG-LABEL: saddoi64imm1:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl $2, %ecx
; SDAG-NEXT: addq %rdi, %rcx
; SDAG-NEXT: seto %al
@@ -260,7 +260,7 @@ define zeroext i1 @saddoi64imm1(i64 %v1,
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi64imm1:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq $2, %rdi
; FAST-NEXT: seto %al
; FAST-NEXT: movq %rdi, (%rsi)
@@ -269,7 +269,7 @@ define zeroext i1 @saddoi64imm1(i64 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi64imm1:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl $2, %ecx
; KNL-NEXT: addq %rdi, %rcx
; KNL-NEXT: seto %al
@@ -285,14 +285,14 @@ define zeroext i1 @saddoi64imm1(i64 %v1,
; Check boundary conditions for large immediates.
define zeroext i1 @saddoi64imm2(i64 %v1, i64* %res) {
; SDAG-LABEL: saddoi64imm2:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addq $-2147483648, %rdi ## imm = 0x80000000
; SDAG-NEXT: seto %al
; SDAG-NEXT: movq %rdi, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi64imm2:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq $-2147483648, %rdi ## imm = 0x80000000
; FAST-NEXT: seto %al
; FAST-NEXT: movq %rdi, (%rsi)
@@ -301,7 +301,7 @@ define zeroext i1 @saddoi64imm2(i64 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi64imm2:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addq $-2147483648, %rdi ## imm = 0x80000000
; KNL-NEXT: seto %al
; KNL-NEXT: movq %rdi, (%rsi)
@@ -315,7 +315,7 @@ define zeroext i1 @saddoi64imm2(i64 %v1,
define zeroext i1 @saddoi64imm3(i64 %v1, i64* %res) {
; SDAG-LABEL: saddoi64imm3:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movabsq $-21474836489, %rcx ## imm = 0xFFFFFFFAFFFFFFF7
; SDAG-NEXT: addq %rdi, %rcx
; SDAG-NEXT: seto %al
@@ -323,7 +323,7 @@ define zeroext i1 @saddoi64imm3(i64 %v1,
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi64imm3:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movabsq $-21474836489, %rax ## imm = 0xFFFFFFFAFFFFFFF7
; FAST-NEXT: addq %rdi, %rax
; FAST-NEXT: seto %cl
@@ -333,7 +333,7 @@ define zeroext i1 @saddoi64imm3(i64 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi64imm3:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movabsq $-21474836489, %rcx ## imm = 0xFFFFFFFAFFFFFFF7
; KNL-NEXT: addq %rdi, %rcx
; KNL-NEXT: seto %al
@@ -348,14 +348,14 @@ define zeroext i1 @saddoi64imm3(i64 %v1,
define zeroext i1 @saddoi64imm4(i64 %v1, i64* %res) {
; SDAG-LABEL: saddoi64imm4:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addq $2147483647, %rdi ## imm = 0x7FFFFFFF
; SDAG-NEXT: seto %al
; SDAG-NEXT: movq %rdi, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi64imm4:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq $2147483647, %rdi ## imm = 0x7FFFFFFF
; FAST-NEXT: seto %al
; FAST-NEXT: movq %rdi, (%rsi)
@@ -364,7 +364,7 @@ define zeroext i1 @saddoi64imm4(i64 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi64imm4:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addq $2147483647, %rdi ## imm = 0x7FFFFFFF
; KNL-NEXT: seto %al
; KNL-NEXT: movq %rdi, (%rsi)
@@ -378,7 +378,7 @@ define zeroext i1 @saddoi64imm4(i64 %v1,
define zeroext i1 @saddoi64imm5(i64 %v1, i64* %res) {
; SDAG-LABEL: saddoi64imm5:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl $2147483648, %ecx ## imm = 0x80000000
; SDAG-NEXT: addq %rdi, %rcx
; SDAG-NEXT: seto %al
@@ -386,7 +386,7 @@ define zeroext i1 @saddoi64imm5(i64 %v1,
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoi64imm5:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl $2147483648, %eax ## imm = 0x80000000
; FAST-NEXT: addq %rdi, %rax
; FAST-NEXT: seto %cl
@@ -396,7 +396,7 @@ define zeroext i1 @saddoi64imm5(i64 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: saddoi64imm5:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl $2147483648, %ecx ## imm = 0x80000000
; KNL-NEXT: addq %rdi, %rcx
; KNL-NEXT: seto %al
@@ -412,14 +412,14 @@ define zeroext i1 @saddoi64imm5(i64 %v1,
; UADDO
define zeroext i1 @uaddoi32(i32 %v1, i32 %v2, i32* %res) {
; SDAG-LABEL: uaddoi32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addl %esi, %edi
; SDAG-NEXT: setb %al
; SDAG-NEXT: movl %edi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoi32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addl %esi, %edi
; FAST-NEXT: setb %al
; FAST-NEXT: movl %edi, (%rdx)
@@ -428,7 +428,7 @@ define zeroext i1 @uaddoi32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoi32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addl %esi, %edi
; KNL-NEXT: setb %al
; KNL-NEXT: movl %edi, (%rdx)
@@ -442,14 +442,14 @@ define zeroext i1 @uaddoi32(i32 %v1, i32
define zeroext i1 @uaddoi64(i64 %v1, i64 %v2, i64* %res) {
; SDAG-LABEL: uaddoi64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addq %rsi, %rdi
; SDAG-NEXT: setb %al
; SDAG-NEXT: movq %rdi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoi64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq %rsi, %rdi
; FAST-NEXT: setb %al
; FAST-NEXT: movq %rdi, (%rdx)
@@ -458,7 +458,7 @@ define zeroext i1 @uaddoi64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoi64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addq %rsi, %rdi
; KNL-NEXT: setb %al
; KNL-NEXT: movq %rdi, (%rdx)
@@ -473,14 +473,14 @@ define zeroext i1 @uaddoi64(i64 %v1, i64
; UADDO reg, 1 | NOT INC
define zeroext i1 @uaddoinci8(i8 %v1, i8* %res) {
; SDAG-LABEL: uaddoinci8:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addb $1, %dil
; SDAG-NEXT: setb %al
; SDAG-NEXT: movb %dil, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoinci8:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addb $1, %dil
; FAST-NEXT: setb %al
; FAST-NEXT: movb %dil, (%rsi)
@@ -489,7 +489,7 @@ define zeroext i1 @uaddoinci8(i8 %v1, i8
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoinci8:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addb $1, %dil
; KNL-NEXT: setb %al
; KNL-NEXT: movb %dil, (%rsi)
@@ -503,14 +503,14 @@ define zeroext i1 @uaddoinci8(i8 %v1, i8
define zeroext i1 @uaddoinci16(i16 %v1, i16* %res) {
; SDAG-LABEL: uaddoinci16:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addw $1, %di
; SDAG-NEXT: setb %al
; SDAG-NEXT: movw %di, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoinci16:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addw $1, %di
; FAST-NEXT: setb %al
; FAST-NEXT: movw %di, (%rsi)
@@ -519,7 +519,7 @@ define zeroext i1 @uaddoinci16(i16 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoinci16:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addw $1, %di
; KNL-NEXT: setb %al
; KNL-NEXT: movw %di, (%rsi)
@@ -533,14 +533,14 @@ define zeroext i1 @uaddoinci16(i16 %v1,
define zeroext i1 @uaddoinci32(i32 %v1, i32* %res) {
; SDAG-LABEL: uaddoinci32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addl $1, %edi
; SDAG-NEXT: setb %al
; SDAG-NEXT: movl %edi, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoinci32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addl $1, %edi
; FAST-NEXT: setb %al
; FAST-NEXT: movl %edi, (%rsi)
@@ -549,7 +549,7 @@ define zeroext i1 @uaddoinci32(i32 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoinci32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addl $1, %edi
; KNL-NEXT: setb %al
; KNL-NEXT: movl %edi, (%rsi)
@@ -563,14 +563,14 @@ define zeroext i1 @uaddoinci32(i32 %v1,
define zeroext i1 @uaddoinci64(i64 %v1, i64* %res) {
; SDAG-LABEL: uaddoinci64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addq $1, %rdi
; SDAG-NEXT: setb %al
; SDAG-NEXT: movq %rdi, (%rsi)
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoinci64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq $1, %rdi
; FAST-NEXT: setb %al
; FAST-NEXT: movq %rdi, (%rsi)
@@ -579,7 +579,7 @@ define zeroext i1 @uaddoinci64(i64 %v1,
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoinci64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addq $1, %rdi
; KNL-NEXT: setb %al
; KNL-NEXT: movq %rdi, (%rsi)
@@ -594,14 +594,14 @@ define zeroext i1 @uaddoinci64(i64 %v1,
; SSUBO
define zeroext i1 @ssuboi32(i32 %v1, i32 %v2, i32* %res) {
; SDAG-LABEL: ssuboi32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: subl %esi, %edi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movl %edi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: ssuboi32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: subl %esi, %edi
; FAST-NEXT: seto %al
; FAST-NEXT: movl %edi, (%rdx)
@@ -610,7 +610,7 @@ define zeroext i1 @ssuboi32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: ssuboi32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: subl %esi, %edi
; KNL-NEXT: seto %al
; KNL-NEXT: movl %edi, (%rdx)
@@ -624,14 +624,14 @@ define zeroext i1 @ssuboi32(i32 %v1, i32
define zeroext i1 @ssuboi64(i64 %v1, i64 %v2, i64* %res) {
; SDAG-LABEL: ssuboi64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: subq %rsi, %rdi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movq %rdi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: ssuboi64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: subq %rsi, %rdi
; FAST-NEXT: seto %al
; FAST-NEXT: movq %rdi, (%rdx)
@@ -640,7 +640,7 @@ define zeroext i1 @ssuboi64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: ssuboi64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: subq %rsi, %rdi
; KNL-NEXT: seto %al
; KNL-NEXT: movq %rdi, (%rdx)
@@ -655,14 +655,14 @@ define zeroext i1 @ssuboi64(i64 %v1, i64
; USUBO
define zeroext i1 @usuboi32(i32 %v1, i32 %v2, i32* %res) {
; SDAG-LABEL: usuboi32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: subl %esi, %edi
; SDAG-NEXT: setb %al
; SDAG-NEXT: movl %edi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: usuboi32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: subl %esi, %edi
; FAST-NEXT: setb %al
; FAST-NEXT: movl %edi, (%rdx)
@@ -671,7 +671,7 @@ define zeroext i1 @usuboi32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: usuboi32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: subl %esi, %edi
; KNL-NEXT: setb %al
; KNL-NEXT: movl %edi, (%rdx)
@@ -685,14 +685,14 @@ define zeroext i1 @usuboi32(i32 %v1, i32
define zeroext i1 @usuboi64(i64 %v1, i64 %v2, i64* %res) {
; SDAG-LABEL: usuboi64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: subq %rsi, %rdi
; SDAG-NEXT: setb %al
; SDAG-NEXT: movq %rdi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: usuboi64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: subq %rsi, %rdi
; FAST-NEXT: setb %al
; FAST-NEXT: movq %rdi, (%rdx)
@@ -701,7 +701,7 @@ define zeroext i1 @usuboi64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: usuboi64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: subq %rsi, %rdi
; KNL-NEXT: setb %al
; KNL-NEXT: movq %rdi, (%rdx)
@@ -718,7 +718,7 @@ define zeroext i1 @usuboi64(i64 %v1, i64
;
define i32 @saddoselecti32(i32 %v1, i32 %v2) {
; SDAG-LABEL: saddoselecti32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: addl %esi, %eax
; SDAG-NEXT: cmovol %edi, %esi
@@ -726,7 +726,7 @@ define i32 @saddoselecti32(i32 %v1, i32
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoselecti32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: addl %esi, %eax
; FAST-NEXT: cmovol %edi, %esi
@@ -734,7 +734,7 @@ define i32 @saddoselecti32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: saddoselecti32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: addl %esi, %eax
; KNL-NEXT: cmovol %edi, %esi
@@ -748,7 +748,7 @@ define i32 @saddoselecti32(i32 %v1, i32
define i64 @saddoselecti64(i64 %v1, i64 %v2) {
; SDAG-LABEL: saddoselecti64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdi, %rax
; SDAG-NEXT: addq %rsi, %rax
; SDAG-NEXT: cmovoq %rdi, %rsi
@@ -756,7 +756,7 @@ define i64 @saddoselecti64(i64 %v1, i64
; SDAG-NEXT: retq
;
; FAST-LABEL: saddoselecti64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: addq %rsi, %rax
; FAST-NEXT: cmovoq %rdi, %rsi
@@ -764,7 +764,7 @@ define i64 @saddoselecti64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: saddoselecti64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: addq %rsi, %rax
; KNL-NEXT: cmovoq %rdi, %rsi
@@ -778,7 +778,7 @@ define i64 @saddoselecti64(i64 %v1, i64
define i32 @uaddoselecti32(i32 %v1, i32 %v2) {
; SDAG-LABEL: uaddoselecti32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: addl %esi, %eax
; SDAG-NEXT: cmovbl %edi, %esi
@@ -786,7 +786,7 @@ define i32 @uaddoselecti32(i32 %v1, i32
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoselecti32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: addl %esi, %eax
; FAST-NEXT: cmovbl %edi, %esi
@@ -794,7 +794,7 @@ define i32 @uaddoselecti32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoselecti32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: addl %esi, %eax
; KNL-NEXT: cmovbl %edi, %esi
@@ -808,7 +808,7 @@ define i32 @uaddoselecti32(i32 %v1, i32
define i64 @uaddoselecti64(i64 %v1, i64 %v2) {
; SDAG-LABEL: uaddoselecti64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdi, %rax
; SDAG-NEXT: addq %rsi, %rax
; SDAG-NEXT: cmovbq %rdi, %rsi
@@ -816,7 +816,7 @@ define i64 @uaddoselecti64(i64 %v1, i64
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoselecti64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: addq %rsi, %rax
; FAST-NEXT: cmovbq %rdi, %rsi
@@ -824,7 +824,7 @@ define i64 @uaddoselecti64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoselecti64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: addq %rsi, %rax
; KNL-NEXT: cmovbq %rdi, %rsi
@@ -838,21 +838,21 @@ define i64 @uaddoselecti64(i64 %v1, i64
define i32 @ssuboselecti32(i32 %v1, i32 %v2) {
; SDAG-LABEL: ssuboselecti32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpl %esi, %edi
; SDAG-NEXT: cmovol %edi, %esi
; SDAG-NEXT: movl %esi, %eax
; SDAG-NEXT: retq
;
; FAST-LABEL: ssuboselecti32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpl %esi, %edi
; FAST-NEXT: cmovol %edi, %esi
; FAST-NEXT: movl %esi, %eax
; FAST-NEXT: retq
;
; KNL-LABEL: ssuboselecti32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpl %esi, %edi
; KNL-NEXT: cmovol %edi, %esi
; KNL-NEXT: movl %esi, %eax
@@ -865,21 +865,21 @@ define i32 @ssuboselecti32(i32 %v1, i32
define i64 @ssuboselecti64(i64 %v1, i64 %v2) {
; SDAG-LABEL: ssuboselecti64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpq %rsi, %rdi
; SDAG-NEXT: cmovoq %rdi, %rsi
; SDAG-NEXT: movq %rsi, %rax
; SDAG-NEXT: retq
;
; FAST-LABEL: ssuboselecti64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpq %rsi, %rdi
; FAST-NEXT: cmovoq %rdi, %rsi
; FAST-NEXT: movq %rsi, %rax
; FAST-NEXT: retq
;
; KNL-LABEL: ssuboselecti64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpq %rsi, %rdi
; KNL-NEXT: cmovoq %rdi, %rsi
; KNL-NEXT: movq %rsi, %rax
@@ -892,21 +892,21 @@ define i64 @ssuboselecti64(i64 %v1, i64
define i32 @usuboselecti32(i32 %v1, i32 %v2) {
; SDAG-LABEL: usuboselecti32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpl %esi, %edi
; SDAG-NEXT: cmovbl %edi, %esi
; SDAG-NEXT: movl %esi, %eax
; SDAG-NEXT: retq
;
; FAST-LABEL: usuboselecti32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpl %esi, %edi
; FAST-NEXT: cmovbl %edi, %esi
; FAST-NEXT: movl %esi, %eax
; FAST-NEXT: retq
;
; KNL-LABEL: usuboselecti32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpl %esi, %edi
; KNL-NEXT: cmovbl %edi, %esi
; KNL-NEXT: movl %esi, %eax
@@ -919,21 +919,21 @@ define i32 @usuboselecti32(i32 %v1, i32
define i64 @usuboselecti64(i64 %v1, i64 %v2) {
; SDAG-LABEL: usuboselecti64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpq %rsi, %rdi
; SDAG-NEXT: cmovbq %rdi, %rsi
; SDAG-NEXT: movq %rsi, %rax
; SDAG-NEXT: retq
;
; FAST-LABEL: usuboselecti64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpq %rsi, %rdi
; FAST-NEXT: cmovbq %rdi, %rsi
; FAST-NEXT: movq %rsi, %rax
; FAST-NEXT: retq
;
; KNL-LABEL: usuboselecti64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpq %rsi, %rdi
; KNL-NEXT: cmovbq %rdi, %rsi
; KNL-NEXT: movq %rsi, %rax
@@ -949,10 +949,10 @@ define i64 @usuboselecti64(i64 %v1, i64
;
define zeroext i1 @saddobri32(i32 %v1, i32 %v2) {
; SDAG-LABEL: saddobri32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addl %esi, %edi
; SDAG-NEXT: jo LBB31_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB31_1: ## %overflow
@@ -960,10 +960,10 @@ define zeroext i1 @saddobri32(i32 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: saddobri32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addl %esi, %edi
; FAST-NEXT: jo LBB31_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -975,10 +975,10 @@ define zeroext i1 @saddobri32(i32 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: saddobri32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addl %esi, %edi
; KNL-NEXT: jo LBB31_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB31_1: ## %overflow
@@ -998,10 +998,10 @@ continue:
define zeroext i1 @saddobri64(i64 %v1, i64 %v2) {
; SDAG-LABEL: saddobri64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addq %rsi, %rdi
; SDAG-NEXT: jo LBB32_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB32_1: ## %overflow
@@ -1009,10 +1009,10 @@ define zeroext i1 @saddobri64(i64 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: saddobri64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq %rsi, %rdi
; FAST-NEXT: jo LBB32_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -1024,10 +1024,10 @@ define zeroext i1 @saddobri64(i64 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: saddobri64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addq %rsi, %rdi
; KNL-NEXT: jo LBB32_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB32_1: ## %overflow
@@ -1047,10 +1047,10 @@ continue:
define zeroext i1 @uaddobri32(i32 %v1, i32 %v2) {
; SDAG-LABEL: uaddobri32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addl %esi, %edi
; SDAG-NEXT: jb LBB33_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB33_1: ## %overflow
@@ -1058,10 +1058,10 @@ define zeroext i1 @uaddobri32(i32 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddobri32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addl %esi, %edi
; FAST-NEXT: jb LBB33_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -1073,10 +1073,10 @@ define zeroext i1 @uaddobri32(i32 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: uaddobri32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addl %esi, %edi
; KNL-NEXT: jb LBB33_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB33_1: ## %overflow
@@ -1096,10 +1096,10 @@ continue:
define zeroext i1 @uaddobri64(i64 %v1, i64 %v2) {
; SDAG-LABEL: uaddobri64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: addq %rsi, %rdi
; SDAG-NEXT: jb LBB34_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB34_1: ## %overflow
@@ -1107,10 +1107,10 @@ define zeroext i1 @uaddobri64(i64 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddobri64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: addq %rsi, %rdi
; FAST-NEXT: jb LBB34_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -1122,10 +1122,10 @@ define zeroext i1 @uaddobri64(i64 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: uaddobri64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: addq %rsi, %rdi
; KNL-NEXT: jb LBB34_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB34_1: ## %overflow
@@ -1145,10 +1145,10 @@ continue:
define zeroext i1 @ssubobri32(i32 %v1, i32 %v2) {
; SDAG-LABEL: ssubobri32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpl %esi, %edi
; SDAG-NEXT: jo LBB35_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB35_1: ## %overflow
@@ -1156,10 +1156,10 @@ define zeroext i1 @ssubobri32(i32 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: ssubobri32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpl %esi, %edi
; FAST-NEXT: jo LBB35_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -1171,10 +1171,10 @@ define zeroext i1 @ssubobri32(i32 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: ssubobri32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpl %esi, %edi
; KNL-NEXT: jo LBB35_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB35_1: ## %overflow
@@ -1194,10 +1194,10 @@ continue:
define zeroext i1 @ssubobri64(i64 %v1, i64 %v2) {
; SDAG-LABEL: ssubobri64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpq %rsi, %rdi
; SDAG-NEXT: jo LBB36_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB36_1: ## %overflow
@@ -1205,10 +1205,10 @@ define zeroext i1 @ssubobri64(i64 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: ssubobri64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpq %rsi, %rdi
; FAST-NEXT: jo LBB36_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -1220,10 +1220,10 @@ define zeroext i1 @ssubobri64(i64 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: ssubobri64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpq %rsi, %rdi
; KNL-NEXT: jo LBB36_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB36_1: ## %overflow
@@ -1243,10 +1243,10 @@ continue:
define zeroext i1 @usubobri32(i32 %v1, i32 %v2) {
; SDAG-LABEL: usubobri32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpl %esi, %edi
; SDAG-NEXT: jb LBB37_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB37_1: ## %overflow
@@ -1254,10 +1254,10 @@ define zeroext i1 @usubobri32(i32 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: usubobri32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpl %esi, %edi
; FAST-NEXT: jb LBB37_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -1269,10 +1269,10 @@ define zeroext i1 @usubobri32(i32 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: usubobri32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpl %esi, %edi
; KNL-NEXT: jb LBB37_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB37_1: ## %overflow
@@ -1292,10 +1292,10 @@ continue:
define zeroext i1 @usubobri64(i64 %v1, i64 %v2) {
; SDAG-LABEL: usubobri64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: cmpq %rsi, %rdi
; SDAG-NEXT: jb LBB38_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB38_1: ## %overflow
@@ -1303,10 +1303,10 @@ define zeroext i1 @usubobri64(i64 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: usubobri64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: cmpq %rsi, %rdi
; FAST-NEXT: jb LBB38_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -1318,10 +1318,10 @@ define zeroext i1 @usubobri64(i64 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: usubobri64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: cmpq %rsi, %rdi
; KNL-NEXT: jb LBB38_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB38_1: ## %overflow
@@ -1341,7 +1341,7 @@ continue:
define {i64, i1} @uaddoovf(i64 %a, i64 %b) {
; SDAG-LABEL: uaddoovf:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movzbl %dil, %ecx
; SDAG-NEXT: movzbl %sil, %eax
; SDAG-NEXT: addq %rcx, %rax
@@ -1349,7 +1349,7 @@ define {i64, i1} @uaddoovf(i64 %a, i64 %
; SDAG-NEXT: retq
;
; FAST-LABEL: uaddoovf:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movzbl %dil, %ecx
; FAST-NEXT: movzbl %sil, %eax
; FAST-NEXT: addq %rcx, %rax
@@ -1357,7 +1357,7 @@ define {i64, i1} @uaddoovf(i64 %a, i64 %
; FAST-NEXT: retq
;
; KNL-LABEL: uaddoovf:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movzbl %dil, %ecx
; KNL-NEXT: movzbl %sil, %eax
; KNL-NEXT: addq %rcx, %rax
@@ -1371,21 +1371,21 @@ define {i64, i1} @uaddoovf(i64 %a, i64 %
define {i64, i1} @usuboovf(i64 %a, i64 %b) {
; SDAG-LABEL: usuboovf:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: notq %rsi
; SDAG-NEXT: xorl %edx, %edx
; SDAG-NEXT: movq %rsi, %rax
; SDAG-NEXT: retq
;
; FAST-LABEL: usuboovf:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: notq %rsi
; FAST-NEXT: xorl %edx, %edx
; FAST-NEXT: movq %rsi, %rax
; FAST-NEXT: retq
;
; KNL-LABEL: usuboovf:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: notq %rsi
; KNL-NEXT: xorl %edx, %edx
; KNL-NEXT: movq %rsi, %rax
Modified: llvm/trunk/test/CodeGen/X86/xchg-nofold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xchg-nofold.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xchg-nofold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xchg-nofold.ll Mon Dec 4 09:18:51 2017
@@ -8,13 +8,13 @@
; CHECK-LABEL: _Z3fooRSt6atomicIbEb
define zeroext i1 @_Z3fooRSt6atomicIbEb(%"struct.std::atomic"* nocapture dereferenceable(1) %a, i1 returned zeroext %b) nounwind {
; CHECK-LABEL: _Z3fooRSt6atomicIbEb:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: shrq $3, %rax
; CHECK-NEXT: movb 2147450880(%rax), %al
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je .LBB0_3
-; CHECK-NEXT: # BB#1:
+; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: movl %edi, %ecx
; CHECK-NEXT: andl $7, %ecx
; CHECK-NEXT: cmpb %al, %cl
Modified: llvm/trunk/test/CodeGen/X86/xmulo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xmulo.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xmulo.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xmulo.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define {i64, i1} @t1() nounwind {
; SDAG-LABEL: t1:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl $8, %ecx
; SDAG-NEXT: movl $9, %eax
; SDAG-NEXT: mulq %rcx
@@ -13,7 +13,7 @@ define {i64, i1} @t1() nounwind {
; SDAG-NEXT: retq
;
; FAST-LABEL: t1:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl $8, %ecx
; FAST-NEXT: movl $9, %eax
; FAST-NEXT: mulq %rcx
@@ -21,7 +21,7 @@ define {i64, i1} @t1() nounwind {
; FAST-NEXT: retq
;
; KNL-LABEL: t1:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl $8, %ecx
; KNL-NEXT: movl $9, %eax
; KNL-NEXT: mulq %rcx
@@ -33,7 +33,7 @@ define {i64, i1} @t1() nounwind {
define {i64, i1} @t2() nounwind {
; SDAG-LABEL: t2:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: xorl %ecx, %ecx
; SDAG-NEXT: movl $9, %eax
; SDAG-NEXT: mulq %rcx
@@ -41,7 +41,7 @@ define {i64, i1} @t2() nounwind {
; SDAG-NEXT: retq
;
; FAST-LABEL: t2:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: xorl %ecx, %ecx
; FAST-NEXT: movl $9, %eax
; FAST-NEXT: mulq %rcx
@@ -49,7 +49,7 @@ define {i64, i1} @t2() nounwind {
; FAST-NEXT: retq
;
; KNL-LABEL: t2:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: xorl %ecx, %ecx
; KNL-NEXT: movl $9, %eax
; KNL-NEXT: mulq %rcx
@@ -61,7 +61,7 @@ define {i64, i1} @t2() nounwind {
define {i64, i1} @t3() nounwind {
; SDAG-LABEL: t3:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq $-1, %rcx
; SDAG-NEXT: movl $9, %eax
; SDAG-NEXT: mulq %rcx
@@ -69,7 +69,7 @@ define {i64, i1} @t3() nounwind {
; SDAG-NEXT: retq
;
; FAST-LABEL: t3:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq $-1, %rcx
; FAST-NEXT: movl $9, %eax
; FAST-NEXT: mulq %rcx
@@ -77,7 +77,7 @@ define {i64, i1} @t3() nounwind {
; FAST-NEXT: retq
;
; KNL-LABEL: t3:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq $-1, %rcx
; KNL-NEXT: movl $9, %eax
; KNL-NEXT: mulq %rcx
@@ -90,7 +90,7 @@ define {i64, i1} @t3() nounwind {
; SMULO
define zeroext i1 @smuloi8(i8 %v1, i8 %v2, i8* %res) {
; SDAG-LABEL: smuloi8:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: imulb %sil
; SDAG-NEXT: seto %cl
@@ -99,7 +99,7 @@ define zeroext i1 @smuloi8(i8 %v1, i8 %v
; SDAG-NEXT: retq
;
; FAST-LABEL: smuloi8:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: imulb %sil
; FAST-NEXT: seto %cl
@@ -109,7 +109,7 @@ define zeroext i1 @smuloi8(i8 %v1, i8 %v
; FAST-NEXT: retq
;
; KNL-LABEL: smuloi8:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: imulb %sil
; KNL-NEXT: seto %cl
@@ -125,14 +125,14 @@ define zeroext i1 @smuloi8(i8 %v1, i8 %v
define zeroext i1 @smuloi16(i16 %v1, i16 %v2, i16* %res) {
; SDAG-LABEL: smuloi16:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: imulw %si, %di
; SDAG-NEXT: seto %al
; SDAG-NEXT: movw %di, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: smuloi16:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: imulw %si, %di
; FAST-NEXT: seto %al
; FAST-NEXT: movw %di, (%rdx)
@@ -141,7 +141,7 @@ define zeroext i1 @smuloi16(i16 %v1, i16
; FAST-NEXT: retq
;
; KNL-LABEL: smuloi16:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: imulw %si, %di
; KNL-NEXT: seto %al
; KNL-NEXT: movw %di, (%rdx)
@@ -155,14 +155,14 @@ define zeroext i1 @smuloi16(i16 %v1, i16
define zeroext i1 @smuloi32(i32 %v1, i32 %v2, i32* %res) {
; SDAG-LABEL: smuloi32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: imull %esi, %edi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movl %edi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: smuloi32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: imull %esi, %edi
; FAST-NEXT: seto %al
; FAST-NEXT: movl %edi, (%rdx)
@@ -171,7 +171,7 @@ define zeroext i1 @smuloi32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: smuloi32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: imull %esi, %edi
; KNL-NEXT: seto %al
; KNL-NEXT: movl %edi, (%rdx)
@@ -185,14 +185,14 @@ define zeroext i1 @smuloi32(i32 %v1, i32
define zeroext i1 @smuloi64(i64 %v1, i64 %v2, i64* %res) {
; SDAG-LABEL: smuloi64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: imulq %rsi, %rdi
; SDAG-NEXT: seto %al
; SDAG-NEXT: movq %rdi, (%rdx)
; SDAG-NEXT: retq
;
; FAST-LABEL: smuloi64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: imulq %rsi, %rdi
; FAST-NEXT: seto %al
; FAST-NEXT: movq %rdi, (%rdx)
@@ -201,7 +201,7 @@ define zeroext i1 @smuloi64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: smuloi64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: imulq %rsi, %rdi
; KNL-NEXT: seto %al
; KNL-NEXT: movq %rdi, (%rdx)
@@ -216,7 +216,7 @@ define zeroext i1 @smuloi64(i64 %v1, i64
; UMULO
define zeroext i1 @umuloi8(i8 %v1, i8 %v2, i8* %res) {
; SDAG-LABEL: umuloi8:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: mulb %sil
; SDAG-NEXT: seto %cl
@@ -225,7 +225,7 @@ define zeroext i1 @umuloi8(i8 %v1, i8 %v
; SDAG-NEXT: retq
;
; FAST-LABEL: umuloi8:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: mulb %sil
; FAST-NEXT: seto %cl
@@ -235,7 +235,7 @@ define zeroext i1 @umuloi8(i8 %v1, i8 %v
; FAST-NEXT: retq
;
; KNL-LABEL: umuloi8:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: mulb %sil
; KNL-NEXT: seto %cl
@@ -251,7 +251,7 @@ define zeroext i1 @umuloi8(i8 %v1, i8 %v
define zeroext i1 @umuloi16(i16 %v1, i16 %v2, i16* %res) {
; SDAG-LABEL: umuloi16:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdx, %rcx
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: mulw %si
@@ -261,7 +261,7 @@ define zeroext i1 @umuloi16(i16 %v1, i16
; SDAG-NEXT: retq
;
; FAST-LABEL: umuloi16:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdx, %rcx
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: mulw %si
@@ -272,7 +272,7 @@ define zeroext i1 @umuloi16(i16 %v1, i16
; FAST-NEXT: retq
;
; KNL-LABEL: umuloi16:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdx, %rcx
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: mulw %si
@@ -289,7 +289,7 @@ define zeroext i1 @umuloi16(i16 %v1, i16
define zeroext i1 @umuloi32(i32 %v1, i32 %v2, i32* %res) {
; SDAG-LABEL: umuloi32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdx, %rcx
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: mull %esi
@@ -299,7 +299,7 @@ define zeroext i1 @umuloi32(i32 %v1, i32
; SDAG-NEXT: retq
;
; FAST-LABEL: umuloi32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdx, %rcx
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: mull %esi
@@ -310,7 +310,7 @@ define zeroext i1 @umuloi32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: umuloi32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdx, %rcx
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: mull %esi
@@ -327,7 +327,7 @@ define zeroext i1 @umuloi32(i32 %v1, i32
define zeroext i1 @umuloi64(i64 %v1, i64 %v2, i64* %res) {
; SDAG-LABEL: umuloi64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdx, %rcx
; SDAG-NEXT: movq %rdi, %rax
; SDAG-NEXT: mulq %rsi
@@ -337,7 +337,7 @@ define zeroext i1 @umuloi64(i64 %v1, i64
; SDAG-NEXT: retq
;
; FAST-LABEL: umuloi64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdx, %rcx
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: mulq %rsi
@@ -348,7 +348,7 @@ define zeroext i1 @umuloi64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: umuloi64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdx, %rcx
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: mulq %rsi
@@ -368,7 +368,7 @@ define zeroext i1 @umuloi64(i64 %v1, i64
;
define i32 @smuloselecti32(i32 %v1, i32 %v2) {
; SDAG-LABEL: smuloselecti32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: imull %esi, %eax
; SDAG-NEXT: cmovol %edi, %esi
@@ -376,7 +376,7 @@ define i32 @smuloselecti32(i32 %v1, i32
; SDAG-NEXT: retq
;
; FAST-LABEL: smuloselecti32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: imull %esi, %eax
; FAST-NEXT: cmovol %edi, %esi
@@ -384,7 +384,7 @@ define i32 @smuloselecti32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: smuloselecti32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: imull %esi, %eax
; KNL-NEXT: cmovol %edi, %esi
@@ -398,7 +398,7 @@ define i32 @smuloselecti32(i32 %v1, i32
define i64 @smuloselecti64(i64 %v1, i64 %v2) {
; SDAG-LABEL: smuloselecti64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdi, %rax
; SDAG-NEXT: imulq %rsi, %rax
; SDAG-NEXT: cmovoq %rdi, %rsi
@@ -406,7 +406,7 @@ define i64 @smuloselecti64(i64 %v1, i64
; SDAG-NEXT: retq
;
; FAST-LABEL: smuloselecti64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: imulq %rsi, %rax
; FAST-NEXT: cmovoq %rdi, %rsi
@@ -414,7 +414,7 @@ define i64 @smuloselecti64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: smuloselecti64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: imulq %rsi, %rax
; KNL-NEXT: cmovoq %rdi, %rsi
@@ -428,7 +428,7 @@ define i64 @smuloselecti64(i64 %v1, i64
define i32 @umuloselecti32(i32 %v1, i32 %v2) {
; SDAG-LABEL: umuloselecti32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: mull %esi
; SDAG-NEXT: cmovol %edi, %esi
@@ -436,7 +436,7 @@ define i32 @umuloselecti32(i32 %v1, i32
; SDAG-NEXT: retq
;
; FAST-LABEL: umuloselecti32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: mull %esi
; FAST-NEXT: cmovol %edi, %esi
@@ -444,7 +444,7 @@ define i32 @umuloselecti32(i32 %v1, i32
; FAST-NEXT: retq
;
; KNL-LABEL: umuloselecti32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: mull %esi
; KNL-NEXT: cmovol %edi, %esi
@@ -458,7 +458,7 @@ define i32 @umuloselecti32(i32 %v1, i32
define i64 @umuloselecti64(i64 %v1, i64 %v2) {
; SDAG-LABEL: umuloselecti64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdi, %rax
; SDAG-NEXT: mulq %rsi
; SDAG-NEXT: cmovoq %rdi, %rsi
@@ -466,7 +466,7 @@ define i64 @umuloselecti64(i64 %v1, i64
; SDAG-NEXT: retq
;
; FAST-LABEL: umuloselecti64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: mulq %rsi
; FAST-NEXT: cmovoq %rdi, %rsi
@@ -474,7 +474,7 @@ define i64 @umuloselecti64(i64 %v1, i64
; FAST-NEXT: retq
;
; KNL-LABEL: umuloselecti64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: mulq %rsi
; KNL-NEXT: cmovoq %rdi, %rsi
@@ -491,10 +491,10 @@ define i64 @umuloselecti64(i64 %v1, i64
;
define zeroext i1 @smulobri32(i32 %v1, i32 %v2) {
; SDAG-LABEL: smulobri32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: imull %esi, %edi
; SDAG-NEXT: jo LBB15_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB15_1: ## %overflow
@@ -502,10 +502,10 @@ define zeroext i1 @smulobri32(i32 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: smulobri32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: imull %esi, %edi
; FAST-NEXT: jo LBB15_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -517,10 +517,10 @@ define zeroext i1 @smulobri32(i32 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: smulobri32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: imull %esi, %edi
; KNL-NEXT: jo LBB15_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB15_1: ## %overflow
@@ -540,10 +540,10 @@ continue:
define zeroext i1 @smulobri64(i64 %v1, i64 %v2) {
; SDAG-LABEL: smulobri64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: imulq %rsi, %rdi
; SDAG-NEXT: jo LBB16_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB16_1: ## %overflow
@@ -551,10 +551,10 @@ define zeroext i1 @smulobri64(i64 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: smulobri64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: imulq %rsi, %rdi
; FAST-NEXT: jo LBB16_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -566,10 +566,10 @@ define zeroext i1 @smulobri64(i64 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: smulobri64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: imulq %rsi, %rdi
; KNL-NEXT: jo LBB16_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB16_1: ## %overflow
@@ -589,11 +589,11 @@ continue:
define zeroext i1 @umulobri32(i32 %v1, i32 %v2) {
; SDAG-LABEL: umulobri32:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl %edi, %eax
; SDAG-NEXT: mull %esi
; SDAG-NEXT: jo LBB17_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB17_1: ## %overflow
@@ -601,11 +601,11 @@ define zeroext i1 @umulobri32(i32 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: umulobri32:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl %edi, %eax
; FAST-NEXT: mull %esi
; FAST-NEXT: jo LBB17_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -617,11 +617,11 @@ define zeroext i1 @umulobri32(i32 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: umulobri32:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl %edi, %eax
; KNL-NEXT: mull %esi
; KNL-NEXT: jo LBB17_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB17_1: ## %overflow
@@ -641,11 +641,11 @@ continue:
define zeroext i1 @umulobri64(i64 %v1, i64 %v2) {
; SDAG-LABEL: umulobri64:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movq %rdi, %rax
; SDAG-NEXT: mulq %rsi
; SDAG-NEXT: jo LBB18_1
-; SDAG-NEXT: ## BB#2: ## %continue
+; SDAG-NEXT: ## %bb.2: ## %continue
; SDAG-NEXT: movb $1, %al
; SDAG-NEXT: retq
; SDAG-NEXT: LBB18_1: ## %overflow
@@ -653,11 +653,11 @@ define zeroext i1 @umulobri64(i64 %v1, i
; SDAG-NEXT: retq
;
; FAST-LABEL: umulobri64:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: mulq %rsi
; FAST-NEXT: jo LBB18_1
-; FAST-NEXT: ## BB#2: ## %continue
+; FAST-NEXT: ## %bb.2: ## %continue
; FAST-NEXT: movb $1, %al
; FAST-NEXT: andb $1, %al
; FAST-NEXT: movzbl %al, %eax
@@ -669,11 +669,11 @@ define zeroext i1 @umulobri64(i64 %v1, i
; FAST-NEXT: retq
;
; KNL-LABEL: umulobri64:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: mulq %rsi
; KNL-NEXT: jo LBB18_1
-; KNL-NEXT: ## BB#2: ## %continue
+; KNL-NEXT: ## %bb.2: ## %continue
; KNL-NEXT: movb $1, %al
; KNL-NEXT: retq
; KNL-NEXT: LBB18_1: ## %overflow
@@ -693,7 +693,7 @@ continue:
define i1 @bug27873(i64 %c1, i1 %c2) {
; SDAG-LABEL: bug27873:
-; SDAG: ## BB#0:
+; SDAG: ## %bb.0:
; SDAG-NEXT: movl $160, %ecx
; SDAG-NEXT: movq %rdi, %rax
; SDAG-NEXT: mulq %rcx
@@ -702,7 +702,7 @@ define i1 @bug27873(i64 %c1, i1 %c2) {
; SDAG-NEXT: retq
;
; FAST-LABEL: bug27873:
-; FAST: ## BB#0:
+; FAST: ## %bb.0:
; FAST-NEXT: movl $160, %ecx
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: mulq %rcx
@@ -711,7 +711,7 @@ define i1 @bug27873(i64 %c1, i1 %c2) {
; FAST-NEXT: retq
;
; KNL-LABEL: bug27873:
-; KNL: ## BB#0:
+; KNL: ## %bb.0:
; KNL-NEXT: movl $160, %ecx
; KNL-NEXT: movq %rdi, %rax
; KNL-NEXT: mulq %rcx
Modified: llvm/trunk/test/CodeGen/X86/xop-ifma.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xop-ifma.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xop-ifma.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xop-ifma.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define <8 x i16> @test_mul_v8i16_add_v8i16(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) {
; XOP-LABEL: test_mul_v8i16_add_v8i16:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0
; XOP-NEXT: retq
%1 = mul <8 x i16> %a0, %a1
@@ -14,7 +14,7 @@ define <8 x i16> @test_mul_v8i16_add_v8i
define <16 x i16> @test_mul_v16i16_add_v16i16(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a2) {
; XOP-AVX1-LABEL: test_mul_v16i16_add_v16i16:
-; XOP-AVX1: # BB#0:
+; XOP-AVX1: # %bb.0:
; XOP-AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; XOP-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
; XOP-AVX1-NEXT: vextractf128 $1, %ymm2, %xmm5
@@ -24,7 +24,7 @@ define <16 x i16> @test_mul_v16i16_add_v
; XOP-AVX1-NEXT: retq
;
; XOP-AVX2-LABEL: test_mul_v16i16_add_v16i16:
-; XOP-AVX2: # BB#0:
+; XOP-AVX2: # %bb.0:
; XOP-AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0
; XOP-AVX2-NEXT: vpaddw %ymm0, %ymm2, %ymm0
; XOP-AVX2-NEXT: retq
@@ -35,7 +35,7 @@ define <16 x i16> @test_mul_v16i16_add_v
define <4 x i32> @test_mul_v4i32_add_v4i32(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2) {
; XOP-LABEL: test_mul_v4i32_add_v4i32:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0
; XOP-NEXT: retq
%1 = mul <4 x i32> %a0, %a1
@@ -45,7 +45,7 @@ define <4 x i32> @test_mul_v4i32_add_v4i
define <8 x i32> @test_mul_v8i32_add_v8i32(<8 x i32> %a0, <8 x i32> %a1, <8 x i32> %a2) {
; XOP-AVX1-LABEL: test_mul_v8i32_add_v8i32:
-; XOP-AVX1: # BB#0:
+; XOP-AVX1: # %bb.0:
; XOP-AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; XOP-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4
; XOP-AVX1-NEXT: vextractf128 $1, %ymm2, %xmm5
@@ -55,7 +55,7 @@ define <8 x i32> @test_mul_v8i32_add_v8i
; XOP-AVX1-NEXT: retq
;
; XOP-AVX2-LABEL: test_mul_v8i32_add_v8i32:
-; XOP-AVX2: # BB#0:
+; XOP-AVX2: # %bb.0:
; XOP-AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0
; XOP-AVX2-NEXT: vpaddd %ymm0, %ymm2, %ymm0
; XOP-AVX2-NEXT: retq
@@ -66,7 +66,7 @@ define <8 x i32> @test_mul_v8i32_add_v8i
define <4 x i64> @test_mulx_v4i32_add_v4i64(<4 x i32> %a0, <4 x i32> %a1, <4 x i64> %a2) {
; XOP-AVX1-LABEL: test_mulx_v4i32_add_v4i64:
-; XOP-AVX1: # BB#0:
+; XOP-AVX1: # %bb.0:
; XOP-AVX1-NEXT: vpmovsxdq %xmm0, %xmm3
; XOP-AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; XOP-AVX1-NEXT: vpmovsxdq %xmm0, %xmm0
@@ -80,7 +80,7 @@ define <4 x i64> @test_mulx_v4i32_add_v4
; XOP-AVX1-NEXT: retq
;
; XOP-AVX2-LABEL: test_mulx_v4i32_add_v4i64:
-; XOP-AVX2: # BB#0:
+; XOP-AVX2: # %bb.0:
; XOP-AVX2-NEXT: vpmovsxdq %xmm0, %ymm0
; XOP-AVX2-NEXT: vpmovsxdq %xmm1, %ymm1
; XOP-AVX2-NEXT: vpmuldq %ymm1, %ymm0, %ymm0
@@ -95,7 +95,7 @@ define <4 x i64> @test_mulx_v4i32_add_v4
define <2 x i64> @test_pmuldq_lo_v4i32_add_v2i64(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) {
; XOP-LABEL: test_pmuldq_lo_v4i32_add_v2i64:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0
; XOP-NEXT: retq
%1 = call <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32> %a0, <4 x i32> %a1)
@@ -105,7 +105,7 @@ define <2 x i64> @test_pmuldq_lo_v4i32_a
define <2 x i64> @test_pmuldq_hi_v4i32_add_v2i64(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) {
; XOP-LABEL: test_pmuldq_hi_v4i32_add_v2i64:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0
; XOP-NEXT: retq
%1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 3, i32 undef>
@@ -117,7 +117,7 @@ define <2 x i64> @test_pmuldq_hi_v4i32_a
define <4 x i32> @test_pmaddwd_v8i16_add_v4i32(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) {
; XOP-LABEL: test_pmaddwd_v8i16_add_v4i32:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0
; XOP-NEXT: retq
%1 = call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a0, <8 x i16> %a1)
Modified: llvm/trunk/test/CodeGen/X86/xop-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xop-intrinsics-fast-isel.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xop-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xop-intrinsics-fast-isel.ll Mon Dec 4 09:18:51 2017
@@ -6,12 +6,12 @@
define <2 x i64> @test_mm_maccs_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maccs_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maccs_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -25,12 +25,12 @@ declare <8 x i16> @llvm.x86.xop.vpmacssw
define <2 x i64> @test_mm_macc_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_macc_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_macc_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -44,12 +44,12 @@ declare <8 x i16> @llvm.x86.xop.vpmacsww
define <2 x i64> @test_mm_maccsd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maccsd_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maccsd_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -63,12 +63,12 @@ declare <4 x i32> @llvm.x86.xop.vpmacssw
define <2 x i64> @test_mm_maccd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maccd_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maccd_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -82,12 +82,12 @@ declare <4 x i32> @llvm.x86.xop.vpmacswd
define <2 x i64> @test_mm_maccs_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maccs_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maccs_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -101,12 +101,12 @@ declare <4 x i32> @llvm.x86.xop.vpmacssd
define <2 x i64> @test_mm_macc_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_macc_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_macc_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -120,12 +120,12 @@ declare <4 x i32> @llvm.x86.xop.vpmacsdd
define <2 x i64> @test_mm_maccslo_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maccslo_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maccslo_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -137,12 +137,12 @@ declare <2 x i64> @llvm.x86.xop.vpmacssd
define <2 x i64> @test_mm_macclo_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_macclo_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_macclo_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -154,12 +154,12 @@ declare <2 x i64> @llvm.x86.xop.vpmacsdq
define <2 x i64> @test_mm_maccshi_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maccshi_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maccshi_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -171,12 +171,12 @@ declare <2 x i64> @llvm.x86.xop.vpmacssd
define <2 x i64> @test_mm_macchi_epi32(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_macchi_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_macchi_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -188,12 +188,12 @@ declare <2 x i64> @llvm.x86.xop.vpmacsdq
define <2 x i64> @test_mm_maddsd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maddsd_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maddsd_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -207,12 +207,12 @@ declare <4 x i32> @llvm.x86.xop.vpmadcss
define <2 x i64> @test_mm_maddd_epi16(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) nounwind {
; X32-LABEL: test_mm_maddd_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_maddd_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -226,12 +226,12 @@ declare <4 x i32> @llvm.x86.xop.vpmadcsw
define <2 x i64> @test_mm_haddw_epi8(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddw_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddbw %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddw_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddbw %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -243,12 +243,12 @@ declare <8 x i16> @llvm.x86.xop.vphaddbw
define <2 x i64> @test_mm_haddd_epi8(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddd_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddbd %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddd_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddbd %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -260,12 +260,12 @@ declare <4 x i32> @llvm.x86.xop.vphaddbd
define <2 x i64> @test_mm_haddq_epi8(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddq_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddbq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddq_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddbq %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -276,12 +276,12 @@ declare <2 x i64> @llvm.x86.xop.vphaddbq
define <2 x i64> @test_mm_haddd_epi16(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddd_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddwd %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddd_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddwd %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -293,12 +293,12 @@ declare <4 x i32> @llvm.x86.xop.vphaddwd
define <2 x i64> @test_mm_haddq_epi16(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddq_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddwq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddq_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddwq %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -309,12 +309,12 @@ declare <2 x i64> @llvm.x86.xop.vphaddwq
define <2 x i64> @test_mm_haddq_epi32(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddq_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphadddq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddq_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphadddq %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -325,12 +325,12 @@ declare <2 x i64> @llvm.x86.xop.vphadddq
define <2 x i64> @test_mm_haddw_epu8(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddw_epu8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddubw %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddw_epu8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddubw %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -342,12 +342,12 @@ declare <8 x i16> @llvm.x86.xop.vphaddub
define <2 x i64> @test_mm_haddd_epu8(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddd_epu8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddubd %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddd_epu8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddubd %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -359,12 +359,12 @@ declare <4 x i32> @llvm.x86.xop.vphaddub
define <2 x i64> @test_mm_haddq_epu8(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddq_epu8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddubq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddq_epu8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddubq %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -375,12 +375,12 @@ declare <2 x i64> @llvm.x86.xop.vphaddub
define <2 x i64> @test_mm_haddd_epu16(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddd_epu16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphadduwd %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddd_epu16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphadduwd %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -393,12 +393,12 @@ declare <4 x i32> @llvm.x86.xop.vphadduw
define <2 x i64> @test_mm_haddq_epu16(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddq_epu16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphadduwq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddq_epu16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphadduwq %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -409,12 +409,12 @@ declare <2 x i64> @llvm.x86.xop.vphadduw
define <2 x i64> @test_mm_haddq_epu32(<2 x i64> %a0) {
; X32-LABEL: test_mm_haddq_epu32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphaddudq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_haddq_epu32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphaddudq %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -425,12 +425,12 @@ declare <2 x i64> @llvm.x86.xop.vphaddud
define <2 x i64> @test_mm_hsubw_epi8(<2 x i64> %a0) {
; X32-LABEL: test_mm_hsubw_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphsubbw %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_hsubw_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphsubbw %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -442,12 +442,12 @@ declare <8 x i16> @llvm.x86.xop.vphsubbw
define <2 x i64> @test_mm_hsubd_epi16(<2 x i64> %a0) {
; X32-LABEL: test_mm_hsubd_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphsubwd %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_hsubd_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphsubwd %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -459,12 +459,12 @@ declare <4 x i32> @llvm.x86.xop.vphsubwd
define <2 x i64> @test_mm_hsubq_epi32(<2 x i64> %a0) {
; X32-LABEL: test_mm_hsubq_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vphsubdq %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_hsubq_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vphsubdq %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -475,7 +475,7 @@ declare <2 x i64> @llvm.x86.xop.vphsubdq
define <2 x i64> @test_mm_cmov_si128(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) {
; X32-LABEL: test_mm_cmov_si128:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; X32-NEXT: vpxor %xmm3, %xmm2, %xmm3
; X32-NEXT: vpand %xmm2, %xmm0, %xmm0
@@ -484,7 +484,7 @@ define <2 x i64> @test_mm_cmov_si128(<2
; X32-NEXT: retl
;
; X64-LABEL: test_mm_cmov_si128:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; X64-NEXT: vpxor %xmm3, %xmm2, %xmm3
; X64-NEXT: vpand %xmm2, %xmm0, %xmm0
@@ -498,7 +498,7 @@ declare <2 x i64> @llvm.x86.xop.vpcmov(<
define <4 x i64> @test_mm256_cmov_si256(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2) {
; X32-LABEL: test_mm256_cmov_si256:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vcmptrueps %ymm3, %ymm3, %ymm3
; X32-NEXT: vxorps %ymm3, %ymm2, %ymm3
@@ -508,7 +508,7 @@ define <4 x i64> @test_mm256_cmov_si256(
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_cmov_si256:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vcmptrueps %ymm3, %ymm3, %ymm3
; X64-NEXT: vxorps %ymm3, %ymm2, %ymm3
@@ -523,12 +523,12 @@ declare <4 x i64> @llvm.x86.xop.vpcmov.2
define <2 x i64> @test_mm_perm_epi8(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) {
; X32-LABEL: test_mm_perm_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_perm_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -542,12 +542,12 @@ declare <16 x i8> @llvm.x86.xop.vpperm(<
define <2 x i64> @test_mm_rot_epi8(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_rot_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotb %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_rot_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotb %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -560,12 +560,12 @@ declare <16 x i8> @llvm.x86.xop.vprotb(<
define <2 x i64> @test_mm_rot_epi16(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_rot_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotw %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_rot_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotw %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -578,12 +578,12 @@ declare <8 x i16> @llvm.x86.xop.vprotw(<
define <2 x i64> @test_mm_rot_epi32(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_rot_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotd %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_rot_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotd %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -596,12 +596,12 @@ declare <4 x i32> @llvm.x86.xop.vprotd(<
define <2 x i64> @test_mm_rot_epi64(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_rot_epi64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotq %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_rot_epi64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotq %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vprotq(<2 x i64> %a0, <2 x i64> %a1)
@@ -611,12 +611,12 @@ declare <2 x i64> @llvm.x86.xop.vprotq(<
define <2 x i64> @test_mm_roti_epi8(<2 x i64> %a0) {
; X32-LABEL: test_mm_roti_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotb $1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_roti_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotb $1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -628,12 +628,12 @@ declare <16 x i8> @llvm.x86.xop.vprotbi(
define <2 x i64> @test_mm_roti_epi16(<2 x i64> %a0) {
; X32-LABEL: test_mm_roti_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotw $50, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_roti_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotw $50, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -645,12 +645,12 @@ declare <8 x i16> @llvm.x86.xop.vprotwi(
define <2 x i64> @test_mm_roti_epi32(<2 x i64> %a0) {
; X32-LABEL: test_mm_roti_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotd $226, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_roti_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotd $226, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -662,12 +662,12 @@ declare <4 x i32> @llvm.x86.xop.vprotdi(
define <2 x i64> @test_mm_roti_epi64(<2 x i64> %a0) {
; X32-LABEL: test_mm_roti_epi64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vprotq $100, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_roti_epi64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vprotq $100, %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vprotqi(<2 x i64> %a0, i8 100)
@@ -677,12 +677,12 @@ declare <2 x i64> @llvm.x86.xop.vprotqi(
define <2 x i64> @test_mm_shl_epi8(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_shl_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshlb %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_shl_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshlb %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -695,12 +695,12 @@ declare <16 x i8> @llvm.x86.xop.vpshlb(<
define <2 x i64> @test_mm_shl_epi16(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_shl_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshlw %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_shl_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshlw %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -713,12 +713,12 @@ declare <8 x i16> @llvm.x86.xop.vpshlw(<
define <2 x i64> @test_mm_shl_epi32(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_shl_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshld %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_shl_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshld %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -731,12 +731,12 @@ declare <4 x i32> @llvm.x86.xop.vpshld(<
define <2 x i64> @test_mm_shl_epi64(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_shl_epi64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshlq %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_shl_epi64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshlq %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpshlq(<2 x i64> %a0, <2 x i64> %a1)
@@ -746,12 +746,12 @@ declare <2 x i64> @llvm.x86.xop.vpshlq(<
define <2 x i64> @test_mm_sha_epi8(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_sha_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshab %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_sha_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshab %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -764,12 +764,12 @@ declare <16 x i8> @llvm.x86.xop.vpshab(<
define <2 x i64> @test_mm_sha_epi16(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_sha_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshaw %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_sha_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshaw %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -782,12 +782,12 @@ declare <8 x i16> @llvm.x86.xop.vpshaw(<
define <2 x i64> @test_mm_sha_epi32(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_sha_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshad %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_sha_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshad %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -800,12 +800,12 @@ declare <4 x i32> @llvm.x86.xop.vpshad(<
define <2 x i64> @test_mm_sha_epi64(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_sha_epi64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpshaq %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_sha_epi64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpshaq %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpshaq(<2 x i64> %a0, <2 x i64> %a1)
@@ -815,12 +815,12 @@ declare <2 x i64> @llvm.x86.xop.vpshaq(<
define <2 x i64> @test_mm_com_epu8(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epu8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltub %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epu8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltub %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -833,12 +833,12 @@ declare <16 x i8> @llvm.x86.xop.vpcomub(
define <2 x i64> @test_mm_com_epu16(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epu16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltuw %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epu16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltuw %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -851,12 +851,12 @@ declare <8 x i16> @llvm.x86.xop.vpcomuw(
define <2 x i64> @test_mm_com_epu32(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epu32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltud %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epu32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltud %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -869,12 +869,12 @@ declare <4 x i32> @llvm.x86.xop.vpcomud(
define <2 x i64> @test_mm_com_epu64(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epu64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltuq %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epu64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltuq %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomuq(<2 x i64> %a0, <2 x i64> %a1, i8 0)
@@ -884,12 +884,12 @@ declare <2 x i64> @llvm.x86.xop.vpcomuq(
define <2 x i64> @test_mm_com_epi8(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epi8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltb %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epi8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltb %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <16 x i8>
@@ -902,12 +902,12 @@ declare <16 x i8> @llvm.x86.xop.vpcomb(<
define <2 x i64> @test_mm_com_epi16(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epi16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltw %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epi16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltw %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <8 x i16>
@@ -920,12 +920,12 @@ declare <8 x i16> @llvm.x86.xop.vpcomw(<
define <2 x i64> @test_mm_com_epi32(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epi32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltd %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epi32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltd %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg0 = bitcast <2 x i64> %a0 to <4 x i32>
@@ -938,12 +938,12 @@ declare <4 x i32> @llvm.x86.xop.vpcomd(<
define <2 x i64> @test_mm_com_epi64(<2 x i64> %a0, <2 x i64> %a1) {
; X32-LABEL: test_mm_com_epi64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpcomltq %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_com_epi64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpcomltq %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomq(<2 x i64> %a0, <2 x i64> %a1, i8 0)
@@ -953,12 +953,12 @@ declare <2 x i64> @llvm.x86.xop.vpcomq(<
define <2 x double> @test_mm_permute2_pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> %a2) {
; X32-LABEL: test_mm_permute2_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2pd $0, %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_permute2_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2pd $0, %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> %a2, i8 0)
@@ -968,12 +968,12 @@ declare <2 x double> @llvm.x86.xop.vperm
define <4 x double> @test_mm256_permute2_pd(<4 x double> %a0, <4 x double> %a1, <4 x i64> %a2) {
; X32-LABEL: test_mm256_permute2_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2pd $0, %ymm2, %ymm1, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_permute2_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2pd $0, %ymm2, %ymm1, %ymm0, %ymm0
; X64-NEXT: retq
%res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> %a2, i8 0)
@@ -983,12 +983,12 @@ declare <4 x double> @llvm.x86.xop.vperm
define <4 x float> @test_mm_permute2_ps(<4 x float> %a0, <4 x float> %a1, <2 x i64> %a2) {
; X32-LABEL: test_mm_permute2_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2ps $0, %xmm2, %xmm1, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_permute2_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2ps $0, %xmm2, %xmm1, %xmm0, %xmm0
; X64-NEXT: retq
%arg2 = bitcast <2 x i64> %a2 to <4 x i32>
@@ -999,12 +999,12 @@ declare <4 x float> @llvm.x86.xop.vpermi
define <8 x float> @test_mm256_permute2_ps(<8 x float> %a0, <8 x float> %a1, <4 x i64> %a2) {
; X32-LABEL: test_mm256_permute2_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2ps $0, %ymm2, %ymm1, %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_permute2_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2ps $0, %ymm2, %ymm1, %ymm0, %ymm0
; X64-NEXT: retq
%arg2 = bitcast <4 x i64> %a2 to <8 x i32>
@@ -1015,12 +1015,12 @@ declare <8 x float> @llvm.x86.xop.vpermi
define <4 x float> @test_mm_frcz_ss(<4 x float> %a0) {
; X32-LABEL: test_mm_frcz_ss:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vfrczss %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_frcz_ss:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vfrczss %xmm0, %xmm0
; X64-NEXT: retq
%res = call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> %a0)
@@ -1030,12 +1030,12 @@ declare <4 x float> @llvm.x86.xop.vfrcz.
define <2 x double> @test_mm_frcz_sd(<2 x double> %a0) {
; X32-LABEL: test_mm_frcz_sd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vfrczsd %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_frcz_sd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vfrczsd %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> %a0)
@@ -1045,12 +1045,12 @@ declare <2 x double> @llvm.x86.xop.vfrcz
define <4 x float> @test_mm_frcz_ps(<4 x float> %a0) {
; X32-LABEL: test_mm_frcz_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vfrczps %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_frcz_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vfrczps %xmm0, %xmm0
; X64-NEXT: retq
%res = call <4 x float> @llvm.x86.xop.vfrcz.ps(<4 x float> %a0)
@@ -1060,12 +1060,12 @@ declare <4 x float> @llvm.x86.xop.vfrcz.
define <2 x double> @test_mm_frcz_pd(<2 x double> %a0) {
; X32-LABEL: test_mm_frcz_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vfrczpd %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm_frcz_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vfrczpd %xmm0, %xmm0
; X64-NEXT: retq
%res = call <2 x double> @llvm.x86.xop.vfrcz.pd(<2 x double> %a0)
@@ -1075,12 +1075,12 @@ declare <2 x double> @llvm.x86.xop.vfrcz
define <8 x float> @test_mm256_frcz_ps(<8 x float> %a0) {
; X32-LABEL: test_mm256_frcz_ps:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vfrczps %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_frcz_ps:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vfrczps %ymm0, %ymm0
; X64-NEXT: retq
%res = call <8 x float> @llvm.x86.xop.vfrcz.ps.256(<8 x float> %a0)
@@ -1090,12 +1090,12 @@ declare <8 x float> @llvm.x86.xop.vfrcz.
define <4 x double> @test_mm256_frcz_pd(<4 x double> %a0) {
; X32-LABEL: test_mm256_frcz_pd:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vfrczpd %ymm0, %ymm0
; X32-NEXT: retl
;
; X64-LABEL: test_mm256_frcz_pd:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vfrczpd %ymm0, %ymm0
; X64-NEXT: retq
%res = call <4 x double> @llvm.x86.xop.vfrcz.pd.256(<4 x double> %a0)
Modified: llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <2 x double> @test_int_x86_xop_vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $1, %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, i8 1) ; [#uses=1]
@@ -11,7 +11,7 @@ define <2 x double> @test_int_x86_xop_vp
}
define <2 x double> @test_int_x86_xop_vpermil2pd_mr(<2 x double> %a0, <2 x double>* %a1, <2 x double> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $1, %xmm1, (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <2 x double>, <2 x double>* %a1
@@ -20,7 +20,7 @@ define <2 x double> @test_int_x86_xop_vp
}
define <2 x double> @test_int_x86_xop_vpermil2pd_rm(<2 x double> %a0, <2 x double> %a1, <2 x double>* %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $1, (%rdi), %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <2 x double>, <2 x double>* %a2
@@ -31,7 +31,7 @@ declare <2 x double> @llvm.x86.xop.vperm
define <4 x double> @test_int_x86_xop_vpermil2pd_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $2, %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, i8 2) ;
@@ -39,7 +39,7 @@ define <4 x double> @test_int_x86_xop_vp
}
define <4 x double> @test_int_x86_xop_vpermil2pd_256_mr(<4 x double> %a0, <4 x double>* %a1, <4 x double> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $2, %ymm1, (%rdi), %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x double>, <4 x double>* %a1
@@ -48,7 +48,7 @@ define <4 x double> @test_int_x86_xop_vp
}
define <4 x double> @test_int_x86_xop_vpermil2pd_256_rm(<4 x double> %a0, <4 x double> %a1, <4 x double>* %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $2, (%rdi), %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x double>, <4 x double>* %a2
@@ -59,7 +59,7 @@ declare <4 x double> @llvm.x86.xop.vperm
define <4 x float> @test_int_x86_xop_vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2ps:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, i8 3) ;
@@ -69,7 +69,7 @@ declare <4 x float> @llvm.x86.xop.vpermi
define <8 x float> @test_int_x86_xop_vpermil2ps_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2ps_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2ps $4, %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%res = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2, i8 4) ;
@@ -79,7 +79,7 @@ declare <8 x float> @llvm.x86.xop.vpermi
define <16 x i8> @test_int_x86_xop_vpcomeqb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomeqb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomeqb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomeqb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -87,7 +87,7 @@ define <16 x i8> @test_int_x86_xop_vpcom
}
define <16 x i8> @test_int_x86_xop_vpcomeqb_mem(<16 x i8> %a0, <16 x i8>* %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomeqb_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomeqb (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <16 x i8>, <16 x i8>* %a1
@@ -98,7 +98,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomeqb
define <8 x i16> @test_int_x86_xop_vpcomeqw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomeqw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomeqw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomeqw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -108,7 +108,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomeqw
define <4 x i32> @test_int_x86_xop_vpcomeqd(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomeqd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomeqd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomeqd(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -118,7 +118,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomeqd
define <2 x i64> @test_int_x86_xop_vpcomeqq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomeqq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomeqq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomeqq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -128,7 +128,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomeqq
define <16 x i8> @test_int_x86_xop_vpcomequb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomequb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomequb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomequb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -138,7 +138,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomequ
define <4 x i32> @test_int_x86_xop_vpcomequd(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomequd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomequd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomequd(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -148,7 +148,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomequ
define <2 x i64> @test_int_x86_xop_vpcomequq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomequq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomequq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomequq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -158,7 +158,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomequ
define <8 x i16> @test_int_x86_xop_vpcomequw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomequw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomequw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomequw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -168,7 +168,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomequ
define <16 x i8> @test_int_x86_xop_vpcomfalseb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalseb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalseb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomfalseb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -178,7 +178,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomfal
define <4 x i32> @test_int_x86_xop_vpcomfalsed(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalsed:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalsed %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomfalsed(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -188,7 +188,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomfal
define <2 x i64> @test_int_x86_xop_vpcomfalseq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalseq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalseq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomfalseq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -198,7 +198,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomfal
define <16 x i8> @test_int_x86_xop_vpcomfalseub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalseub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalseub %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomfalseub(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -208,7 +208,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomfal
define <4 x i32> @test_int_x86_xop_vpcomfalseud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalseud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalseud %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomfalseud(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -218,7 +218,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomfal
define <2 x i64> @test_int_x86_xop_vpcomfalseuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalseuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalseuq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomfalseuq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -228,7 +228,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomfal
define <8 x i16> @test_int_x86_xop_vpcomfalseuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalseuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalseuw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomfalseuw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -238,7 +238,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomfal
define <8 x i16> @test_int_x86_xop_vpcomfalsew(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomfalsew:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomfalsew %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomfalsew(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -248,7 +248,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomfal
define <16 x i8> @test_int_x86_xop_vpcomgeb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgeb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgeb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomgeb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -258,7 +258,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomgeb
define <4 x i32> @test_int_x86_xop_vpcomged(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomged:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomged %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomged(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -268,7 +268,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomged
define <2 x i64> @test_int_x86_xop_vpcomgeq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgeq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgeq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomgeq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -278,7 +278,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomgeq
define <16 x i8> @test_int_x86_xop_vpcomgeub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgeub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgeub %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomgeub(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -288,7 +288,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomgeu
define <4 x i32> @test_int_x86_xop_vpcomgeud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgeud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgeud %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomgeud(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -298,7 +298,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomgeu
define <2 x i64> @test_int_x86_xop_vpcomgeuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgeuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgeuq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomgeuq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -308,7 +308,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomgeu
define <8 x i16> @test_int_x86_xop_vpcomgeuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgeuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgeuw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomgeuw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -318,7 +318,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomgeu
define <8 x i16> @test_int_x86_xop_vpcomgew(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgew:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgew %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomgew(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -328,7 +328,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomgew
define <16 x i8> @test_int_x86_xop_vpcomgtb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomgtb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -338,7 +338,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomgtb
define <4 x i32> @test_int_x86_xop_vpcomgtd(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomgtd(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -348,7 +348,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomgtd
define <2 x i64> @test_int_x86_xop_vpcomgtq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomgtq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -358,7 +358,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomgtq
define <16 x i8> @test_int_x86_xop_vpcomgtub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtub %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomgtub(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -368,7 +368,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomgtu
define <4 x i32> @test_int_x86_xop_vpcomgtud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtud %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomgtud(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -378,7 +378,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomgtu
define <2 x i64> @test_int_x86_xop_vpcomgtuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtuq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomgtuq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -388,7 +388,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomgtu
define <8 x i16> @test_int_x86_xop_vpcomgtuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtuw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomgtuw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -398,7 +398,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomgtu
define <8 x i16> @test_int_x86_xop_vpcomgtw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomgtw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomgtw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomgtw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -408,7 +408,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomgtw
define <16 x i8> @test_int_x86_xop_vpcomleb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomleb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomleb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomleb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -418,7 +418,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomleb
define <4 x i32> @test_int_x86_xop_vpcomled(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomled:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomled %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomled(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -428,7 +428,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomled
define <2 x i64> @test_int_x86_xop_vpcomleq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomleq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomleq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomleq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -438,7 +438,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomleq
define <16 x i8> @test_int_x86_xop_vpcomleub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomleub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomleub %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomleub(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -448,7 +448,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomleu
define <4 x i32> @test_int_x86_xop_vpcomleud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomleud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomleud %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomleud(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -458,7 +458,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomleu
define <2 x i64> @test_int_x86_xop_vpcomleuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomleuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomleuq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomleuq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -468,7 +468,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomleu
define <8 x i16> @test_int_x86_xop_vpcomleuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomleuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomleuw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomleuw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -478,7 +478,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomleu
define <8 x i16> @test_int_x86_xop_vpcomlew(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomlew:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomlew %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomlew(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -488,7 +488,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomlew
define <16 x i8> @test_int_x86_xop_vpcomltb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomltb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -498,7 +498,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomltb
define <4 x i32> @test_int_x86_xop_vpcomltd(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomltd(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -508,7 +508,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomltd
define <2 x i64> @test_int_x86_xop_vpcomltq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomltq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -518,7 +518,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomltq
define <16 x i8> @test_int_x86_xop_vpcomltub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltub %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomltub(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -528,7 +528,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomltu
define <4 x i32> @test_int_x86_xop_vpcomltud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltud %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomltud(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -538,7 +538,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomltu
define <2 x i64> @test_int_x86_xop_vpcomltuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltuq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomltuq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -548,7 +548,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomltu
define <8 x i16> @test_int_x86_xop_vpcomltuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltuw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomltuw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -558,7 +558,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomltu
define <8 x i16> @test_int_x86_xop_vpcomltw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomltw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomltw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -568,7 +568,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomltw
define <16 x i8> @test_int_x86_xop_vpcomneb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomneb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomneqb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomneb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -578,7 +578,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomneb
define <4 x i32> @test_int_x86_xop_vpcomned(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomned:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomneqd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomned(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -588,7 +588,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomned
define <2 x i64> @test_int_x86_xop_vpcomneq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomneq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomneqq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomneq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -598,7 +598,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomneq
define <16 x i8> @test_int_x86_xop_vpcomneub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomneub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomnequb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomneub(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -608,7 +608,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomneu
define <4 x i32> @test_int_x86_xop_vpcomneud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomneud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomnequd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomneud(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -618,7 +618,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomneu
define <2 x i64> @test_int_x86_xop_vpcomneuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomneuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomnequq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomneuq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -628,7 +628,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomneu
define <8 x i16> @test_int_x86_xop_vpcomneuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomneuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomnequw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomneuw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -638,7 +638,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomneu
define <8 x i16> @test_int_x86_xop_vpcomnew(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomnew:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomneqw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomnew(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -648,7 +648,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomnew
define <16 x i8> @test_int_x86_xop_vpcomtrueb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtrueb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtrueb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomtrueb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -658,7 +658,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomtru
define <4 x i32> @test_int_x86_xop_vpcomtrued(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtrued:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtrued %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomtrued(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -668,7 +668,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomtru
define <2 x i64> @test_int_x86_xop_vpcomtrueq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtrueq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtrueq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomtrueq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -678,7 +678,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomtru
define <16 x i8> @test_int_x86_xop_vpcomtrueub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtrueub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtrueub %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomtrueub(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -688,7 +688,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomtru
define <4 x i32> @test_int_x86_xop_vpcomtrueud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtrueud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtrueud %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomtrueud(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -698,7 +698,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomtru
define <2 x i64> @test_int_x86_xop_vpcomtrueuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtrueuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtrueuq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomtrueuq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -708,7 +708,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomtru
define <8 x i16> @test_int_x86_xop_vpcomtrueuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtrueuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtrueuw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomtrueuw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -718,7 +718,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomtru
define <8 x i16> @test_int_x86_xop_vpcomtruew(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomtruew:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomtruew %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomtruew(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -728,7 +728,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomtru
define <2 x i64> @test_int_x86_xop_vpcmov(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcmov(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) ;
@@ -738,7 +738,7 @@ declare <2 x i64> @llvm.x86.xop.vpcmov(<
define <4 x i64> @test_int_x86_xop_vpcmov_256(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%res = call <4 x i64> @llvm.x86.xop.vpcmov.256(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2) ;
@@ -746,7 +746,7 @@ define <4 x i64> @test_int_x86_xop_vpcmo
}
define <4 x i64> @test_int_x86_xop_vpcmov_256_mr(<4 x i64> %a0, <4 x i64>* %a1, <4 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov_256_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm1, (%rdi), %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x i64>, <4 x i64>* %a1
@@ -755,7 +755,7 @@ define <4 x i64> @test_int_x86_xop_vpcmo
}
define <4 x i64> @test_int_x86_xop_vpcmov_256_rm(<4 x i64> %a0, <4 x i64> %a1, <4 x i64>* %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov_256_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x i64>, <4 x i64>* %a2
Modified: llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xop-intrinsics-x86_64.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <2 x double> @test_int_x86_xop_vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $1, %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> %a2, i8 1) ; [#uses=1]
@@ -11,7 +11,7 @@ define <2 x double> @test_int_x86_xop_vp
}
define <2 x double> @test_int_x86_xop_vpermil2pd_mr(<2 x double> %a0, <2 x double>* %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $1, %xmm1, (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <2 x double>, <2 x double>* %a1
@@ -20,7 +20,7 @@ define <2 x double> @test_int_x86_xop_vp
}
define <2 x double> @test_int_x86_xop_vpermil2pd_rm(<2 x double> %a0, <2 x double> %a1, <2 x i64>* %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $1, (%rdi), %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <2 x i64>, <2 x i64>* %a2
@@ -31,7 +31,7 @@ declare <2 x double> @llvm.x86.xop.vperm
define <4 x double> @test_int_x86_xop_vpermil2pd_256(<4 x double> %a0, <4 x double> %a1, <4 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $2, %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%res = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> %a2, i8 2) ;
@@ -39,7 +39,7 @@ define <4 x double> @test_int_x86_xop_vp
}
define <4 x double> @test_int_x86_xop_vpermil2pd_256_mr(<4 x double> %a0, <4 x double>* %a1, <4 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $2, %ymm1, (%rdi), %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x double>, <4 x double>* %a1
@@ -48,7 +48,7 @@ define <4 x double> @test_int_x86_xop_vp
}
define <4 x double> @test_int_x86_xop_vpermil2pd_256_rm(<4 x double> %a0, <4 x double> %a1, <4 x i64>* %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd_256_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2pd $2, (%rdi), %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x i64>, <4 x i64>* %a2
@@ -59,7 +59,7 @@ declare <4 x double> @llvm.x86.xop.vperm
define <4 x float> @test_int_x86_xop_vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2ps:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2ps $3, %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x i32> %a2, i8 3) ;
@@ -69,7 +69,7 @@ declare <4 x float> @llvm.x86.xop.vpermi
define <8 x float> @test_int_x86_xop_vpermil2ps_256(<8 x float> %a0, <8 x float> %a1, <8 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2ps_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpermil2ps $4, %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%res = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x i32> %a2, i8 4) ;
@@ -79,7 +79,7 @@ declare <8 x float> @llvm.x86.xop.vpermi
define <2 x i64> @test_int_x86_xop_vpcmov(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = xor <2 x i64> %a2, <i64 -1, i64 -1>
@@ -91,7 +91,7 @@ define <2 x i64> @test_int_x86_xop_vpcmo
define <4 x i64> @test_int_x86_xop_vpcmov_256(<4 x i64> %a0, <4 x i64> %a1, <4 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = xor <4 x i64> %a2, <i64 -1, i64 -1, i64 -1, i64 -1>
@@ -102,7 +102,7 @@ define <4 x i64> @test_int_x86_xop_vpcmo
}
define <4 x i64> @test_int_x86_xop_vpcmov_256_mr(<4 x i64> %a0, <4 x i64>* %a1, <4 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov_256_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm1, (%rdi), %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x i64>, <4 x i64>* %a1
@@ -114,7 +114,7 @@ define <4 x i64> @test_int_x86_xop_vpcmo
}
define <4 x i64> @test_int_x86_xop_vpcmov_256_rm(<4 x i64> %a0, <4 x i64> %a1, <4 x i64>* %a2) {
; CHECK-LABEL: test_int_x86_xop_vpcmov_256_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov (%rdi), %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%vec = load <4 x i64>, <4 x i64>* %a2
@@ -127,7 +127,7 @@ define <4 x i64> @test_int_x86_xop_vpcmo
define <4 x i32> @test_int_x86_xop_vphaddbd(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddbd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddbd %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vphaddbd(<16 x i8> %a0) ;
@@ -137,7 +137,7 @@ declare <4 x i32> @llvm.x86.xop.vphaddbd
define <2 x i64> @test_int_x86_xop_vphaddbq(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddbq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddbq %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vphaddbq(<16 x i8> %a0) ;
@@ -147,7 +147,7 @@ declare <2 x i64> @llvm.x86.xop.vphaddbq
define <8 x i16> @test_int_x86_xop_vphaddbw(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddbw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddbw %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vphaddbw(<16 x i8> %a0) ;
@@ -157,7 +157,7 @@ declare <8 x i16> @llvm.x86.xop.vphaddbw
define <2 x i64> @test_int_x86_xop_vphadddq(<4 x i32> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphadddq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphadddq %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vphadddq(<4 x i32> %a0) ;
@@ -167,7 +167,7 @@ declare <2 x i64> @llvm.x86.xop.vphadddq
define <4 x i32> @test_int_x86_xop_vphaddubd(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddubd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddubd %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vphaddubd(<16 x i8> %a0) ;
@@ -177,7 +177,7 @@ declare <4 x i32> @llvm.x86.xop.vphaddub
define <2 x i64> @test_int_x86_xop_vphaddubq(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddubq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddubq %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vphaddubq(<16 x i8> %a0) ;
@@ -187,7 +187,7 @@ declare <2 x i64> @llvm.x86.xop.vphaddub
define <8 x i16> @test_int_x86_xop_vphaddubw(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddubw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddubw %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vphaddubw(<16 x i8> %a0) ;
@@ -197,7 +197,7 @@ declare <8 x i16> @llvm.x86.xop.vphaddub
define <2 x i64> @test_int_x86_xop_vphaddudq(<4 x i32> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddudq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddudq %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vphaddudq(<4 x i32> %a0) ;
@@ -207,7 +207,7 @@ declare <2 x i64> @llvm.x86.xop.vphaddud
define <4 x i32> @test_int_x86_xop_vphadduwd(<8 x i16> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphadduwd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphadduwd %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vphadduwd(<8 x i16> %a0) ;
@@ -217,7 +217,7 @@ declare <4 x i32> @llvm.x86.xop.vphadduw
define <2 x i64> @test_int_x86_xop_vphadduwq(<8 x i16> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphadduwq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphadduwq %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vphadduwq(<8 x i16> %a0) ;
@@ -227,7 +227,7 @@ declare <2 x i64> @llvm.x86.xop.vphadduw
define <4 x i32> @test_int_x86_xop_vphaddwd(<8 x i16> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddwd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddwd %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vphaddwd(<8 x i16> %a0) ;
@@ -237,7 +237,7 @@ declare <4 x i32> @llvm.x86.xop.vphaddwd
define <2 x i64> @test_int_x86_xop_vphaddwq(<8 x i16> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphaddwq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphaddwq %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vphaddwq(<8 x i16> %a0) ;
@@ -247,7 +247,7 @@ declare <2 x i64> @llvm.x86.xop.vphaddwq
define <8 x i16> @test_int_x86_xop_vphsubbw(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphsubbw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphsubbw %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vphsubbw(<16 x i8> %a0) ;
@@ -257,7 +257,7 @@ declare <8 x i16> @llvm.x86.xop.vphsubbw
define <2 x i64> @test_int_x86_xop_vphsubdq(<4 x i32> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphsubdq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphsubdq %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vphsubdq(<4 x i32> %a0) ;
@@ -265,7 +265,7 @@ define <2 x i64> @test_int_x86_xop_vphsu
}
define <2 x i64> @test_int_x86_xop_vphsubdq_mem(<4 x i32>* %a0) {
; CHECK-LABEL: test_int_x86_xop_vphsubdq_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphsubdq (%rdi), %xmm0
; CHECK-NEXT: retq
%vec = load <4 x i32>, <4 x i32>* %a0
@@ -276,7 +276,7 @@ declare <2 x i64> @llvm.x86.xop.vphsubdq
define <4 x i32> @test_int_x86_xop_vphsubwd(<8 x i16> %a0) {
; CHECK-LABEL: test_int_x86_xop_vphsubwd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphsubwd %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vphsubwd(<8 x i16> %a0) ;
@@ -284,7 +284,7 @@ define <4 x i32> @test_int_x86_xop_vphsu
}
define <4 x i32> @test_int_x86_xop_vphsubwd_mem(<8 x i16>* %a0) {
; CHECK-LABEL: test_int_x86_xop_vphsubwd_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vphsubwd (%rdi), %xmm0
; CHECK-NEXT: retq
%vec = load <8 x i16>, <8 x i16>* %a0
@@ -295,7 +295,7 @@ declare <4 x i32> @llvm.x86.xop.vphsubwd
define <4 x i32> @test_int_x86_xop_vpmacsdd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacsdd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacsdd %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpmacsdd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2) ;
@@ -305,7 +305,7 @@ declare <4 x i32> @llvm.x86.xop.vpmacsdd
define <2 x i64> @test_int_x86_xop_vpmacsdqh(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacsdqh:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacsdqh %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpmacsdqh(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) ;
@@ -315,7 +315,7 @@ declare <2 x i64> @llvm.x86.xop.vpmacsdq
define <2 x i64> @test_int_x86_xop_vpmacsdql(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacsdql:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacsdql %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpmacsdql(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) ;
@@ -325,7 +325,7 @@ declare <2 x i64> @llvm.x86.xop.vpmacsdq
define <4 x i32> @test_int_x86_xop_vpmacssdd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacssdd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacssdd %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpmacssdd(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2) ;
@@ -335,7 +335,7 @@ declare <4 x i32> @llvm.x86.xop.vpmacssd
define <2 x i64> @test_int_x86_xop_vpmacssdqh(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacssdqh:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacssdqh %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpmacssdqh(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) ;
@@ -345,7 +345,7 @@ declare <2 x i64> @llvm.x86.xop.vpmacssd
define <2 x i64> @test_int_x86_xop_vpmacssdql(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacssdql:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacssdql %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpmacssdql(<4 x i32> %a0, <4 x i32> %a1, <2 x i64> %a2) ;
@@ -355,7 +355,7 @@ declare <2 x i64> @llvm.x86.xop.vpmacssd
define <4 x i32> @test_int_x86_xop_vpmacsswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacsswd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacsswd %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpmacsswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) ;
@@ -365,7 +365,7 @@ declare <4 x i32> @llvm.x86.xop.vpmacssw
define <8 x i16> @test_int_x86_xop_vpmacssww(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacssww:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacssww %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpmacssww(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) ;
@@ -375,7 +375,7 @@ declare <8 x i16> @llvm.x86.xop.vpmacssw
define <4 x i32> @test_int_x86_xop_vpmacswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacswd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacswd %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpmacswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) ;
@@ -385,7 +385,7 @@ declare <4 x i32> @llvm.x86.xop.vpmacswd
define <8 x i16> @test_int_x86_xop_vpmacsww(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmacsww:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmacsww %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpmacsww(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) ;
@@ -395,7 +395,7 @@ declare <8 x i16> @llvm.x86.xop.vpmacsww
define <4 x i32> @test_int_x86_xop_vpmadcsswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmadcsswd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmadcsswd %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpmadcsswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) ;
@@ -405,7 +405,7 @@ declare <4 x i32> @llvm.x86.xop.vpmadcss
define <4 x i32> @test_int_x86_xop_vpmadcswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmadcswd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmadcswd %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpmadcswd(<8 x i16> %a0, <8 x i16> %a1, <4 x i32> %a2) ;
@@ -413,7 +413,7 @@ define <4 x i32> @test_int_x86_xop_vpmad
}
define <4 x i32> @test_int_x86_xop_vpmadcswd_mem(<8 x i16> %a0, <8 x i16>* %a1, <4 x i32> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpmadcswd_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmadcswd %xmm1, (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <8 x i16>, <8 x i16>* %a1
@@ -424,7 +424,7 @@ declare <4 x i32> @llvm.x86.xop.vpmadcsw
define <16 x i8> @test_int_x86_xop_vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpperm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpperm %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) ;
@@ -432,7 +432,7 @@ define <16 x i8> @test_int_x86_xop_vpper
}
define <16 x i8> @test_int_x86_xop_vpperm_rm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8>* %a2) {
; CHECK-LABEL: test_int_x86_xop_vpperm_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpperm (%rdi), %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <16 x i8>, <16 x i8>* %a2
@@ -441,7 +441,7 @@ define <16 x i8> @test_int_x86_xop_vpper
}
define <16 x i8> @test_int_x86_xop_vpperm_mr(<16 x i8> %a0, <16 x i8>* %a1, <16 x i8> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpperm_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpperm %xmm1, (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <16 x i8>, <16 x i8>* %a1
@@ -452,7 +452,7 @@ declare <16 x i8> @llvm.x86.xop.vpperm(<
define <16 x i8> @test_int_x86_xop_vprotb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vprotb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vprotb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -462,7 +462,7 @@ declare <16 x i8> @llvm.x86.xop.vprotb(<
define <4 x i32> @test_int_x86_xop_vprotd(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vprotd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vprotd(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -472,7 +472,7 @@ declare <4 x i32> @llvm.x86.xop.vprotd(<
define <2 x i64> @test_int_x86_xop_vprotq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vprotq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vprotq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -482,7 +482,7 @@ declare <2 x i64> @llvm.x86.xop.vprotq(<
define <8 x i16> @test_int_x86_xop_vprotw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vprotw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vprotw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -492,7 +492,7 @@ declare <8 x i16> @llvm.x86.xop.vprotw(<
define <16 x i8> @test_int_x86_xop_vprotbi(<16 x i8> %a0) {
; CHECK-LABEL: test_int_x86_xop_vprotbi:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotb $1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vprotbi(<16 x i8> %a0, i8 1) ;
@@ -502,7 +502,7 @@ declare <16 x i8> @llvm.x86.xop.vprotbi(
define <4 x i32> @test_int_x86_xop_vprotdi(<4 x i32> %a0) {
; CHECK-LABEL: test_int_x86_xop_vprotdi:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotd $254, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vprotdi(<4 x i32> %a0, i8 -2) ;
@@ -512,7 +512,7 @@ declare <4 x i32> @llvm.x86.xop.vprotdi(
define <2 x i64> @test_int_x86_xop_vprotqi(<2 x i64> %a0) {
; CHECK-LABEL: test_int_x86_xop_vprotqi:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotq $3, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vprotqi(<2 x i64> %a0, i8 3) ;
@@ -522,7 +522,7 @@ declare <2 x i64> @llvm.x86.xop.vprotqi(
define <8 x i16> @test_int_x86_xop_vprotwi(<8 x i16> %a0) {
; CHECK-LABEL: test_int_x86_xop_vprotwi:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotw $252, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vprotwi(<8 x i16> %a0, i8 -4) ;
@@ -532,7 +532,7 @@ declare <8 x i16> @llvm.x86.xop.vprotwi(
define <16 x i8> @test_int_x86_xop_vpshab(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshab:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshab %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpshab(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -542,7 +542,7 @@ declare <16 x i8> @llvm.x86.xop.vpshab(<
define <4 x i32> @test_int_x86_xop_vpshad(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshad:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshad %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpshad(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -552,7 +552,7 @@ declare <4 x i32> @llvm.x86.xop.vpshad(<
define <2 x i64> @test_int_x86_xop_vpshaq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshaq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshaq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpshaq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -562,7 +562,7 @@ declare <2 x i64> @llvm.x86.xop.vpshaq(<
define <8 x i16> @test_int_x86_xop_vpshaw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshaw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshaw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpshaw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -572,7 +572,7 @@ declare <8 x i16> @llvm.x86.xop.vpshaw(<
define <16 x i8> @test_int_x86_xop_vpshlb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshlb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshlb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpshlb(<16 x i8> %a0, <16 x i8> %a1) ;
@@ -582,7 +582,7 @@ declare <16 x i8> @llvm.x86.xop.vpshlb(<
define <4 x i32> @test_int_x86_xop_vpshld(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshld:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshld %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpshld(<4 x i32> %a0, <4 x i32> %a1) ;
@@ -592,7 +592,7 @@ declare <4 x i32> @llvm.x86.xop.vpshld(<
define <2 x i64> @test_int_x86_xop_vpshlq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshlq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshlq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpshlq(<2 x i64> %a0, <2 x i64> %a1) ;
@@ -602,7 +602,7 @@ declare <2 x i64> @llvm.x86.xop.vpshlq(<
define <8 x i16> @test_int_x86_xop_vpshlw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshlw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshlw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpshlw(<8 x i16> %a0, <8 x i16> %a1) ;
@@ -610,7 +610,7 @@ define <8 x i16> @test_int_x86_xop_vpshl
}
define <8 x i16> @test_int_x86_xop_vpshlw_rm(<8 x i16> %a0, <8 x i16>* %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshlw_rm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshlw (%rdi), %xmm0, %xmm0
; CHECK-NEXT: retq
%vec = load <8 x i16>, <8 x i16>* %a1
@@ -619,7 +619,7 @@ define <8 x i16> @test_int_x86_xop_vpshl
}
define <8 x i16> @test_int_x86_xop_vpshlw_mr(<8 x i16>* %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpshlw_mr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpshlw %xmm0, (%rdi), %xmm0
; CHECK-NEXT: retq
%vec = load <8 x i16>, <8 x i16>* %a0
@@ -630,7 +630,7 @@ declare <8 x i16> @llvm.x86.xop.vpshlw(<
define <4 x float> @test_int_x86_xop_vfrcz_ss(<4 x float> %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_ss:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczss %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x float> @llvm.x86.xop.vfrcz.ss(<4 x float> %a0) ;
@@ -638,7 +638,7 @@ define <4 x float> @test_int_x86_xop_vfr
}
define <4 x float> @test_int_x86_xop_vfrcz_ss_mem(float* %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_ss_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczss (%rdi), %xmm0
; CHECK-NEXT: retq
%elem = load float, float* %a0
@@ -650,7 +650,7 @@ declare <4 x float> @llvm.x86.xop.vfrcz.
define <2 x double> @test_int_x86_xop_vfrcz_sd(<2 x double> %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_sd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczsd %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x double> @llvm.x86.xop.vfrcz.sd(<2 x double> %a0) ;
@@ -658,7 +658,7 @@ define <2 x double> @test_int_x86_xop_vf
}
define <2 x double> @test_int_x86_xop_vfrcz_sd_mem(double* %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_sd_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczsd (%rdi), %xmm0
; CHECK-NEXT: retq
%elem = load double, double* %a0
@@ -670,7 +670,7 @@ declare <2 x double> @llvm.x86.xop.vfrcz
define <2 x double> @test_int_x86_xop_vfrcz_pd(<2 x double> %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_pd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczpd %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x double> @llvm.x86.xop.vfrcz.pd(<2 x double> %a0) ;
@@ -678,7 +678,7 @@ define <2 x double> @test_int_x86_xop_vf
}
define <2 x double> @test_int_x86_xop_vfrcz_pd_mem(<2 x double>* %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_pd_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczpd (%rdi), %xmm0
; CHECK-NEXT: retq
%vec = load <2 x double>, <2 x double>* %a0
@@ -689,7 +689,7 @@ declare <2 x double> @llvm.x86.xop.vfrcz
define <4 x double> @test_int_x86_xop_vfrcz_pd_256(<4 x double> %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_pd_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczpd %ymm0, %ymm0
; CHECK-NEXT: retq
%res = call <4 x double> @llvm.x86.xop.vfrcz.pd.256(<4 x double> %a0) ;
@@ -697,7 +697,7 @@ define <4 x double> @test_int_x86_xop_vf
}
define <4 x double> @test_int_x86_xop_vfrcz_pd_256_mem(<4 x double>* %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_pd_256_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczpd (%rdi), %ymm0
; CHECK-NEXT: retq
%vec = load <4 x double>, <4 x double>* %a0
@@ -708,7 +708,7 @@ declare <4 x double> @llvm.x86.xop.vfrcz
define <4 x float> @test_int_x86_xop_vfrcz_ps(<4 x float> %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_ps:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczps %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x float> @llvm.x86.xop.vfrcz.ps(<4 x float> %a0) ;
@@ -716,7 +716,7 @@ define <4 x float> @test_int_x86_xop_vfr
}
define <4 x float> @test_int_x86_xop_vfrcz_ps_mem(<4 x float>* %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_ps_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczps (%rdi), %xmm0
; CHECK-NEXT: retq
%vec = load <4 x float>, <4 x float>* %a0
@@ -727,7 +727,7 @@ declare <4 x float> @llvm.x86.xop.vfrcz.
define <8 x float> @test_int_x86_xop_vfrcz_ps_256(<8 x float> %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_ps_256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczps %ymm0, %ymm0
; CHECK-NEXT: retq
%res = call <8 x float> @llvm.x86.xop.vfrcz.ps.256(<8 x float> %a0) ;
@@ -735,7 +735,7 @@ define <8 x float> @test_int_x86_xop_vfr
}
define <8 x float> @test_int_x86_xop_vfrcz_ps_256_mem(<8 x float>* %a0) {
; CHECK-LABEL: test_int_x86_xop_vfrcz_ps_256_mem:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vfrczps (%rdi), %ymm0
; CHECK-NEXT: retq
%vec = load <8 x float>, <8 x float>* %a0
@@ -746,7 +746,7 @@ declare <8 x float> @llvm.x86.xop.vfrcz.
define <16 x i8> @test_int_x86_xop_vpcomb(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltb %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomb(<16 x i8> %a0, <16 x i8> %a1, i8 0) ;
@@ -756,7 +756,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomb(<
define <8 x i16> @test_int_x86_xop_vpcomw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomw(<8 x i16> %a0, <8 x i16> %a1, i8 0) ;
@@ -766,7 +766,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomw(<
define <4 x i32> @test_int_x86_xop_vpcomd(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomd:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomd(<4 x i32> %a0, <4 x i32> %a1, i8 0) ;
@@ -776,7 +776,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomd(<
define <2 x i64> @test_int_x86_xop_vpcomq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomq(<2 x i64> %a0, <2 x i64> %a1, i8 0) ;
@@ -786,7 +786,7 @@ declare <2 x i64> @llvm.x86.xop.vpcomq(<
define <16 x i8> @test_int_x86_xop_vpcomub(<16 x i8> %a0, <16 x i8> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomub:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltub %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <16 x i8> @llvm.x86.xop.vpcomub(<16 x i8> %a0, <16 x i8> %a1, i8 0) ;
@@ -796,7 +796,7 @@ declare <16 x i8> @llvm.x86.xop.vpcomub(
define <8 x i16> @test_int_x86_xop_vpcomuw(<8 x i16> %a0, <8 x i16> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltuw %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <8 x i16> @llvm.x86.xop.vpcomuw(<8 x i16> %a0, <8 x i16> %a1, i8 0) ;
@@ -806,7 +806,7 @@ declare <8 x i16> @llvm.x86.xop.vpcomuw(
define <4 x i32> @test_int_x86_xop_vpcomud(<4 x i32> %a0, <4 x i32> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomud:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltud %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <4 x i32> @llvm.x86.xop.vpcomud(<4 x i32> %a0, <4 x i32> %a1, i8 0) ;
@@ -816,7 +816,7 @@ declare <4 x i32> @llvm.x86.xop.vpcomud(
define <2 x i64> @test_int_x86_xop_vpcomuq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_int_x86_xop_vpcomuq:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcomltuq %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%res = call <2 x i64> @llvm.x86.xop.vpcomuq(<2 x i64> %a0, <2 x i64> %a1, i8 0) ;
Modified: llvm/trunk/test/CodeGen/X86/xop-mask-comments.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xop-mask-comments.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xop-mask-comments.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xop-mask-comments.ll Mon Dec 4 09:18:51 2017
@@ -8,12 +8,12 @@
define <16 x i8> @vpperm_shuffle_unary(<16 x i8> %a0) {
; X32-LABEL: vpperm_shuffle_unary:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_unary:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X64-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a0, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 2, i8 17, i8 0>)
@@ -22,12 +22,12 @@ define <16 x i8> @vpperm_shuffle_unary(<
define <16 x i8> @vpperm_shuffle_unary_undef(<16 x i8> %a0) {
; X32-LABEL: vpperm_shuffle_unary_undef:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_unary_undef:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0]
; X64-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> undef, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 2, i8 17, i8 0>)
@@ -36,12 +36,12 @@ define <16 x i8> @vpperm_shuffle_unary_u
define <16 x i8> @vpperm_shuffle_unary_zero(<16 x i8> %a0) {
; X32-LABEL: vpperm_shuffle_unary_zero:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3],zero,xmm0[1],zero
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_unary_zero:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3],zero,xmm0[1],zero
; X64-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a0, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 130, i8 17, i8 128>)
@@ -50,12 +50,12 @@ define <16 x i8> @vpperm_shuffle_unary_z
define <16 x i8> @vpperm_shuffle_binary(<16 x i8> %a0, <16 x i8> %a1) {
; X32-LABEL: vpperm_shuffle_binary:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],xmm1[3],xmm0[2],xmm1[1],xmm0[0]
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_binary:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],xmm1[3],xmm0[2],xmm1[1],xmm0[0]
; X64-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 19, i8 2, i8 17, i8 0>)
@@ -64,12 +64,12 @@ define <16 x i8> @vpperm_shuffle_binary(
define <16 x i8> @vpperm_shuffle_binary_zero(<16 x i8> %a0, <16 x i8> %a1) {
; X32-LABEL: vpperm_shuffle_binary_zero:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],zero,zero,zero,zero
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_binary_zero:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpperm {{.*#+}} xmm0 = xmm1[15],xmm0[14],xmm1[13],xmm0[12],xmm1[11],xmm0[10],xmm1[9],xmm0[8],xmm1[7],xmm0[6],xmm1[5],xmm0[4],zero,zero,zero,zero
; X64-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 147, i8 130, i8 145, i8 128>)
@@ -79,12 +79,12 @@ define <16 x i8> @vpperm_shuffle_binary_
; we can't decode vpperm's other permute ops
define <16 x i8> @vpperm_shuffle_general(<16 x i8> %a0, <16 x i8> %a1) {
; X32-LABEL: vpperm_shuffle_general:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpperm {{\.LCPI.*}}, %xmm0, %xmm0, %xmm0
; X32-NEXT: retl
;
; X64-LABEL: vpperm_shuffle_general:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpperm {{.*}}(%rip), %xmm0, %xmm0, %xmm0
; X64-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> %a0, <16 x i8> %a0, <16 x i8> <i8 31, i8 14, i8 29, i8 12, i8 27, i8 10, i8 25, i8 8, i8 23, i8 6, i8 21, i8 4, i8 179, i8 162, i8 177, i8 160>)
@@ -99,13 +99,13 @@ define <16 x i8> @vpperm_shuffle_general
; be a quicker (and smaller) alternative.
define <2 x double> @vpermil2pd_21(<2 x double> %a0, <2 x double> %a1) {
; X32-LABEL: vpermil2pd_21:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X32-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2pd_21:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; X64-NEXT: retq
@@ -115,12 +115,12 @@ define <2 x double> @vpermil2pd_21(<2 x
define <4 x double> @vpermil2pd256_0062(<4 x double> %a0, <4 x double> %a1) {
; X32-LABEL: vpermil2pd256_0062:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0,0],ymm1[2],ymm0[2]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2pd256_0062:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2pd {{.*#+}} ymm0 = ymm0[0,0],ymm1[2],ymm0[2]
; X64-NEXT: retq
%1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> <i64 0, i64 0, i64 4, i64 0>, i8 0)
@@ -129,12 +129,12 @@ define <4 x double> @vpermil2pd256_0062(
define <4 x double> @vpermil2pd256_zz73(<4 x double> %a0, <4 x double> %a1) {
; X32-LABEL: vpermil2pd256_zz73:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2pd {{.*#+}} ymm0 = zero,zero,ymm1[3],ymm0[3]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2pd256_zz73:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2pd {{.*#+}} ymm0 = zero,zero,ymm1[3],ymm0[3]
; X64-NEXT: retq
%1 = call <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double> %a0, <4 x double> %a1, <4 x i64> <i64 0, i64 0, i64 14, i64 10>, i8 3)
@@ -143,12 +143,12 @@ define <4 x double> @vpermil2pd256_zz73(
define <4 x float> @vpermil2ps_0561(<4 x float> %a0, <4 x float> %a1) {
; X32-LABEL: vpermil2ps_0561:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[1]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2ps_0561:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[1]
; X64-NEXT: retq
%1 = call <4 x float> @llvm.x86.xop.vpermil2ps(<4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 5, i32 6, i32 1>, i8 0)
@@ -157,12 +157,12 @@ define <4 x float> @vpermil2ps_0561(<4 x
define <8 x float> @vpermil2ps256_098144FE(<8 x float> %a0, <8 x float> %a1) {
; X32-LABEL: vpermil2ps256_098144FE:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[1,0],ymm0[1,4,4],ymm1[7,6]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2ps256_098144FE:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],ymm1[1,0],ymm0[1,4,4],ymm1[7,6]
; X64-NEXT: retq
%1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 5, i32 4, i32 1, i32 0, i32 0, i32 7, i32 6>, i8 0)
@@ -171,12 +171,12 @@ define <8 x float> @vpermil2ps256_098144
define <8 x float> @vpermil2ps256_0zz8BzzA(<8 x float> %a0, <8 x float> %a1) {
; X32-LABEL: vpermil2ps256_0zz8BzzA:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],zero,zero,ymm1[0,7],zero,zero,ymm1[6]
; X32-NEXT: retl
;
; X64-LABEL: vpermil2ps256_0zz8BzzA:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vpermil2ps {{.*#+}} ymm0 = ymm0[0],zero,zero,ymm1[0,7],zero,zero,ymm1[6]
; X64-NEXT: retq
%1 = call <8 x float> @llvm.x86.xop.vpermil2ps.256(<8 x float> %a0, <8 x float> %a1, <8 x i32> <i32 0, i32 8, i32 8, i32 4, i32 7, i32 8, i32 8, i32 6>, i8 2)
Modified: llvm/trunk/test/CodeGen/X86/xop-pcmov.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xop-pcmov.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xop-pcmov.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xop-pcmov.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define <4 x double> @pcmov_4f64(<4 x double> %a, <4 x double> %b, <4 x double> %m) {
; CHECK-LABEL: pcmov_4f64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = bitcast <4 x double> %m to <4 x i64>
@@ -20,7 +20,7 @@ define <4 x double> @pcmov_4f64(<4 x dou
define <2 x double> @pcmov_2f64(<2 x double> %a, <2 x double> %b, <2 x double> %m) {
; CHECK-LABEL: pcmov_2f64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = bitcast <2 x double> %m to <2 x i64>
@@ -36,7 +36,7 @@ define <2 x double> @pcmov_2f64(<2 x dou
define <8 x float> @pcmov_8f32(<8 x float> %a, <8 x float> %b, <8 x float> %m) {
; CHECK-LABEL: pcmov_8f32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = bitcast <8 x float> %m to <8 x i32>
@@ -52,7 +52,7 @@ define <8 x float> @pcmov_8f32(<8 x floa
define <4 x float> @pcmov_4f32(<4 x float> %a, <4 x float> %b, <4 x float> %m) {
; CHECK-LABEL: pcmov_4f32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = bitcast <4 x float> %m to <4 x i32>
@@ -68,7 +68,7 @@ define <4 x float> @pcmov_4f32(<4 x floa
define <4 x i64> @pcmov_4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %m) {
; CHECK-LABEL: pcmov_4i64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = and <4 x i64> %a, %m
@@ -80,7 +80,7 @@ define <4 x i64> @pcmov_4i64(<4 x i64> %
define <2 x i64> @pcmov_2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %m) {
; CHECK-LABEL: pcmov_2i64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = and <2 x i64> %a, %m
@@ -92,7 +92,7 @@ define <2 x i64> @pcmov_2i64(<2 x i64> %
define <8 x i32> @pcmov_8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32> %m) {
; CHECK-LABEL: pcmov_8i32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = and <8 x i32> %a, %m
@@ -104,7 +104,7 @@ define <8 x i32> @pcmov_8i32(<8 x i32> %
define <4 x i32> @pcmov_4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %m) {
; CHECK-LABEL: pcmov_4i32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = and <4 x i32> %a, %m
@@ -116,7 +116,7 @@ define <4 x i32> @pcmov_4i32(<4 x i32> %
define <16 x i16> @pcmov_16i16(<16 x i16> %a, <16 x i16> %b, <16 x i16> %m) {
; CHECK-LABEL: pcmov_16i16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = and <16 x i16> %a, %m
@@ -128,7 +128,7 @@ define <16 x i16> @pcmov_16i16(<16 x i16
define <8 x i16> @pcmov_8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %m) {
; CHECK-LABEL: pcmov_8i16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = and <8 x i16> %a, %m
@@ -140,7 +140,7 @@ define <8 x i16> @pcmov_8i16(<8 x i16> %
define <32 x i8> @pcmov_32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8> %m) {
; CHECK-LABEL: pcmov_32i8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %ymm2, %ymm1, %ymm0, %ymm0
; CHECK-NEXT: retq
%1 = and <32 x i8> %a, %m
@@ -152,7 +152,7 @@ define <32 x i8> @pcmov_32i8(<32 x i8> %
define <16 x i8> @pcmov_16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %m) {
; CHECK-LABEL: pcmov_16i8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmov %xmm2, %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = and <16 x i8> %a, %m
Modified: llvm/trunk/test/CodeGen/X86/xor-icmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xor-icmp.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xor-icmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xor-icmp.ll Mon Dec 4 09:18:51 2017
@@ -5,23 +5,23 @@
define i32 @t(i32 %a, i32 %b) nounwind ssp {
; X32-LABEL: t:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: xorb {{[0-9]+}}(%esp), %al
; X32-NEXT: testb $64, %al
; X32-NEXT: je .LBB0_1
-; X32-NEXT: # BB#2: # %bb1
+; X32-NEXT: # %bb.2: # %bb1
; X32-NEXT: jmp bar # TAILCALL
; X32-NEXT: .LBB0_1: # %bb
; X32-NEXT: jmp foo # TAILCALL
;
; X64-LABEL: t:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xorl %esi, %edi
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: btl $14, %edi
; X64-NEXT: jae .LBB0_1
-; X64-NEXT: # BB#2: # %bb1
+; X64-NEXT: # %bb.2: # %bb1
; X64-NEXT: jmp bar # TAILCALL
; X64-NEXT: .LBB0_1: # %bb
; X64-NEXT: jmp foo # TAILCALL
@@ -48,27 +48,27 @@ declare i32 @bar(...)
define i32 @t2(i32 %x, i32 %y) nounwind ssp {
; X32-LABEL: t2:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X32-NEXT: sete %al
; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; X32-NEXT: sete %cl
; X32-NEXT: cmpb %al, %cl
; X32-NEXT: je .LBB1_1
-; X32-NEXT: # BB#2: # %bb
+; X32-NEXT: # %bb.2: # %bb
; X32-NEXT: jmp foo # TAILCALL
; X32-NEXT: .LBB1_1: # %return
; X32-NEXT: retl
;
; X64-LABEL: t2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: testl %edi, %edi
; X64-NEXT: sete %al
; X64-NEXT: testl %esi, %esi
; X64-NEXT: sete %cl
; X64-NEXT: cmpb %al, %cl
; X64-NEXT: je .LBB1_1
-; X64-NEXT: # BB#2: # %bb
+; X64-NEXT: # %bb.2: # %bb
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: jmp foo # TAILCALL
; X64-NEXT: .LBB1_1: # %return
Modified: llvm/trunk/test/CodeGen/X86/xor-select-i1-combine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/xor-select-i1-combine.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/xor-select-i1-combine.ll (original)
+++ llvm/trunk/test/CodeGen/X86/xor-select-i1-combine.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define i32 @main(i8 %small) {
; CHECK-LABEL: main:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: testb $1, %dil
; CHECK-NEXT: movl $m, %eax
; CHECK-NEXT: movl $n, %ecx
@@ -24,7 +24,7 @@ entry:
define i32 @main2(i8 %small) {
; CHECK-LABEL: main2:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl $m, %eax
; CHECK-NEXT: movl $n, %ecx
; CHECK-NEXT: testb $1, %dil
Modified: llvm/trunk/test/CodeGen/X86/zext-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-shl.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-shl.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i32 @t1(i8 zeroext %x) nounwind {
; CHECK-LABEL: t1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: shll $5, %eax
; CHECK-NEXT: retl
@@ -15,7 +15,7 @@ define i32 @t1(i8 zeroext %x) nounwind {
define i32 @t2(i8 zeroext %x) nounwind {
; CHECK-LABEL: t2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: shrl $3, %eax
; CHECK-NEXT: retl
Modified: llvm/trunk/test/CodeGen/X86/zext-trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/zext-trunc.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/zext-trunc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/zext-trunc.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i64 @foo(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: foo:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: leal (%rdi,%rsi), %eax
; CHECK-NEXT: retq
%c = add i64 %a, %b
Modified: llvm/trunk/test/DebugInfo/COFF/asan-module-ctor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/asan-module-ctor.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/asan-module-ctor.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/asan-module-ctor.ll Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@
; The module ctor has no debug info. All we have to do is don't crash.
; X86: _asan.module_ctor:
; X86-NEXT: L{{.*}}:
-; X86: # BB
+; X86: # %bb.
; X86-NEXT: calll ___asan_init_v3
; X86-NEXT: retl
Modified: llvm/trunk/test/DebugInfo/COFF/inlining-header.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/inlining-header.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/inlining-header.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/inlining-header.ll Mon Dec 4 09:18:51 2017
@@ -26,7 +26,7 @@
; ASM: _main: # @main
; ASM: Lfunc_begin0:
; ASM: .cv_func_id 0
-; ASM: # BB#0: # %entry
+; ASM: # %bb.0: # %entry
; ASM: .cv_file 1 "D:\\src\\llvm\\build\\t.cpp"
; ASM: .cv_loc 0 1 9 5 is_stmt 0 # t.cpp:9:5
; ASM: incl "?x@@3HC"
Modified: llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/local-variable-gap.ll Mon Dec 4 09:18:51 2017
@@ -38,7 +38,7 @@
; ASM: movl %esi, %ecx
; ASM: testl %eax, %eax
; ASM: jne .LBB0_5
-; ASM: # BB#2: # %if.end
+; ASM: # %bb.2: # %if.end
; ASM: #DEBUG_VALUE: p <- %esi
; ASM: callq use
; ASM: jmp .LBB0_4
Modified: llvm/trunk/test/DebugInfo/COFF/local-variables.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/local-variables.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/local-variables.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/local-variables.ll Mon Dec 4 09:18:51 2017
@@ -26,14 +26,14 @@
; ASM: .cv_file 1 "D:\\src\\llvm\\build\\t.cpp"
; ASM: .cv_loc 0 1 7 0 is_stmt 0 # t.cpp:7:0
; ASM: .seh_proc f
-; ASM: # BB#0: # %entry
+; ASM: # %bb.0: # %entry
; ASM: subq $56, %rsp
; ASM: movl %ecx, 52(%rsp)
; ASM: [[prologue_end:\.Ltmp.*]]:
; ASM: .cv_loc 0 1 8 7 # t.cpp:8:7
; ASM: testl %ecx, %ecx
; ASM: je .LBB0_2
-; ASM: # BB#1: # %if.then
+; ASM: # %bb.1: # %if.then
; ASM: [[if_start:\.Ltmp.*]]:
; ASM: .cv_loc 0 1 9 9 # t.cpp:9:9
; ASM: movl $42, 40(%rsp)
Modified: llvm/trunk/test/DebugInfo/COFF/multifile.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/multifile.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/multifile.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/multifile.ll Mon Dec 4 09:18:51 2017
@@ -17,7 +17,7 @@
; 10 }
; X86-LABEL: _f:
-; X86: # BB
+; X86: # %bb.
; X86: .cv_file 1 "D:\\one.c" "70B51F534D80639D033AE92C6A856AF6" 1
; X86: .cv_loc 0 1 1 0 is_stmt 0 # one.c:1:0
; X86: calll _g
@@ -106,7 +106,7 @@
; X64-NEXT: .L{{.*}}:{{$}}
; X64: .cv_file 1 "D:\\input.c" "70B51F534D80639D033AE92C6A856AF6" 1
; X64: .cv_loc 0 1 3 0 is_stmt 0 # input.c:3:0
-; X64: # BB
+; X64: # %bb.
; X64: subq $40, %rsp
; X64: .cv_file 2 "D:\\one.c" "70B51F534D80639D033AE92C6A856AF6" 1
; X64: .cv_loc 0 2 1 0 # one.c:1:0
Modified: llvm/trunk/test/DebugInfo/COFF/multifunction.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/multifunction.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/multifunction.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/multifunction.ll Mon Dec 4 09:18:51 2017
@@ -23,7 +23,7 @@
; X86-LABEL: _x:
-; X86: # BB
+; X86: # %bb.
; X86: .cv_file 1 "D:\\source.c"
; X86: .cv_loc 0 1 4 42 is_stmt 0 # source.c:4:42
; X86: calll _z
@@ -32,7 +32,7 @@
; X86: [[END_OF_X:.?Lfunc_end.*]]:
;
; X86-LABEL: _y:
-; X86: # BB
+; X86: # %bb.
; X86: .cv_loc 1 1 8 52 # source.c:8:52
; X86: calll _z
; X86: .cv_loc 1 1 9 53 # source.c:9:53
@@ -40,7 +40,7 @@
; X86: [[END_OF_Y:.?Lfunc_end.*]]:
;
; X86-LABEL: _f:
-; X86: # BB
+; X86: # %bb.
; X86: .cv_loc 2 1 12 62 # source.c:12:62
; X86: calll _x
; X86: .cv_loc 2 1 13 63 # source.c:13:63
@@ -287,7 +287,7 @@
; X64-NEXT: .L{{.*}}:
; X64: .cv_file 1 "D:\\source.c"
; X64: .cv_loc 0 1 3 0 is_stmt 0 # source.c:3:0
-; X64: # BB
+; X64: # %bb.
; X64: subq $40, %rsp
; X64: .cv_loc 0 1 4 42 # source.c:4:42
; X64-NEXT: callq z
@@ -299,7 +299,7 @@
; X64-LABEL: y:
; X64-NEXT: .L{{.*}}:
; X64: .cv_loc 1 1 7 0 # source.c:7:0
-; X64: # BB
+; X64: # %bb.
; X64: subq $40, %rsp
; X64: .cv_loc 1 1 8 52 # source.c:8:52
; X64-NEXT: callq z
@@ -311,7 +311,7 @@
; X64-LABEL: f:
; X64-NEXT: .L{{.*}}:
; X64: .cv_loc 2 1 11 0 # source.c:11:0
-; X64: # BB
+; X64: # %bb.
; X64: subq $40, %rsp
; X64: .cv_loc 2 1 12 62 # source.c:12:62
; X64-NEXT: callq x
Modified: llvm/trunk/test/DebugInfo/COFF/pieces.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/pieces.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/pieces.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/pieces.ll Mon Dec 4 09:18:51 2017
@@ -37,7 +37,7 @@
; ASM-LABEL: loop_csr: # @loop_csr
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 0 32] 0
; ASM: #DEBUG_VALUE: loop_csr:o <- [DW_OP_LLVM_fragment 32 32] 0
-; ASM: # BB#2: # %for.body.preheader
+; ASM: # %bb.2: # %for.body.preheader
; ASM: xorl %edi, %edi
; ASM: xorl %esi, %esi
; ASM: .p2align 4, 0x90
Modified: llvm/trunk/test/DebugInfo/COFF/register-variables.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/register-variables.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/register-variables.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/register-variables.ll Mon Dec 4 09:18:51 2017
@@ -23,7 +23,7 @@
; ASM: f: # @f
; ASM: .Lfunc_begin0:
-; ASM: # BB#0: # %entry
+; ASM: # %bb.0: # %entry
; ASM: pushq %rsi
; ASM: subq $32, %rsp
; ASM: #DEBUG_VALUE: f:p <- %ecx
@@ -38,7 +38,7 @@
; ASM: testl %esi, %esi
; ASM: je .LBB0_2
; ASM: [[after_je:\.Ltmp.*]]:
-; ASM: # BB#1: # %if.then
+; ASM: # %bb.1: # %if.then
; ASM-DAG: #DEBUG_VALUE: inlineinc:a <- %eax
; ASM-DAG: #DEBUG_VALUE: a <- %eax
; ASM-DAG: #DEBUG_VALUE: f:p <- %esi
Modified: llvm/trunk/test/DebugInfo/COFF/simple.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/COFF/simple.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/COFF/simple.ll (original)
+++ llvm/trunk/test/DebugInfo/COFF/simple.ll Mon Dec 4 09:18:51 2017
@@ -16,7 +16,7 @@
; 5 }
; X86-LABEL: _f:
-; X86: # BB
+; X86: # %bb.
; X86: .cv_file 1 "D:\\test.c" "F310AB26998CA831CBDF169E4EECACFA" 1
; X86: .cv_loc 0 1 4 2 is_stmt 0 # test.c:4:2
; X86: calll _g
@@ -131,7 +131,7 @@
; X64-NEXT: .L{{.*}}:{{$}}
; X64: .cv_file 1 "D:\\test.c" "F310AB26998CA831CBDF169E4EECACFA" 1
; X64: .cv_loc 0 1 3 0 is_stmt 0 # test.c:3:0
-; X64: # BB
+; X64: # %bb.
; X64: subq $40, %rsp
; X64: .cv_loc 0 1 4 2 # test.c:4:2
; X64-NEXT: callq g
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir Mon Dec 4 09:18:51 2017
@@ -28,8 +28,8 @@
# CHECK: ![[Y_VAR:[0-9]+]] = !DILocalVariable(name: "y", {{.*}})
# CHECK: ![[Z_VAR:[0-9]+]] = !DILocalVariable(name: "z", {{.*}})
-# DBG_VALUE for variables "x", "y" and "z" are extended into BB#9 from its
-# predecessors BB#0, BB#2 and BB#8.
+# DBG_VALUE for variables "x", "y" and "z" are extended into %bb.9 from its
+# predecessors %bb.0, %bb.2 and %bb.8.
# CHECK: bb.9.for.end:
# CHECK-DAG: DBG_VALUE debug-use %edi, debug-use %noreg, ![[X_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
# CHECK-DAG: DBG_VALUE debug-use %esi, debug-use %noreg, ![[Y_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir Mon Dec 4 09:18:51 2017
@@ -30,8 +30,8 @@
# llvm/test/DebugInfo/live-debug-values.ll and present here for testing under
# MIR->MIR serialization.
-# DBG_VALUE for variable "n" is extended into BB#5 from its predecessors BB#3
-# and BB#4.
+# DBG_VALUE for variable "n" is extended into %bb.5 from its predecessors %bb.3
+# and %bb.4.
# CHECK: ![[N_VAR:[0-9]+]] = !DILocalVariable(name: "n",{{.*}})
#
# CHECK: bb.5.if.end.7:
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg-debugonly.mir Mon Dec 4 09:18:51 2017
@@ -154,10 +154,10 @@ body: |
#
# CHECKDBG-LABEL: ********** EMITTING LIVE DEBUG VARIABLES **********
# CHECKDBG-NEXT: !"argc,5" [0B;0e):0 Loc0=%edi
-# CHECKDBG-NEXT: [0B;0e):0 BB#0-160B
+# CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B
# CHECKDBG-NEXT: !"argv,5" [0B;0e):0 Loc0=%rsi
-# CHECKDBG-NEXT: [0B;0e):0 BB#0-160B
+# CHECKDBG-NEXT: [0B;0e):0 %bb.0-160B
# CHECKDBG-NEXT: !"a0,7" [16r;64r):0 Loc0=%2
-# CHECKDBG-NEXT: [16r;64r):0 BB#0-160B
+# CHECKDBG-NEXT: [16r;64r):0 %bb.0-160B
# CHECKDBG-NEXT: !"a1,8" [32r;80r):0 Loc0=%3
-# CHECKDBG-NEXT: [32r;80r):0 BB#0-160B
+# CHECKDBG-NEXT: [32r;80r):0 %bb.0-160B
Modified: llvm/trunk/test/DebugInfo/SystemZ/variable-loc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/SystemZ/variable-loc.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/SystemZ/variable-loc.s (original)
+++ llvm/trunk/test/DebugInfo/SystemZ/variable-loc.s Mon Dec 4 09:18:51 2017
@@ -45,7 +45,7 @@ main:
.cfi_startproc
.Lfunc_begin0:
.loc 2 18 0 # :18:0
-# BB#0: # %entry
+# %bb.0: # %entry
stmg %r12, %r15, 96(%r15)
.Ltmp2:
.cfi_offset %r12, -64
Modified: llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/dbg-value-transfer-order.ll Mon Dec 4 09:18:51 2017
@@ -28,7 +28,7 @@
; CHECK: movl $32, %ecx
; CHECK: testl {{.*}}
; CHECK: jne .LBB0_3
-; CHECK: # BB#2: # %if.then
+; CHECK: # %bb.2: # %if.then
; CHECK: callq if_then
; CHECK: movl %eax, %ecx
; CHECK: .LBB0_3: # %if.end
Modified: llvm/trunk/test/DebugInfo/X86/live-debug-values.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/live-debug-values.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/live-debug-values.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/live-debug-values.ll Mon Dec 4 09:18:51 2017
@@ -27,8 +27,8 @@
; This case will also produce multiple locations but only the debug range
; extension is tested here.
-; DBG_VALUE for variable "n" is extended into BB#5 from its predecessors BB#3
-; and BB#4.
+; DBG_VALUE for variable "n" is extended into %bb.5 from its predecessors %bb.3
+; and %bb.4.
; CHECK: .LBB0_5:
; CHECK-NEXT: #DEBUG_VALUE: main:n <- %ebx
; Other register values have been clobbered.
Modified: llvm/trunk/test/ExecutionEngine/RuntimeDyld/PowerPC/ppc32_elf_rel_addr16.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/ExecutionEngine/RuntimeDyld/PowerPC/ppc32_elf_rel_addr16.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/ExecutionEngine/RuntimeDyld/PowerPC/ppc32_elf_rel_addr16.s (original)
+++ llvm/trunk/test/ExecutionEngine/RuntimeDyld/PowerPC/ppc32_elf_rel_addr16.s Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
.type lookup, at function
lookup: # @lookup
.Lfunc_begin0:
-# BB#0:
+# %bb.0:
stw 31, -4(1)
stwu 1, -16(1)
insn_hi:
Modified: llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/COFF_x86_64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/COFF_x86_64.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/COFF_x86_64.s (original)
+++ llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/COFF_x86_64.s Mon Dec 4 09:18:51 2017
@@ -18,7 +18,7 @@ __real400921f9f01b866e:
F: # @F
.Ltmp0:
.seh_proc F
-# BB#0: # %entry
+# %bb.0: # %entry
.Ltmp1:
.seh_endprologue
# rtdyld-check: decode_operand(inst1, 4) = __real400921f9f01b866e - next_pc(inst1)
Modified: llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x64-64_PIC_relocations.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x64-64_PIC_relocations.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x64-64_PIC_relocations.s (original)
+++ llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x64-64_PIC_relocations.s Mon Dec 4 09:18:51 2017
@@ -21,7 +21,7 @@
.align 16, 0x90
.type foo, at function
foo: # @foo
-# BB#0:
+# %bb.0:
movq G at GOTPCREL(%rip), %rax
movl (%rax), %eax
retq
Modified: llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x86_64_StubBuf.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x86_64_StubBuf.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x86_64_StubBuf.s (original)
+++ llvm/trunk/test/ExecutionEngine/RuntimeDyld/X86/ELF_x86_64_StubBuf.s Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
.align 4, 0x90
_f: ## @f
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
pushq %rax
Ltmp0:
.cfi_def_cfa_offset 16
Modified: llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov.s (original)
+++ llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov.s Mon Dec 4 09:18:51 2017
@@ -19,7 +19,7 @@
# CHECK: movb %al, (%rdi)
mov1b: # @mov1b
.cfi_startproc
-# BB#0:
+# %bb.0:
#APP
movb (%rsi), %al
movb %al, (%rdi)
@@ -48,7 +48,7 @@ mov1b:
# CHECK: movaps %xmm0, (%rdi)
mov16b: # @mov16b
.cfi_startproc
-# BB#0:
+# %bb.0:
#APP
movaps (%rsi), %xmm0
movaps %xmm0, (%rdi)
Modified: llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov_no_instrumentation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov_no_instrumentation.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov_no_instrumentation.s (original)
+++ llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_mov_no_instrumentation.s Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
# CHECK-NOT: callq __asan_report_store1 at PLT
mov1b: # @mov1b
.cfi_startproc
-# BB#0:
+# %bb.0:
#APP
movb (%rsi), %al
movb %al, (%rdi)
Modified: llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s (original)
+++ llvm/trunk/test/Instrumentation/AddressSanitizer/X86/asm_swap_intel.s Mon Dec 4 09:18:51 2017
@@ -31,7 +31,7 @@
# CHECK: movq %rax, (%rdx)
swap: # @swap
.cfi_startproc
-# BB#0:
+# %bb.0:
push rbx
.Ltmp0:
.cfi_def_cfa_offset 16
Modified: llvm/trunk/test/MC/AArch64/arm64-ilp32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/arm64-ilp32.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/arm64-ilp32.s (original)
+++ llvm/trunk/test/MC/AArch64/arm64-ilp32.s Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
.align 2
.type foo, at function
foo: // @foo
-// BB#0: // %entry
+// %bb.0: // %entry
sub sp, sp, #16 // =16
// CHECK-ILP32: 0000000000000004 R_AARCH64_P32_ADR_PREL_PG_HI21 sizes
// CHECK-ILP32: 0000000000000008 R_AARCH64_P32_ADD_ABS_LO12_NC sizes
Modified: llvm/trunk/test/MC/AArch64/arm64-leaf-compact-unwind.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/arm64-leaf-compact-unwind.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/arm64-leaf-compact-unwind.s (original)
+++ llvm/trunk/test/MC/AArch64/arm64-leaf-compact-unwind.s Mon Dec 4 09:18:51 2017
@@ -70,7 +70,7 @@
.align 2
_foo1: ; @foo1
.cfi_startproc
-; BB#0: ; %entry
+; %bb.0: ; %entry
add w0, w0, #42 ; =#42
ret
.cfi_endproc
@@ -79,7 +79,7 @@ _foo1:
.align 2
_foo2: ; @foo2
.cfi_startproc
-; BB#0: ; %entry
+; %bb.0: ; %entry
sub sp, sp, #144 ; =#144
Ltmp2:
.cfi_def_cfa_offset 144
@@ -91,7 +91,7 @@ LBB1_1:
add x9, x9, #1 ; =#1
cmp w9, #36 ; =#36
b.ne LBB1_1
-; BB#2:
+; %bb.2:
mov x9, xzr
mov w0, wzr
LBB1_3: ; %for.body4
@@ -101,7 +101,7 @@ LBB1_3:
cmp w9, #144 ; =#144
add w0, w10, w0
b.ne LBB1_3
-; BB#4: ; %for.end9
+; %bb.4: ; %for.end9
add sp, sp, #144 ; =#144
ret
.cfi_endproc
@@ -110,7 +110,7 @@ LBB1_3:
.align 2
_foo3: ; @foo3
.cfi_startproc
-; BB#0: ; %entry
+; %bb.0: ; %entry
stp x26, x25, [sp, #-64]!
stp x24, x23, [sp, #16]
stp x22, x21, [sp, #32]
@@ -191,7 +191,7 @@ Lloh1:
.align 2
_foo4: ; @foo4
.cfi_startproc
-; BB#0: ; %entry
+; %bb.0: ; %entry
stp x28, x27, [sp, #-16]!
sub sp, sp, #512 ; =#512
Ltmp12:
@@ -211,7 +211,7 @@ LBB3_1:
add x9, x9, #1 ; =#1
cmp w9, #128 ; =#128
b.ne LBB3_1
-; BB#2: ; %for.cond2.preheader
+; %bb.2: ; %for.cond2.preheader
mov x9, xzr
mov w0, wzr
add x8, x8, w5, sxtw #2
@@ -222,7 +222,7 @@ LBB3_3:
cmp w9, #512 ; =#512
add w0, w10, w0
b.ne LBB3_3
-; BB#4: ; %for.end11
+; %bb.4: ; %for.end11
add sp, sp, #512 ; =#512
ldp x28, x27, [sp], #16
ret
Modified: llvm/trunk/test/MC/AArch64/basic-pic.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/basic-pic.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/basic-pic.s (original)
+++ llvm/trunk/test/MC/AArch64/basic-pic.s Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
.type get_globalvar, at function
get_globalvar: // @get_globalvar
.cfi_startproc
-// BB#0:
+// %bb.0:
adrp x0, :got:var
ldr x0, [x0, #:got_lo12:var]
ldr w0, [x0]
@@ -24,7 +24,7 @@ get_globalvar:
.type get_globalvaraddr, at function
get_globalvaraddr: // @get_globalvaraddr
.cfi_startproc
-// BB#0:
+// %bb.0:
adrp x0, :got:var
ldr x0, [x0, #:got_lo12:var]
ret
@@ -38,7 +38,7 @@ get_globalvaraddr:
.type get_hiddenvar, at function
get_hiddenvar: // @get_hiddenvar
.cfi_startproc
-// BB#0:
+// %bb.0:
adrp x0, hiddenvar
ldr w0, [x0, #:lo12:hiddenvar]
ret
@@ -52,7 +52,7 @@ get_hiddenvar:
.type get_hiddenvaraddr, at function
get_hiddenvaraddr: // @get_hiddenvaraddr
.cfi_startproc
-// BB#0:
+// %bb.0:
adrp x0, hiddenvar
add x0, x0, #:lo12:hiddenvar
ret
@@ -66,7 +66,7 @@ get_hiddenvaraddr:
.type get_func, at function
get_func: // @get_func
.cfi_startproc
-// BB#0:
+// %bb.0:
adrp x0, :got:get_func
ldr x0, [x0, #:got_lo12:get_func]
ret
Modified: llvm/trunk/test/MC/AArch64/elf-extern.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/elf-extern.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/elf-extern.s (original)
+++ llvm/trunk/test/MC/AArch64/elf-extern.s Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@
.type check_extern, at function
check_extern: // @check_extern
.cfi_startproc
-// BB#0:
+// %bb.0:
sub sp, sp, #16
.Ltmp2:
.cfi_def_cfa sp, 16
Modified: llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s (original)
+++ llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
.globl test_inline_modifier_L
.type test_inline_modifier_L, at function
test_inline_modifier_L: // @test_inline_modifier_L
-// BB#0:
+// %bb.0:
//APP
add x0, x0, #:lo12:var_simple
//NO_APP
@@ -38,7 +38,7 @@ test_inline_modifier_L:
.globl test_inline_modifier_G
.type test_inline_modifier_G, at function
test_inline_modifier_G: // @test_inline_modifier_G
-// BB#0:
+// %bb.0:
//APP
add x0, x0, #:dtprel_hi12:var_tlsld, lsl #12
//NO_APP
@@ -55,7 +55,7 @@ test_inline_modifier_G:
.globl test_inline_modifier_A
.type test_inline_modifier_A, at function
test_inline_modifier_A: // @test_inline_modifier_A
-// BB#0:
+// %bb.0:
//APP
adrp x0, var_simple
//NO_APP
@@ -79,7 +79,7 @@ test_inline_modifier_A:
.globl test_inline_modifier_wx
.type test_inline_modifier_wx, at function
test_inline_modifier_wx: // @test_inline_modifier_wx
-// BB#0:
+// %bb.0:
mov w2, w0
//APP
add w2, w2, w2
@@ -115,7 +115,7 @@ test_inline_modifier_wx:
.globl test_inline_modifier_bhsdq
.type test_inline_modifier_bhsdq, at function
test_inline_modifier_bhsdq: // @test_inline_modifier_bhsdq
-// BB#0:
+// %bb.0:
//APP
ldr b0, [sp]
//NO_APP
@@ -153,7 +153,7 @@ test_inline_modifier_bhsdq:
.globl test_inline_modifier_c
.type test_inline_modifier_c, at function
test_inline_modifier_c: // @test_inline_modifier_c
-// BB#0:
+// %bb.0:
//APP
adr x0, 3
//NO_APP
Modified: llvm/trunk/test/MC/AArch64/jump-table.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/jump-table.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/jump-table.s (original)
+++ llvm/trunk/test/MC/AArch64/jump-table.s Mon Dec 4 09:18:51 2017
@@ -6,11 +6,11 @@
.type test_jumptable, at function
test_jumptable: // @test_jumptable
.cfi_startproc
-// BB#0:
+// %bb.0:
ubfx w1, w0, #0, #32
cmp w0, #4
b.hi .LBB0_3
-// BB#1:
+// %bb.1:
adrp x0, .LJTI0_0
add x0, x0, #:lo12:.LJTI0_0
ldr x0, [x0, x1, lsl #3]
Modified: llvm/trunk/test/MC/ARM/2010-11-30-reloc-movt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/2010-11-30-reloc-movt.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/2010-11-30-reloc-movt.s (original)
+++ llvm/trunk/test/MC/ARM/2010-11-30-reloc-movt.s Mon Dec 4 09:18:51 2017
@@ -17,7 +17,7 @@
.align 2
.type barf,%function
barf: @ @barf
-@ BB#0: @ %entry
+@ %bb.0: @ %entry
push {r11, lr}
movw r0, :lower16:a
movt r0, :upper16:a
Modified: llvm/trunk/test/MC/ARM/elf-eflags-eabi.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/elf-eflags-eabi.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/elf-eflags-eabi.s (original)
+++ llvm/trunk/test/MC/ARM/elf-eflags-eabi.s Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
.align 2
.type barf,%function
barf: @ @barf
-@ BB#0: @ %entry
+@ %bb.0: @ %entry
b foo
@@@ make sure the EF_ARM_EABIMASK comes out OK
Modified: llvm/trunk/test/MC/ARM/elf-movt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/elf-movt.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/elf-movt.s (original)
+++ llvm/trunk/test/MC/ARM/elf-movt.s Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@
.align 2
.type barf,%function
barf: @ @barf
-@ BB#0: @ %entry
+@ %bb.0: @ %entry
movw r0, :lower16:GOT-(.LPC0_2+8)
movt r0, :upper16:GOT-(.LPC0_2+8)
.LPC0_2:
Modified: llvm/trunk/test/MC/AsmParser/seh-directive-errors.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AsmParser/seh-directive-errors.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/AsmParser/seh-directive-errors.s (original)
+++ llvm/trunk/test/MC/AsmParser/seh-directive-errors.s Mon Dec 4 09:18:51 2017
@@ -68,7 +68,7 @@ g:
.p2align 4, 0x90
h: # @h
.seh_proc h
-# BB#0: # %entry
+# %bb.0: # %entry
subq $72, %rsp
.seh_stackalloc 72
movaps %xmm7, 48(%rsp) # 16-byte Spill
Modified: llvm/trunk/test/MC/COFF/basic-coff-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/basic-coff-64.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/basic-coff-64.s (original)
+++ llvm/trunk/test/MC/COFF/basic-coff-64.s Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
.globl _main
.align 16, 0x90
_main: # @main
-# BB#0: # %entry
+# %bb.0: # %entry
subl $4, %esp
movl $.L_.str, (%esp)
call _printf
Modified: llvm/trunk/test/MC/COFF/basic-coff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/basic-coff.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/basic-coff.s (original)
+++ llvm/trunk/test/MC/COFF/basic-coff.s Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
.globl _main
.align 16, 0x90
_main: # @main
-# BB#0: # %entry
+# %bb.0: # %entry
subl $4, %esp
movl $L_.str, (%esp)
call _printf
Modified: llvm/trunk/test/MC/COFF/cv-def-range.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/cv-def-range.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/cv-def-range.s (original)
+++ llvm/trunk/test/MC/COFF/cv-def-range.s Mon Dec 4 09:18:51 2017
@@ -17,7 +17,7 @@ Lfunc_begin0:
.cv_file 1 "\\usr\\local\\google\\home\\majnemer\\llvm\\src\\<stdin>"
.cv_func_id 0
.cv_loc 0 1 3 0 is_stmt 0 # <stdin>:3:0
-# BB#0: # %entry
+# %bb.0: # %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
Modified: llvm/trunk/test/MC/COFF/cv-empty-linetable.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/cv-empty-linetable.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/cv-empty-linetable.s (original)
+++ llvm/trunk/test/MC/COFF/cv-empty-linetable.s Mon Dec 4 09:18:51 2017
@@ -14,7 +14,7 @@
.p2align 4, 0x90
_f: # @f
Lfunc_begin0:
-# BB#0: # %entry
+# %bb.0: # %entry
.cv_file 1 "cv-empty-linetable.s"
.cv_func_id 1
.cv_loc 1 1 3 15 is_stmt 0
Modified: llvm/trunk/test/MC/COFF/cv-inline-linetable-unreachable.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/cv-inline-linetable-unreachable.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/cv-inline-linetable-unreachable.s (original)
+++ llvm/trunk/test/MC/COFF/cv-inline-linetable-unreachable.s Mon Dec 4 09:18:51 2017
@@ -18,7 +18,7 @@ Lfunc_begin0:
.cv_func_id 0
.cv_inline_site_id 1 within 0 inlined_at 1 1 1
.cv_loc 0 1 7 0 is_stmt 0 # <stdin>:7:0
-# BB#0: # %entry
+# %bb.0: # %entry
pushl %ebp
movl %esp, %ebp
.cv_loc 1 1 4 3 # <stdin>:4:3
Modified: llvm/trunk/test/MC/COFF/cv-inline-linetable.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/cv-inline-linetable.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/cv-inline-linetable.s (original)
+++ llvm/trunk/test/MC/COFF/cv-inline-linetable.s Mon Dec 4 09:18:51 2017
@@ -19,7 +19,7 @@ Lfunc_begin0:
.cv_inline_site_id 1 within 0 inlined_at 1 15 3
.cv_inline_site_id 2 within 1 inlined_at 1 10 3
.cv_loc 0 1 13 0 is_stmt 0 # t.cpp:13:0
-# BB#0: # %entry
+# %bb.0: # %entry
pushl %eax
.cv_loc 0 1 14 5 # t.cpp:14:5
addl $6, "?x@@3HC"
Modified: llvm/trunk/test/MC/COFF/diff.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/diff.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/diff.s (original)
+++ llvm/trunk/test/MC/COFF/diff.s Mon Dec 4 09:18:51 2017
@@ -27,7 +27,7 @@ Y:
.globl _foobar
.align 16, 0x90
_foobar: # @foobar
-# BB#0:
+# %bb.0:
ret
.data
Modified: llvm/trunk/test/MC/COFF/seh-linkonce.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/seh-linkonce.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/seh-linkonce.s (original)
+++ llvm/trunk/test/MC/COFF/seh-linkonce.s Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
weak_func: # @weak_func
.Ltmp0:
.seh_proc weak_func
-# BB#0: # %entry
+# %bb.0: # %entry
pushq %rbp
.Ltmp1:
.seh_pushreg 5
Modified: llvm/trunk/test/MC/COFF/seh-section-2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/seh-section-2.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/seh-section-2.s (original)
+++ llvm/trunk/test/MC/COFF/seh-section-2.s Mon Dec 4 09:18:51 2017
@@ -13,7 +13,7 @@
f: # @f
.Ltmp0:
.seh_proc f
-# BB#0:
+# %bb.0:
subq $40, %rsp
.Ltmp1:
.seh_stackalloc 40
@@ -37,7 +37,7 @@ f:
g: # @g
.Ltmp4:
.seh_proc g
-# BB#0:
+# %bb.0:
.Ltmp5:
.seh_endprologue
retq
Modified: llvm/trunk/test/MC/COFF/simple-fixups.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/simple-fixups.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/simple-fixups.s (original)
+++ llvm/trunk/test/MC/COFF/simple-fixups.s Mon Dec 4 09:18:51 2017
@@ -13,7 +13,7 @@
.globl _foo
.align 16, 0x90
_foo: # @foo
-# BB#0: # %e
+# %bb.0: # %e
.align 16, 0x90
LBB0_1: # %i
# =>This Inner Loop Header: Depth=1
@@ -26,7 +26,7 @@ LBB0_1:
.globl _bar
.align 16, 0x90
_bar: # @bar
-# BB#0: # %e
+# %bb.0: # %e
.align 16, 0x90
LBB1_1: # %i
# =>This Inner Loop Header: Depth=1
@@ -39,7 +39,7 @@ LBB1_1:
.globl _baz
.align 16, 0x90
_baz: # @baz
-# BB#0: # %e
+# %bb.0: # %e
subl $4, %esp
Ltmp0:
call _baz
Modified: llvm/trunk/test/MC/COFF/symbol-alias.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/symbol-alias.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/symbol-alias.s (original)
+++ llvm/trunk/test/MC/COFF/symbol-alias.s Mon Dec 4 09:18:51 2017
@@ -13,7 +13,7 @@
.globl _foo
.align 16, 0x90
_foo: # @foo
-# BB#0: # %entry
+# %bb.0: # %entry
ret
.data
Modified: llvm/trunk/test/MC/COFF/symbol-fragment-offset-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/symbol-fragment-offset-64.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/symbol-fragment-offset-64.s (original)
+++ llvm/trunk/test/MC/COFF/symbol-fragment-offset-64.s Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
.globl _main
.align 16, 0x90
_main: # @main
-# BB#0: # %entry
+# %bb.0: # %entry
subl $4, %esp
movl $.L_.str0, (%esp)
callq _printf
Modified: llvm/trunk/test/MC/COFF/symbol-fragment-offset.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/symbol-fragment-offset.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/symbol-fragment-offset.s (original)
+++ llvm/trunk/test/MC/COFF/symbol-fragment-offset.s Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
.globl _main
.align 16, 0x90
_main: # @main
-# BB#0: # %entry
+# %bb.0: # %entry
subl $4, %esp
movl $L_.str0, (%esp)
calll _printf
Modified: llvm/trunk/test/MC/COFF/weak.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/COFF/weak.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/COFF/weak.s (original)
+++ llvm/trunk/test/MC/COFF/weak.s Mon Dec 4 09:18:51 2017
@@ -12,12 +12,12 @@
.globl _main
.align 16, 0x90
_main: # @main
-# BB#0: # %entry
+# %bb.0: # %entry
subl $4, %esp
movl $_test_weak, %eax
testl %eax, %eax
je LBB0_2
-# BB#1: # %if.then
+# %bb.1: # %if.then
call _test_weak
movl $1, %eax
addl $4, %esp
Modified: llvm/trunk/test/MC/ELF/ARM/clang-section.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/ARM/clang-section.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/ARM/clang-section.s (original)
+++ llvm/trunk/test/MC/ELF/ARM/clang-section.s Mon Dec 4 09:18:51 2017
@@ -23,12 +23,12 @@
.code 32 @ @foo
foo:
.fnstart
-@ BB#0: @ %entry
+@ %bb.0: @ %entry
ldr r0, .LCPI0_0
ldr r0, [r0]
mov pc, lr
.p2align 2
-@ BB#1:
+@ %bb.1:
.LCPI0_0:
.long b
.Lfunc_end0:
@@ -43,7 +43,7 @@ foo:
.code 32 @ @goo
goo:
.fnstart
-@ BB#0: @ %entry
+@ %bb.0: @ %entry
.save {r11, lr}
push {r11, lr}
ldr r0, .LCPI1_0
@@ -52,7 +52,7 @@ goo:
pop {r11, lr}
mov pc, lr
.p2align 2
-@ BB#1:
+@ %bb.1:
.LCPI1_0:
.long _ZL1g
.LCPI1_1:
@@ -69,12 +69,12 @@ goo:
.code 32 @ @hoo
hoo:
.fnstart
-@ BB#0: @ %entry
+@ %bb.0: @ %entry
ldr r0, .LCPI2_0
ldr r0, [r0]
mov pc, lr
.p2align 2
-@ BB#1:
+@ %bb.1:
.LCPI2_0:
.long b
.Lfunc_end2:
Modified: llvm/trunk/test/MC/ELF/basic-elf-32.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/basic-elf-32.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/basic-elf-32.s (original)
+++ llvm/trunk/test/MC/ELF/basic-elf-32.s Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
.align 16, 0x90
.type main, at function
main: # @main
-# BB#0:
+# %bb.0:
subl $4, %esp
movl $.L.str1, (%esp)
calll puts
Modified: llvm/trunk/test/MC/ELF/basic-elf-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/basic-elf-64.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/basic-elf-64.s (original)
+++ llvm/trunk/test/MC/ELF/basic-elf-64.s Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
.align 16, 0x90
.type main, at function
main: # @main
-# BB#0:
+# %bb.0:
subq $8, %rsp
movl $.L.str1, %edi
callq puts
Modified: llvm/trunk/test/MC/ELF/call-abs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/call-abs.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/call-abs.s (original)
+++ llvm/trunk/test/MC/ELF/call-abs.s Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
.globl f
.type f, at function
f: # @f
-# BB#0: # %entry
+# %bb.0: # %entry
subl $4, %esp
calll 42
incl %eax
Modified: llvm/trunk/test/MC/ELF/fde.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/fde.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/fde.s (original)
+++ llvm/trunk/test/MC/ELF/fde.s Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@
__cxx_global_var_init: # @__cxx_global_var_init
.cfi_startproc
.Lfunc_begin0:
-# BB#0: # %entry
+# %bb.0: # %entry
pushq %rbp
.Ltmp2:
.cfi_def_cfa_offset 16
Modified: llvm/trunk/test/MC/MachO/debug_frame.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/MachO/debug_frame.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/MachO/debug_frame.s (original)
+++ llvm/trunk/test/MC/MachO/debug_frame.s Mon Dec 4 09:18:51 2017
@@ -16,7 +16,7 @@ _proc:
_f: ## @f
Ltmp0:
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
movl $42, %eax
ret
Ltmp1:
Modified: llvm/trunk/test/MC/Mips/do_switch1.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/do_switch1.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/do_switch1.s (original)
+++ llvm/trunk/test/MC/Mips/do_switch1.s Mon Dec 4 09:18:51 2017
@@ -22,7 +22,7 @@ main:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
addiu $sp, $sp, -8
addiu $1, $zero, 2
sw $1, 4($sp)
Modified: llvm/trunk/test/MC/Mips/do_switch2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/do_switch2.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/do_switch2.s (original)
+++ llvm/trunk/test/MC/Mips/do_switch2.s Mon Dec 4 09:18:51 2017
@@ -21,7 +21,7 @@ main:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -8
Modified: llvm/trunk/test/MC/Mips/do_switch3.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/do_switch3.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/do_switch3.s (original)
+++ llvm/trunk/test/MC/Mips/do_switch3.s Mon Dec 4 09:18:51 2017
@@ -21,7 +21,7 @@ main:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
daddiu $sp, $sp, -16
lui $1, %hi(%neg(%gp_rel(main)))
daddu $2, $1, $25
Modified: llvm/trunk/test/MC/Mips/elf-N64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/elf-N64.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/elf-N64.s (original)
+++ llvm/trunk/test/MC/Mips/elf-N64.s Mon Dec 4 09:18:51 2017
@@ -29,7 +29,7 @@ main:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
daddiu $sp, $sp, -16
sd $ra, 8($sp) # 8-byte Folded Spill
sd $gp, 0($sp) # 8-byte Folded Spill
Modified: llvm/trunk/test/MC/Mips/elf-gprel-32-64.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/elf-gprel-32-64.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/elf-gprel-32-64.s (original)
+++ llvm/trunk/test/MC/Mips/elf-gprel-32-64.s Mon Dec 4 09:18:51 2017
@@ -34,7 +34,7 @@ test:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
lui $1, %hi(%neg(%gp_rel(test)))
daddu $2, $1, $25
sltiu $1, $4, 4
Modified: llvm/trunk/test/MC/Mips/elf-relsym.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/elf-relsym.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/elf-relsym.s (original)
+++ llvm/trunk/test/MC/Mips/elf-relsym.s Mon Dec 4 09:18:51 2017
@@ -40,7 +40,7 @@ foo1:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addu $1, $2, $25
Modified: llvm/trunk/test/MC/Mips/elf-tls.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/elf-tls.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/elf-tls.s (original)
+++ llvm/trunk/test/MC/Mips/elf-tls.s Mon Dec 4 09:18:51 2017
@@ -27,7 +27,7 @@ f1:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -24
@@ -59,7 +59,7 @@ f2:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -24
@@ -91,7 +91,7 @@ f3:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -24
Modified: llvm/trunk/test/MC/Mips/mips_gprel16.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/mips_gprel16.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/mips_gprel16.s (original)
+++ llvm/trunk/test/MC/Mips/mips_gprel16.s Mon Dec 4 09:18:51 2017
@@ -26,7 +26,7 @@ testvar1:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
// CHECK: lw ${{[0-9]+}}, 0($gp)
lw $1, %gp_rel(var1)($gp)
jr $ra
@@ -50,7 +50,7 @@ testvar2:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
// CHECK: lw ${{[0-9]+}}, 4($gp)
lw $1, %gp_rel(var2)($gp)
jr $ra
Modified: llvm/trunk/test/MC/Mips/r-mips-got-disp.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/r-mips-got-disp.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/r-mips-got-disp.s (original)
+++ llvm/trunk/test/MC/Mips/r-mips-got-disp.s Mon Dec 4 09:18:51 2017
@@ -22,7 +22,7 @@ main:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
daddiu $sp, $sp, -16
sd $ra, 8($sp) # 8-byte Folded Spill
sd $gp, 0($sp) # 8-byte Folded Spill
Modified: llvm/trunk/test/MC/Mips/xgot.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/xgot.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/xgot.s (original)
+++ llvm/trunk/test/MC/Mips/xgot.s Mon Dec 4 09:18:51 2017
@@ -31,7 +31,7 @@ fill:
.set noreorder
.set nomacro
.set noat
-# BB#0: # %entry
+# %bb.0: # %entry
lui $2, %hi(_gp_disp)
addiu $2, $2, %lo(_gp_disp)
addiu $sp, $sp, -24
Modified: llvm/trunk/test/MC/PowerPC/tls-gd-obj.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/tls-gd-obj.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/tls-gd-obj.s (original)
+++ llvm/trunk/test/MC/PowerPC/tls-gd-obj.s Mon Dec 4 09:18:51 2017
@@ -18,7 +18,7 @@ main:
.quad 0
.text
.L.main:
-# BB#0: # %entry
+# %bb.0: # %entry
addis 3, 2, a at got@tlsgd at ha
addi 3, 3, a at got@tlsgd at l
li 4, 0
Modified: llvm/trunk/test/MC/PowerPC/tls-ie-obj.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/tls-ie-obj.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/tls-ie-obj.s (original)
+++ llvm/trunk/test/MC/PowerPC/tls-ie-obj.s Mon Dec 4 09:18:51 2017
@@ -17,7 +17,7 @@ main:
.quad 0
.text
.L.main:
-# BB#0: # %entry
+# %bb.0: # %entry
li 3, 0
addis 4, 2, a at got@tprel at ha
ld 4, a at got@tprel at l(4)
Modified: llvm/trunk/test/MC/PowerPC/tls-ld-obj.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/PowerPC/tls-ld-obj.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/PowerPC/tls-ld-obj.s (original)
+++ llvm/trunk/test/MC/PowerPC/tls-ld-obj.s Mon Dec 4 09:18:51 2017
@@ -17,7 +17,7 @@ main:
.quad 0
.text
.L.main:
-# BB#0: # %entry
+# %bb.0: # %entry
addis 3, 2, a at got@tlsld at ha
addi 3, 3, a at got@tlsld at l
li 4, 0
Modified: llvm/trunk/test/MC/X86/compact-unwind.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/compact-unwind.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/MC/X86/compact-unwind.s (original)
+++ llvm/trunk/test/MC/X86/compact-unwind.s Mon Dec 4 09:18:51 2017
@@ -13,7 +13,7 @@
.globl _test0
_test0: ## @test0
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
pushq %rbp
Ltmp0:
.cfi_def_cfa_offset 16
@@ -43,7 +43,7 @@ Ltmp4:
.globl _test1
_test1: ## @test1
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
pushq %rbp
Ltmp10:
.cfi_def_cfa_offset 16
Modified: llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-fullinfo.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-fullinfo.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-fullinfo.s (original)
+++ llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-fullinfo.s Mon Dec 4 09:18:51 2017
@@ -22,7 +22,7 @@ _Z1av:
.file 1 "tiny.cc"
.loc 1 1 0 # tiny.cc:1:0
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -45,7 +45,7 @@ _Z1bv:
.Lfunc_begin1:
.loc 1 2 0 # tiny.cc:2:0
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -68,7 +68,7 @@ main:
.Lfunc_begin2:
.loc 1 4 0 # tiny.cc:4:0
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -84,7 +84,7 @@ main:
.Ltmp5:
.loc 1 6 7 is_stmt 0 # tiny.cc:6:7
jne .LBB2_2
-# BB#1:
+# %bb.1:
.loc 1 0 7 # tiny.cc:0:7
movabsq $_Z1av, %rax
.Ltmp6:
Modified: llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-lineinfo.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-lineinfo.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-lineinfo.s (original)
+++ llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-lineinfo.s Mon Dec 4 09:18:51 2017
@@ -22,7 +22,7 @@ _Z1av:
.file 1 "tiny.cc"
.loc 1 1 0 # tiny.cc:1:0
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -44,7 +44,7 @@ _Z1bv:
.Lfunc_begin1:
.loc 1 2 0 # tiny.cc:2:0
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -66,7 +66,7 @@ main:
.Lfunc_begin2:
.loc 1 4 0 # tiny.cc:4:0
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -81,7 +81,7 @@ main:
cmpl $1, -8(%rbp)
.loc 1 6 7 is_stmt 0 # tiny.cc:6:7
jne .LBB2_2
-# BB#1:
+# %bb.1:
.loc 1 0 7 # tiny.cc:0:7
movabsq $_Z1av, %rax
.loc 1 7 9 is_stmt 1 # tiny.cc:7:9
Modified: llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-nolineinfo.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-nolineinfo.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-nolineinfo.s (original)
+++ llvm/trunk/test/tools/llvm-cfi-verify/X86/Inputs/unprotected-nolineinfo.s Mon Dec 4 09:18:51 2017
@@ -19,7 +19,7 @@
.type _Z1av, at function
_Z1av: # @_Z1av
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -36,7 +36,7 @@ _Z1av:
.type _Z1bv, at function
_Z1bv: # @_Z1bv
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -53,7 +53,7 @@ _Z1bv:
.type main, at function
main: # @main
.cfi_startproc
-# BB#0:
+# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
@@ -65,7 +65,7 @@ main:
movq %rsi, -16(%rbp)
cmpl $1, -8(%rbp)
jne .LBB2_2
-# BB#1:
+# %bb.1:
movabsq $_Z1av, %rax
movq %rax, -24(%rbp)
jmp .LBB2_3
Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/brief.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/brief.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/brief.s (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/brief.s Mon Dec 4 09:18:51 2017
@@ -38,7 +38,7 @@ Lfunc_begin0:
.file 1 "brief.c"
.loc 1 1 0 ## brief.c:1:0
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/debugloc.s Mon Dec 4 09:18:51 2017
@@ -28,7 +28,7 @@ foo:
.file 1 "test.c"
.loc 1 1 0 # test.c:1:0
.cfi_startproc
-# BB#0:
+# %bb.0:
#DEBUG_VALUE: foo:i <- %RDI
.loc 1 2 3 prologue_end # test.c:2:3
movq %rdi, %rax
@@ -47,7 +47,7 @@ bar:
.Lfunc_begin1:
.loc 1 5 0 # test.c:5:0
.cfi_startproc
-# BB#0:
+# %bb.0:
#DEBUG_VALUE: bar:i <- %RDI
.loc 1 6 3 prologue_end # test.c:6:3
movq %rdi, %rax
Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/lookup.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/lookup.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/lookup.s (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/lookup.s Mon Dec 4 09:18:51 2017
@@ -45,7 +45,7 @@ Lfunc_begin0:
.file 1 "foo.c"
.loc 1 1 0 ## foo.c:1:0
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
pushq %rbp
Lcfi0:
.cfi_def_cfa_offset 16
Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_debug_info.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_debug_info.s (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_debug_info.s Mon Dec 4 09:18:51 2017
@@ -26,7 +26,7 @@ Lfunc_begin0:
.file 1 "basic.c"
.loc 1 1 0 ## basic.c:1:0
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
Modified: llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s (original)
+++ llvm/trunk/test/tools/llvm-dwarfdump/X86/verify_die_ranges.s Mon Dec 4 09:18:51 2017
@@ -14,7 +14,7 @@ Lfunc_begin0:
.file 1 "basic.c"
.loc 1 1 0 ## basic.c:1:0
.cfi_startproc
-## BB#0: ## %entry
+## %bb.0: ## %entry
pushq %rbp
.cfi_def_cfa_offset 16
.cfi_offset %rbp, -16
More information about the llvm-commits
mailing list