[llvm] r319665 - [CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 4 09:18:56 PST 2017
Modified: llvm/trunk/test/CodeGen/X86/mmx-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mmx-schedule.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mmx-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mmx-schedule.ll Mon Dec 4 09:18:51 2017
@@ -13,7 +13,7 @@
define i64 @test_cvtpd2pi(<2 x double> %a0, <2 x double>* %a1) optsize {
; GENERIC-LABEL: test_cvtpd2pi:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: cvtpd2pi (%rdi), %mm0 # sched: [10:1.00]
; GENERIC-NEXT: cvtpd2pi %xmm0, %mm1 # sched: [4:1.00]
; GENERIC-NEXT: por %mm1, %mm0 # sched: [1:1.00]
@@ -21,7 +21,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_cvtpd2pi:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: cvtpd2pi (%rdi), %mm0 # sched: [8:4.00]
; ATOM-NEXT: cvtpd2pi %xmm0, %mm1 # sched: [7:3.50]
; ATOM-NEXT: por %mm1, %mm0 # sched: [1:0.50]
@@ -29,7 +29,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_cvtpd2pi:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [7:1.00]
; SLM-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [4:0.50]
; SLM-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -37,7 +37,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_cvtpd2pi:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: cvtpd2pi (%rdi), %mm0 # sched: [10:1.00]
; SANDY-NEXT: cvtpd2pi %xmm0, %mm1 # sched: [4:1.00]
; SANDY-NEXT: por %mm1, %mm0 # sched: [1:1.00]
@@ -45,7 +45,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cvtpd2pi:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: cvtpd2pi (%rdi), %mm0 # sched: [4:1.00]
; HASWELL-NEXT: cvtpd2pi %xmm0, %mm1 # sched: [4:1.00]
; HASWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
@@ -53,7 +53,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cvtpd2pi:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: cvtpd2pi (%rdi), %mm0 # sched: [9:1.00]
; BROADWELL-NEXT: cvtpd2pi %xmm0, %mm1 # sched: [4:1.00]
; BROADWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
@@ -61,7 +61,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvtpd2pi:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -69,7 +69,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvtpd2pi:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -77,7 +77,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvtpd2pi:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [8:1.00]
; BTVER2-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [3:1.00]
; BTVER2-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -85,7 +85,7 @@ define i64 @test_cvtpd2pi(<2 x double> %
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cvtpd2pi:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: cvtpd2pi (%rdi), %mm1 # sched: [12:1.00]
; ZNVER1-NEXT: cvtpd2pi %xmm0, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: por %mm0, %mm1 # sched: [1:0.25]
@@ -102,70 +102,70 @@ declare x86_mmx @llvm.x86.sse.cvtpd2pi(<
define <2 x double> @test_cvtpi2pd(x86_mmx %a0, x86_mmx* %a1) optsize {
; GENERIC-LABEL: test_cvtpi2pd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: cvtpi2pd %mm0, %xmm1 # sched: [4:1.00]
; GENERIC-NEXT: cvtpi2pd (%rdi), %xmm0 # sched: [10:1.00]
; GENERIC-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_cvtpi2pd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: cvtpi2pd (%rdi), %xmm0 # sched: [8:4.00]
; ATOM-NEXT: cvtpi2pd %mm0, %xmm1 # sched: [7:3.50]
; ATOM-NEXT: addpd %xmm1, %xmm0 # sched: [6:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_cvtpi2pd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: cvtpi2pd (%rdi), %xmm0 # sched: [7:1.00]
; SLM-NEXT: cvtpi2pd %mm0, %xmm1 # sched: [4:0.50]
; SLM-NEXT: addpd %xmm1, %xmm0 # sched: [3:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_cvtpi2pd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [4:1.00]
; SANDY-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [10:1.00]
; SANDY-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cvtpi2pd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [4:1.00]
; HASWELL-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [4:1.00]
; HASWELL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cvtpi2pd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [4:1.00]
; BROADWELL-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [9:1.00]
; BROADWELL-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvtpi2pd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [10:1.00]
; SKYLAKE-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvtpi2pd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [5:1.00]
; SKX-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [10:1.00]
; SKX-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvtpi2pd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [8:1.00]
; BTVER2-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [3:1.00]
; BTVER2-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cvtpi2pd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: cvtpi2pd (%rdi), %xmm1 # sched: [12:1.00]
; ZNVER1-NEXT: cvtpi2pd %mm0, %xmm0 # sched: [3:1.00]
; ZNVER1-NEXT: vaddpd %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
@@ -180,70 +180,70 @@ declare <2 x double> @llvm.x86.sse.cvtpi
define <4 x float> @test_cvtpi2ps(x86_mmx %a0, x86_mmx* %a1, <4 x float> %a2, <4 x float> %a3) optsize {
; GENERIC-LABEL: test_cvtpi2ps:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [3:1.00]
; GENERIC-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [9:1.00]
; GENERIC-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_cvtpi2ps:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: cvtpi2ps (%rdi), %xmm1
; ATOM-NEXT: cvtpi2ps %mm0, %xmm0
; ATOM-NEXT: addps %xmm1, %xmm0 # sched: [5:5.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_cvtpi2ps:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [7:1.00]
; SLM-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [4:0.50]
; SLM-NEXT: addps %xmm1, %xmm0 # sched: [3:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_cvtpi2ps:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [3:1.00]
; SANDY-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [9:1.00]
; SANDY-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cvtpi2ps:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [3:1.00]
; HASWELL-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [3:1.00]
; HASWELL-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cvtpi2ps:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [3:1.00]
; BROADWELL-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [8:1.00]
; BROADWELL-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvtpi2ps:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [6:2.00]
; SKYLAKE-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [9:1.00]
; SKYLAKE-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvtpi2ps:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [6:2.00]
; SKX-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [9:1.00]
; SKX-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [4:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvtpi2ps:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [8:1.00]
; BTVER2-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [3:1.00]
; BTVER2-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cvtpi2ps:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: cvtpi2ps (%rdi), %xmm1 # sched: [12:1.00]
; ZNVER1-NEXT: cvtpi2ps %mm0, %xmm0 # sched: [5:1.00]
; ZNVER1-NEXT: vaddps %xmm1, %xmm0, %xmm0 # sched: [3:1.00]
@@ -258,7 +258,7 @@ declare <4 x float> @llvm.x86.sse.cvtpi2
define i64 @test_cvtps2pi(<4 x float> %a0, <4 x float>* %a1) optsize {
; GENERIC-LABEL: test_cvtps2pi:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: cvtps2pi %xmm0, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: cvtps2pi (%rdi), %mm1 # sched: [9:1.00]
; GENERIC-NEXT: por %mm0, %mm1 # sched: [1:1.00]
@@ -266,7 +266,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_cvtps2pi:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: cvtps2pi %xmm0, %mm0 # sched: [5:5.00]
; ATOM-NEXT: cvtps2pi (%rdi), %mm1 # sched: [5:5.00]
; ATOM-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -274,7 +274,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_cvtps2pi:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: cvtps2pi (%rdi), %mm1 # sched: [7:1.00]
; SLM-NEXT: cvtps2pi %xmm0, %mm0 # sched: [4:0.50]
; SLM-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -282,7 +282,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_cvtps2pi:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: cvtps2pi %xmm0, %mm0 # sched: [3:1.00]
; SANDY-NEXT: cvtps2pi (%rdi), %mm1 # sched: [9:1.00]
; SANDY-NEXT: por %mm0, %mm1 # sched: [1:1.00]
@@ -290,7 +290,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cvtps2pi:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: cvtps2pi %xmm0, %mm0 # sched: [4:1.00]
; HASWELL-NEXT: cvtps2pi (%rdi), %mm1 # sched: [3:1.00]
; HASWELL-NEXT: por %mm0, %mm1 # sched: [1:0.33]
@@ -298,7 +298,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cvtps2pi:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: cvtps2pi %xmm0, %mm0 # sched: [4:1.00]
; BROADWELL-NEXT: cvtps2pi (%rdi), %mm1 # sched: [8:1.00]
; BROADWELL-NEXT: por %mm0, %mm1 # sched: [1:0.33]
@@ -306,7 +306,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvtps2pi:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: cvtps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvtps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -314,7 +314,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvtps2pi:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: cvtps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvtps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -322,7 +322,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvtps2pi:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: cvtps2pi (%rdi), %mm1 # sched: [8:1.00]
; BTVER2-NEXT: cvtps2pi %xmm0, %mm0 # sched: [3:1.00]
; BTVER2-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -330,7 +330,7 @@ define i64 @test_cvtps2pi(<4 x float> %a
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cvtps2pi:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: cvtps2pi (%rdi), %mm1 # sched: [12:1.00]
; ZNVER1-NEXT: cvtps2pi %xmm0, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: por %mm0, %mm1 # sched: [1:0.25]
@@ -347,7 +347,7 @@ declare x86_mmx @llvm.x86.sse.cvtps2pi(<
define i64 @test_cvttpd2pi(<2 x double> %a0, <2 x double>* %a1) optsize {
; GENERIC-LABEL: test_cvttpd2pi:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: cvttpd2pi (%rdi), %mm0 # sched: [10:1.00]
; GENERIC-NEXT: cvttpd2pi %xmm0, %mm1 # sched: [4:1.00]
; GENERIC-NEXT: por %mm1, %mm0 # sched: [1:1.00]
@@ -355,7 +355,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_cvttpd2pi:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: cvttpd2pi (%rdi), %mm0 # sched: [8:4.00]
; ATOM-NEXT: cvttpd2pi %xmm0, %mm1 # sched: [7:3.50]
; ATOM-NEXT: por %mm1, %mm0 # sched: [1:0.50]
@@ -363,7 +363,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_cvttpd2pi:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [7:1.00]
; SLM-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [4:0.50]
; SLM-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -371,7 +371,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_cvttpd2pi:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: cvttpd2pi (%rdi), %mm0 # sched: [10:1.00]
; SANDY-NEXT: cvttpd2pi %xmm0, %mm1 # sched: [4:1.00]
; SANDY-NEXT: por %mm1, %mm0 # sched: [1:1.00]
@@ -379,7 +379,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cvttpd2pi:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: cvttpd2pi (%rdi), %mm0 # sched: [4:1.00]
; HASWELL-NEXT: cvttpd2pi %xmm0, %mm1 # sched: [4:1.00]
; HASWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
@@ -387,7 +387,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cvttpd2pi:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: cvttpd2pi (%rdi), %mm0 # sched: [9:1.00]
; BROADWELL-NEXT: cvttpd2pi %xmm0, %mm1 # sched: [4:1.00]
; BROADWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
@@ -395,7 +395,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvttpd2pi:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -403,7 +403,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvttpd2pi:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [11:1.00]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -411,7 +411,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvttpd2pi:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [8:1.00]
; BTVER2-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [3:1.00]
; BTVER2-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -419,7 +419,7 @@ define i64 @test_cvttpd2pi(<2 x double>
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cvttpd2pi:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: cvttpd2pi (%rdi), %mm1 # sched: [12:1.00]
; ZNVER1-NEXT: cvttpd2pi %xmm0, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: por %mm0, %mm1 # sched: [1:0.25]
@@ -436,7 +436,7 @@ declare x86_mmx @llvm.x86.sse.cvttpd2pi(
define i64 @test_cvttps2pi(<4 x float> %a0, <4 x float>* %a1) optsize {
; GENERIC-LABEL: test_cvttps2pi:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: cvttps2pi %xmm0, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: cvttps2pi (%rdi), %mm1 # sched: [9:1.00]
; GENERIC-NEXT: por %mm0, %mm1 # sched: [1:1.00]
@@ -444,7 +444,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_cvttps2pi:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: cvttps2pi %xmm0, %mm0 # sched: [5:5.00]
; ATOM-NEXT: cvttps2pi (%rdi), %mm1 # sched: [5:5.00]
; ATOM-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -452,7 +452,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_cvttps2pi:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: cvttps2pi (%rdi), %mm1 # sched: [7:1.00]
; SLM-NEXT: cvttps2pi %xmm0, %mm0 # sched: [4:0.50]
; SLM-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -460,7 +460,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_cvttps2pi:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: cvttps2pi %xmm0, %mm0 # sched: [3:1.00]
; SANDY-NEXT: cvttps2pi (%rdi), %mm1 # sched: [9:1.00]
; SANDY-NEXT: por %mm0, %mm1 # sched: [1:1.00]
@@ -468,7 +468,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cvttps2pi:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: cvttps2pi %xmm0, %mm0 # sched: [4:1.00]
; HASWELL-NEXT: cvttps2pi (%rdi), %mm1 # sched: [3:1.00]
; HASWELL-NEXT: por %mm0, %mm1 # sched: [1:0.33]
@@ -476,7 +476,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cvttps2pi:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: cvttps2pi %xmm0, %mm0 # sched: [4:1.00]
; BROADWELL-NEXT: cvttps2pi (%rdi), %mm1 # sched: [8:1.00]
; BROADWELL-NEXT: por %mm0, %mm1 # sched: [1:0.33]
@@ -484,7 +484,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cvttps2pi:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: cvttps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKYLAKE-NEXT: cvttps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKYLAKE-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -492,7 +492,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_cvttps2pi:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: cvttps2pi %xmm0, %mm0 # sched: [5:1.00]
; SKX-NEXT: cvttps2pi (%rdi), %mm1 # sched: [9:0.50]
; SKX-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -500,7 +500,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cvttps2pi:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: cvttps2pi (%rdi), %mm1 # sched: [8:1.00]
; BTVER2-NEXT: cvttps2pi %xmm0, %mm0 # sched: [3:1.00]
; BTVER2-NEXT: por %mm0, %mm1 # sched: [1:0.50]
@@ -508,7 +508,7 @@ define i64 @test_cvttps2pi(<4 x float> %
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cvttps2pi:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: cvttps2pi (%rdi), %mm1 # sched: [12:1.00]
; ZNVER1-NEXT: cvttps2pi %xmm0, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: por %mm0, %mm1 # sched: [1:0.25]
@@ -525,52 +525,52 @@ declare x86_mmx @llvm.x86.sse.cvttps2pi(
define void @test_emms() optsize {
; GENERIC-LABEL: test_emms:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: emms
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_emms:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: emms # sched: [5:2.50]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_emms:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: emms
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_emms:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: emms
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_emms:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: emms # sched: [31:10.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_emms:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: emms # sched: [31:10.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_emms:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: emms # sched: [10:4.50]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_emms:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: emms # sched: [10:4.50]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_emms:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: emms
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_emms:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: emms
; ZNVER1-NEXT: retq # sched: [1:0.50]
call void @llvm.x86.mmx.emms()
@@ -580,52 +580,52 @@ declare void @llvm.x86.mmx.emms()
define void @test_maskmovq(x86_mmx %a0, x86_mmx %a1, i8* %a2) optsize {
; GENERIC-LABEL: test_maskmovq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_maskmovq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_maskmovq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_maskmovq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_maskmovq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_maskmovq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_maskmovq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_maskmovq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: maskmovq %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_maskmovq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: maskmovq %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_maskmovq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: maskmovq %mm1, %mm0 # sched: [100:?]
; ZNVER1-NEXT: retq # sched: [1:0.50]
call void @llvm.x86.mmx.maskmovq(x86_mmx %a0, x86_mmx %a1, i8* %a2)
@@ -635,7 +635,7 @@ declare void @llvm.x86.mmx.maskmovq(x86_
define i32 @test_movd(x86_mmx %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_movd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movd %edi, %xmm0 # sched: [1:1.00]
; GENERIC-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp) # sched: [5:1.00]
; GENERIC-NEXT: movq -{{[0-9]+}}(%rsp), %mm1 # sched: [4:0.50]
@@ -649,7 +649,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movd %edi, %xmm0 # sched: [1:1.00]
; ATOM-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; ATOM-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [1:1.00]
@@ -663,7 +663,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movd %edi, %xmm0 # sched: [1:0.50]
; SLM-NEXT: movq %xmm0, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; SLM-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [3:1.00]
@@ -677,7 +677,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_movd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vmovd %edi, %xmm0 # sched: [1:1.00]
; SANDY-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) # sched: [5:1.00]
; SANDY-NEXT: movq -{{[0-9]+}}(%rsp), %mm1 # sched: [4:0.50]
@@ -691,7 +691,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_movd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vmovd %edi, %xmm0 # sched: [1:1.00]
; HASWELL-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; HASWELL-NEXT: movq -{{[0-9]+}}(%rsp), %mm1 # sched: [1:0.50]
@@ -705,7 +705,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: vmovd %edi, %xmm0 # sched: [1:1.00]
; BROADWELL-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; BROADWELL-NEXT: movq -{{[0-9]+}}(%rsp), %mm1 # sched: [5:0.50]
@@ -719,7 +719,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: vmovd %edi, %xmm0 # sched: [1:1.00]
; SKYLAKE-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; SKYLAKE-NEXT: movq -{{[0-9]+}}(%rsp), %mm1 # sched: [5:0.50]
@@ -733,7 +733,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_movd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vmovd %edi, %xmm0 # sched: [1:1.00]
; SKX-NEXT: vpmovqd %xmm0, -{{[0-9]+}}(%rsp) # sched: [4:1.00]
; SKX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [5:0.50]
@@ -747,7 +747,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovd %edi, %xmm0 # sched: [1:0.17]
; BTVER2-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) # sched: [1:1.00]
; BTVER2-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [5:1.00]
@@ -761,7 +761,7 @@ define i32 @test_movd(x86_mmx %a0, i32 %
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: vmovd %edi, %xmm0 # sched: [3:1.00]
; ZNVER1-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) # sched: [1:0.50]
; ZNVER1-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero sched: [8:0.50]
@@ -790,70 +790,70 @@ define i32 @test_movd(x86_mmx %a0, i32 %
define i64 @test_movdq2q(<2 x i64> %a0) optsize {
; GENERIC-LABEL: test_movdq2q:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movdq2q %xmm0, %mm0 # sched: [2:1.00]
; GENERIC-NEXT: paddd %mm0, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movdq2q:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movdq2q %xmm0, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movdq2q:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movdq2q %xmm0, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_movdq2q:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movdq2q %xmm0, %mm0 # sched: [2:1.00]
; SANDY-NEXT: paddd %mm0, %mm0 # sched: [3:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_movdq2q:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movdq2q %xmm0, %mm0 # sched: [2:0.67]
; HASWELL-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movdq2q:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movdq2q %xmm0, %mm0 # sched: [2:0.67]
; BROADWELL-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movdq2q:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movdq2q %xmm0, %mm0 # sched: [2:1.00]
; SKYLAKE-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_movdq2q:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movdq2q %xmm0, %mm0 # sched: [2:1.00]
; SKX-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movdq2q:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movdq2q %xmm0, %mm0 # sched: [1:0.17]
; BTVER2-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movdq2q:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movdq2q %xmm0, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddd %mm0, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -867,52 +867,52 @@ define i64 @test_movdq2q(<2 x i64> %a0)
define void @test_movntq(x86_mmx* %a0, x86_mmx %a1) optsize {
; GENERIC-LABEL: test_movntq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movntq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movntq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_movntq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_movntq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movntq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movntq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_movntq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movntq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movntq %mm0, (%rdi) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movntq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movntq %mm0, (%rdi) # sched: [1:0.50]
; ZNVER1-NEXT: retq # sched: [1:0.50]
call void @llvm.x86.mmx.movnt.dq(x86_mmx* %a0, x86_mmx %a1)
@@ -922,14 +922,14 @@ declare void @llvm.x86.mmx.movnt.dq(x86_
define void @test_movq(i64 *%a0) {
; GENERIC-LABEL: test_movq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movq (%rdi), %mm0 # sched: [4:0.50]
; GENERIC-NEXT: paddd %mm0, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movq (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; ATOM-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
@@ -938,56 +938,56 @@ define void @test_movq(i64 *%a0) {
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movq (%rdi), %mm0 # sched: [3:1.00]
; SLM-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; SLM-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_movq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movq (%rdi), %mm0 # sched: [4:0.50]
; SANDY-NEXT: paddd %mm0, %mm0 # sched: [3:1.00]
; SANDY-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_movq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movq (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movq (%rdi), %mm0 # sched: [5:0.50]
; BROADWELL-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movq (%rdi), %mm0 # sched: [5:0.50]
; SKYLAKE-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_movq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movq (%rdi), %mm0 # sched: [5:0.50]
; SKX-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; SKX-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movq (%rdi), %mm0 # sched: [5:1.00]
; BTVER2-NEXT: paddd %mm0, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: movq %mm0, (%rdi) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movq (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: paddd %mm0, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: movq %mm0, (%rdi) # sched: [1:0.50]
@@ -1002,52 +1002,52 @@ define void @test_movq(i64 *%a0) {
define <2 x i64> @test_movq2dq(x86_mmx %a0) optsize {
; GENERIC-LABEL: test_movq2dq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movq2dq %mm0, %xmm0 # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movq2dq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movq2dq %mm0, %xmm0
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movq2dq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movq2dq %mm0, %xmm0 # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_movq2dq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: movq2dq %mm0, %xmm0 # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_movq2dq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movq2dq %mm0, %xmm0 # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movq2dq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movq2dq %mm0, %xmm0 # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movq2dq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movq2dq %mm0, %xmm0 # sched: [2:2.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_movq2dq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: movq2dq %mm0, %xmm0 # sched: [2:2.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movq2dq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movq2dq %mm0, %xmm0 # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movq2dq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movq2dq %mm0, %xmm0 # sched: [1:0.25]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = bitcast x86_mmx %a0 to i64
@@ -1057,70 +1057,70 @@ define <2 x i64> @test_movq2dq(x86_mmx %
define i64 @test_pabsb(x86_mmx *%a0) optsize {
; GENERIC-LABEL: test_pabsb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pabsb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pabsb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pabsb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pabsb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pabsb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pabsb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pabsb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pabsb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pabsb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pabsb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pabsb (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pabsb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pabsb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: pabsb %mm0, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pabsb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pabsb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: pabsb %mm0, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1135,70 +1135,70 @@ declare x86_mmx @llvm.x86.ssse3.pabs.b(x
define i64 @test_pabsd(x86_mmx *%a0) optsize {
; GENERIC-LABEL: test_pabsd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pabsd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pabsd (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pabsd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pabsd (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pabsd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pabsd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pabsd (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pabsd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pabsd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pabsd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pabsd (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pabsd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pabsd (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: pabsd %mm0, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pabsd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pabsd (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: pabsd %mm0, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1213,70 +1213,70 @@ declare x86_mmx @llvm.x86.ssse3.pabs.d(x
define i64 @test_pabsw(x86_mmx *%a0) optsize {
; GENERIC-LABEL: test_pabsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pabsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pabsw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pabsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pabsw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pabsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pabsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pabsw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pabsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pabsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pabsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pabsw (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pabsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pabsw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: pabsw %mm0, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pabsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pabsw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: pabsw %mm0, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1291,70 +1291,70 @@ declare x86_mmx @llvm.x86.ssse3.pabs.w(x
define i64 @test_packssdw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_packssdw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: packssdw %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: packssdw (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_packssdw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: packssdw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: packssdw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_packssdw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: packssdw %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: packssdw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_packssdw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: packssdw %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: packssdw (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_packssdw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: packssdw %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: packssdw (%rdi), %mm0 # sched: [2:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_packssdw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: packssdw %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: packssdw (%rdi), %mm0 # sched: [7:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_packssdw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: packssdw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: packssdw (%rdi), %mm0 # sched: [7:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_packssdw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: packssdw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: packssdw (%rdi), %mm0 # sched: [7:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_packssdw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: packssdw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: packssdw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_packssdw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: packssdw %mm1, %mm0 # sched: [1:0.50]
; ZNVER1-NEXT: packssdw (%rdi), %mm0 # sched: [1:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1369,70 +1369,70 @@ declare x86_mmx @llvm.x86.mmx.packssdw(x
define i64 @test_packsswb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_packsswb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: packsswb %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: packsswb (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_packsswb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: packsswb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: packsswb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_packsswb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: packsswb %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: packsswb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_packsswb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: packsswb %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: packsswb (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_packsswb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: packsswb %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: packsswb (%rdi), %mm0 # sched: [2:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_packsswb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: packsswb %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: packsswb (%rdi), %mm0 # sched: [7:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_packsswb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: packsswb %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: packsswb (%rdi), %mm0 # sched: [7:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_packsswb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: packsswb %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: packsswb (%rdi), %mm0 # sched: [7:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_packsswb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: packsswb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: packsswb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_packsswb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: packsswb %mm1, %mm0 # sched: [1:0.50]
; ZNVER1-NEXT: packsswb (%rdi), %mm0 # sched: [1:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1447,70 +1447,70 @@ declare x86_mmx @llvm.x86.mmx.packsswb(x
define i64 @test_packuswb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_packuswb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: packuswb %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: packuswb (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_packuswb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: packuswb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: packuswb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_packuswb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: packuswb %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: packuswb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_packuswb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: packuswb %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: packuswb (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_packuswb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: packuswb %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: packuswb (%rdi), %mm0 # sched: [2:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_packuswb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: packuswb %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: packuswb (%rdi), %mm0 # sched: [7:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_packuswb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: packuswb %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: packuswb (%rdi), %mm0 # sched: [7:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_packuswb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: packuswb %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: packuswb (%rdi), %mm0 # sched: [7:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_packuswb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: packuswb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: packuswb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_packuswb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: packuswb %mm1, %mm0 # sched: [1:0.50]
; ZNVER1-NEXT: packuswb (%rdi), %mm0 # sched: [1:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1525,70 +1525,70 @@ declare x86_mmx @llvm.x86.mmx.packuswb(x
define i64 @test_paddb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: paddb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: paddb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddb (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddb (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1603,70 +1603,70 @@ declare x86_mmx @llvm.x86.mmx.padd.b(x86
define i64 @test_paddd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddd %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: paddd (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddd (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddd (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddd %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: paddd (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddd (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddd (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddd (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddd (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddd %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddd (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddd %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddd (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1681,70 +1681,70 @@ declare x86_mmx @llvm.x86.mmx.padd.d(x86
define i64 @test_paddq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: paddq (%rdi), %mm0 # sched: [7:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddq %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: paddq (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddq (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; SANDY-NEXT: paddq (%rdi), %mm0 # sched: [7:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddq (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddq (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddq (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddq (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddq %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddq (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddq %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddq (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1759,70 +1759,70 @@ declare x86_mmx @llvm.x86.mmx.padd.q(x86
define i64 @test_paddsb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddsb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddsb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: paddsb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddsb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddsb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddsb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddsb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddsb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddsb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddsb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddsb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: paddsb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddsb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddsb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddsb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddsb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddsb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddsb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddsb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddsb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddsb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddsb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddsb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddsb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddsb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddsb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddsb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddsb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddsb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddsb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1837,70 +1837,70 @@ declare x86_mmx @llvm.x86.mmx.padds.b(x8
define i64 @test_paddsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddsw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: paddsw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddsw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddsw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddsw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddsw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddsw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: paddsw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddsw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddsw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddsw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddsw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddsw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddsw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddsw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddsw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddsw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddsw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1915,70 +1915,70 @@ declare x86_mmx @llvm.x86.mmx.padds.w(x8
define i64 @test_paddusb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddusb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddusb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: paddusb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddusb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddusb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddusb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddusb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddusb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddusb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddusb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddusb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: paddusb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddusb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddusb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddusb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddusb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddusb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddusb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddusb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddusb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddusb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddusb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddusb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddusb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddusb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddusb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddusb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddusb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddusb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddusb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -1993,70 +1993,70 @@ declare x86_mmx @llvm.x86.mmx.paddus.b(x
define i64 @test_paddusw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddusw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddusw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: paddusw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddusw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddusw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddusw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddusw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddusw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddusw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddusw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddusw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: paddusw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddusw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddusw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddusw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddusw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddusw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddusw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddusw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddusw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: paddusw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddusw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddusw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: paddusw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddusw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddusw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddusw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddusw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddusw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddusw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2071,70 +2071,70 @@ declare x86_mmx @llvm.x86.mmx.paddus.w(x
define i64 @test_paddw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_paddw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: paddw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: paddw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_paddw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: paddw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_paddw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: paddw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_paddw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: paddw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: paddw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_paddw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: paddw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_paddw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: paddw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_paddw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: paddw (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_paddw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: paddw (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_paddw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: paddw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: paddw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_paddw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: paddw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: paddw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2149,70 +2149,70 @@ declare x86_mmx @llvm.x86.mmx.padd.w(x86
define i64 @test_palignr(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_palignr:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: palignr $1, %mm1, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_palignr:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: palignr $1, %mm1, %mm0
; ATOM-NEXT: palignr $1, (%rdi), %mm0
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_palignr:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: palignr $1, %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: palignr $1, (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_palignr:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: palignr $1, %mm1, %mm0 # sched: [1:0.50]
; SANDY-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_palignr:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: palignr $1, %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: palignr $1, (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_palignr:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: palignr $1, %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_palignr:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: palignr $1, %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_palignr:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: palignr $1, %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_palignr:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: palignr $1, %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: palignr $1, (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_palignr:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: palignr $1, %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: palignr $1, (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2227,70 +2227,70 @@ declare x86_mmx @llvm.x86.mmx.palignr.b(
define i64 @test_pand(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pand:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pand %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: pand (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pand:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pand %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pand (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pand:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pand %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pand (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pand:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pand %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: pand (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pand:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pand %mm1, %mm0 # sched: [1:0.33]
; HASWELL-NEXT: pand (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pand:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pand %mm1, %mm0 # sched: [1:0.33]
; BROADWELL-NEXT: pand (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pand:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pand %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: pand (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pand:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pand %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: pand (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pand:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pand %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pand (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pand:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pand %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pand (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2305,70 +2305,70 @@ declare x86_mmx @llvm.x86.mmx.pand(x86_m
define i64 @test_pandn(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pandn:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pandn %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: pandn (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pandn:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pandn %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pandn (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pandn:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pandn %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pandn (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pandn:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pandn %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: pandn (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pandn:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pandn %mm1, %mm0 # sched: [1:0.33]
; HASWELL-NEXT: pandn (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pandn:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pandn %mm1, %mm0 # sched: [1:0.33]
; BROADWELL-NEXT: pandn (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pandn:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pandn %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: pandn (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pandn:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pandn %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: pandn (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pandn:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pandn %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pandn (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pandn:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pandn %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pandn (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2383,70 +2383,70 @@ declare x86_mmx @llvm.x86.mmx.pandn(x86_
define i64 @test_pavgb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pavgb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pavgb %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pavgb (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pavgb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pavgb %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pavgb (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pavgb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pavgb %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pavgb (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pavgb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pavgb %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pavgb (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pavgb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pavgb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pavgb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pavgb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pavgb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pavgb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pavgb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pavgb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pavgb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pavgb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pavgb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pavgb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pavgb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pavgb %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pavgb (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pavgb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pavgb %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pavgb (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2461,70 +2461,70 @@ declare x86_mmx @llvm.x86.mmx.pavg.b(x86
define i64 @test_pavgw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pavgw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pavgw %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pavgw (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pavgw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pavgw %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pavgw (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pavgw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pavgw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pavgw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pavgw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pavgw %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pavgw (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pavgw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pavgw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pavgw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pavgw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pavgw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pavgw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pavgw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pavgw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pavgw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pavgw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pavgw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pavgw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pavgw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pavgw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pavgw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pavgw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pavgw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pavgw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2539,70 +2539,70 @@ declare x86_mmx @llvm.x86.mmx.pavg.w(x86
define i64 @test_pcmpeqb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pcmpeqb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pcmpeqb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pcmpeqb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pcmpeqb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pcmpeqb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pcmpeqb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pcmpeqb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pcmpeqb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pcmpeqb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pcmpeqb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pcmpeqb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pcmpeqb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pcmpeqb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pcmpeqb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pcmpeqb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpeqb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpeqb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpeqb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpeqb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pcmpeqb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pcmpeqb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pcmpeqb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pcmpeqb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2617,70 +2617,70 @@ declare x86_mmx @llvm.x86.mmx.pcmpeq.b(x
define i64 @test_pcmpeqd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pcmpeqd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pcmpeqd %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pcmpeqd (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pcmpeqd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pcmpeqd (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pcmpeqd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pcmpeqd (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pcmpeqd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pcmpeqd %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pcmpeqd (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pcmpeqd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pcmpeqd (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pcmpeqd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pcmpeqd (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pcmpeqd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpeqd (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpeqd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpeqd (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpeqd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pcmpeqd (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pcmpeqd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pcmpeqd %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pcmpeqd (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2695,70 +2695,70 @@ declare x86_mmx @llvm.x86.mmx.pcmpeq.d(x
define i64 @test_pcmpeqw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pcmpeqw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pcmpeqw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pcmpeqw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pcmpeqw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pcmpeqw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pcmpeqw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pcmpeqw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pcmpeqw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pcmpeqw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pcmpeqw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pcmpeqw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pcmpeqw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pcmpeqw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pcmpeqw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pcmpeqw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpeqw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpeqw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpeqw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpeqw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pcmpeqw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pcmpeqw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pcmpeqw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pcmpeqw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2773,70 +2773,70 @@ declare x86_mmx @llvm.x86.mmx.pcmpeq.w(x
define i64 @test_pcmpgtb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pcmpgtb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pcmpgtb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pcmpgtb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pcmpgtb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pcmpgtb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pcmpgtb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pcmpgtb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pcmpgtb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pcmpgtb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pcmpgtb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pcmpgtb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pcmpgtb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pcmpgtb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pcmpgtb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pcmpgtb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpgtb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpgtb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpgtb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpgtb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pcmpgtb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pcmpgtb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pcmpgtb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pcmpgtb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2851,70 +2851,70 @@ declare x86_mmx @llvm.x86.mmx.pcmpgt.b(x
define i64 @test_pcmpgtd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pcmpgtd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pcmpgtd %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pcmpgtd (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pcmpgtd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pcmpgtd (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pcmpgtd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pcmpgtd (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pcmpgtd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pcmpgtd %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pcmpgtd (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pcmpgtd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pcmpgtd (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pcmpgtd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pcmpgtd (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pcmpgtd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpgtd (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpgtd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpgtd (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpgtd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pcmpgtd (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pcmpgtd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pcmpgtd %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pcmpgtd (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -2929,70 +2929,70 @@ declare x86_mmx @llvm.x86.mmx.pcmpgt.d(x
define i64 @test_pcmpgtw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pcmpgtw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pcmpgtw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pcmpgtw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pcmpgtw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pcmpgtw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pcmpgtw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pcmpgtw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pcmpgtw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pcmpgtw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pcmpgtw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pcmpgtw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pcmpgtw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pcmpgtw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pcmpgtw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pcmpgtw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pcmpgtw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pcmpgtw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pcmpgtw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pcmpgtw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pcmpgtw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pcmpgtw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pcmpgtw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pcmpgtw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3007,52 +3007,52 @@ declare x86_mmx @llvm.x86.mmx.pcmpgt.w(x
define i32 @test_pextrw(x86_mmx %a0) optsize {
; GENERIC-LABEL: test_pextrw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pextrw $0, %mm0, %eax # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pextrw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pextrw $0, %mm0, %eax # sched: [4:2.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pextrw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pextrw $0, %mm0, %eax # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pextrw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pextrw $0, %mm0, %eax # sched: [1:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pextrw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pextrw $0, %mm0, %eax # sched: [2:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pextrw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pextrw $0, %mm0, %eax # sched: [2:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pextrw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pextrw $0, %mm0, %eax # sched: [3:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pextrw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pextrw $0, %mm0, %eax # sched: [3:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pextrw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pextrw $0, %mm0, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pextrw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pextrw $0, %mm0, %eax # sched: [2:2.00]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = call i32 @llvm.x86.mmx.pextr.w(x86_mmx %a0, i32 0)
@@ -3062,70 +3062,70 @@ declare i32 @llvm.x86.mmx.pextr.w(x86_mm
define i64 @test_phaddd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_phaddd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: phaddd %mm1, %mm0 # sched: [3:1.50]
; GENERIC-NEXT: phaddd (%rdi), %mm0 # sched: [8:1.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_phaddd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: phaddd %mm1, %mm0 # sched: [3:1.50]
; ATOM-NEXT: phaddd (%rdi), %mm0 # sched: [4:2.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_phaddd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: phaddd %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: phaddd (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_phaddd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: phaddd %mm1, %mm0 # sched: [3:1.50]
; SANDY-NEXT: phaddd (%rdi), %mm0 # sched: [8:1.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_phaddd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: phaddd %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: phaddd (%rdi), %mm0 # sched: [3:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_phaddd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: phaddd %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: phaddd (%rdi), %mm0 # sched: [8:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_phaddd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phaddd %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phaddd (%rdi), %mm0 # sched: [8:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phaddd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: phaddd %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phaddd (%rdi), %mm0 # sched: [8:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phaddd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: phaddd %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: phaddd (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_phaddd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: phaddd %mm1, %mm0 # sched: [100:?]
; ZNVER1-NEXT: phaddd (%rdi), %mm0 # sched: [100:?]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3140,70 +3140,70 @@ declare x86_mmx @llvm.x86.ssse3.phadd.d(
define i64 @test_phaddsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_phaddsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: phaddsw %mm1, %mm0 # sched: [3:1.50]
; GENERIC-NEXT: phaddsw (%rdi), %mm0 # sched: [8:1.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_phaddsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: phaddsw %mm1, %mm0 # sched: [5:2.50]
; ATOM-NEXT: phaddsw (%rdi), %mm0 # sched: [6:3.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_phaddsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: phaddsw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: phaddsw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_phaddsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: phaddsw %mm1, %mm0 # sched: [3:1.50]
; SANDY-NEXT: phaddsw (%rdi), %mm0 # sched: [8:1.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_phaddsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: phaddsw %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: phaddsw (%rdi), %mm0 # sched: [3:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_phaddsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: phaddsw %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: phaddsw (%rdi), %mm0 # sched: [8:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_phaddsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phaddsw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phaddsw (%rdi), %mm0 # sched: [8:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phaddsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: phaddsw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phaddsw (%rdi), %mm0 # sched: [8:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phaddsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: phaddsw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: phaddsw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_phaddsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: phaddsw %mm1, %mm0 # sched: [100:?]
; ZNVER1-NEXT: phaddsw (%rdi), %mm0 # sched: [100:?]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3218,70 +3218,70 @@ declare x86_mmx @llvm.x86.ssse3.phadd.sw
define i64 @test_phaddw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_phaddw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: phaddw %mm1, %mm0 # sched: [3:1.50]
; GENERIC-NEXT: phaddw (%rdi), %mm0 # sched: [8:1.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_phaddw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: phaddw %mm1, %mm0 # sched: [5:2.50]
; ATOM-NEXT: phaddw (%rdi), %mm0 # sched: [6:3.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_phaddw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: phaddw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: phaddw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_phaddw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: phaddw %mm1, %mm0 # sched: [3:1.50]
; SANDY-NEXT: phaddw (%rdi), %mm0 # sched: [8:1.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_phaddw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: phaddw %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: phaddw (%rdi), %mm0 # sched: [3:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_phaddw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: phaddw %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: phaddw (%rdi), %mm0 # sched: [8:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_phaddw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phaddw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phaddw (%rdi), %mm0 # sched: [8:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phaddw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: phaddw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phaddw (%rdi), %mm0 # sched: [8:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phaddw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: phaddw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: phaddw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_phaddw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: phaddw %mm1, %mm0 # sched: [100:?]
; ZNVER1-NEXT: phaddw (%rdi), %mm0 # sched: [100:?]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3296,70 +3296,70 @@ declare x86_mmx @llvm.x86.ssse3.phadd.w(
define i64 @test_phsubd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_phsubd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: phsubd %mm1, %mm0 # sched: [3:1.50]
; GENERIC-NEXT: phsubd (%rdi), %mm0 # sched: [8:1.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_phsubd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: phsubd %mm1, %mm0 # sched: [3:1.50]
; ATOM-NEXT: phsubd (%rdi), %mm0 # sched: [4:2.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_phsubd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: phsubd %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: phsubd (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_phsubd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: phsubd %mm1, %mm0 # sched: [3:1.50]
; SANDY-NEXT: phsubd (%rdi), %mm0 # sched: [8:1.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_phsubd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: phsubd %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: phsubd (%rdi), %mm0 # sched: [3:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_phsubd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: phsubd %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: phsubd (%rdi), %mm0 # sched: [8:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_phsubd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phsubd %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phsubd (%rdi), %mm0 # sched: [8:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phsubd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: phsubd %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phsubd (%rdi), %mm0 # sched: [8:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phsubd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: phsubd %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: phsubd (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_phsubd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: phsubd %mm1, %mm0 # sched: [100:?]
; ZNVER1-NEXT: phsubd (%rdi), %mm0 # sched: [100:?]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3374,70 +3374,70 @@ declare x86_mmx @llvm.x86.ssse3.phsub.d(
define i64 @test_phsubsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_phsubsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: phsubsw %mm1, %mm0 # sched: [3:1.50]
; GENERIC-NEXT: phsubsw (%rdi), %mm0 # sched: [8:1.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_phsubsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: phsubsw %mm1, %mm0 # sched: [5:2.50]
; ATOM-NEXT: phsubsw (%rdi), %mm0 # sched: [6:3.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_phsubsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: phsubsw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: phsubsw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_phsubsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: phsubsw %mm1, %mm0 # sched: [3:1.50]
; SANDY-NEXT: phsubsw (%rdi), %mm0 # sched: [8:1.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_phsubsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: phsubsw %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: phsubsw (%rdi), %mm0 # sched: [3:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_phsubsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: phsubsw %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: phsubsw (%rdi), %mm0 # sched: [8:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_phsubsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phsubsw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phsubsw (%rdi), %mm0 # sched: [8:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phsubsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: phsubsw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phsubsw (%rdi), %mm0 # sched: [8:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phsubsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: phsubsw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: phsubsw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_phsubsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: phsubsw %mm1, %mm0 # sched: [100:?]
; ZNVER1-NEXT: phsubsw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3452,70 +3452,70 @@ declare x86_mmx @llvm.x86.ssse3.phsub.sw
define i64 @test_phsubw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_phsubw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: phsubw %mm1, %mm0 # sched: [3:1.50]
; GENERIC-NEXT: phsubw (%rdi), %mm0 # sched: [8:1.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_phsubw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: phsubw %mm1, %mm0 # sched: [5:2.50]
; ATOM-NEXT: phsubw (%rdi), %mm0 # sched: [6:3.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_phsubw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: phsubw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: phsubw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_phsubw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: phsubw %mm1, %mm0 # sched: [3:1.50]
; SANDY-NEXT: phsubw (%rdi), %mm0 # sched: [8:1.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_phsubw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: phsubw %mm1, %mm0 # sched: [3:2.00]
; HASWELL-NEXT: phsubw (%rdi), %mm0 # sched: [3:2.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_phsubw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: phsubw %mm1, %mm0 # sched: [3:2.00]
; BROADWELL-NEXT: phsubw (%rdi), %mm0 # sched: [8:2.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_phsubw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: phsubw %mm1, %mm0 # sched: [3:2.00]
; SKYLAKE-NEXT: phsubw (%rdi), %mm0 # sched: [8:2.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_phsubw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: phsubw %mm1, %mm0 # sched: [3:2.00]
; SKX-NEXT: phsubw (%rdi), %mm0 # sched: [8:2.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_phsubw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: phsubw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: phsubw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_phsubw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: phsubw %mm1, %mm0 # sched: [100:?]
; ZNVER1-NEXT: phsubw (%rdi), %mm0 # sched: [100:?]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3530,7 +3530,7 @@ declare x86_mmx @llvm.x86.ssse3.phsub.w(
define i64 @test_pinsrw(x86_mmx %a0, i32 %a1, i16* %a2) optsize {
; GENERIC-LABEL: test_pinsrw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pinsrw $0, %edi, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: movswl (%rsi), %eax # sched: [5:0.50]
; GENERIC-NEXT: pinsrw $1, %eax, %mm0 # sched: [1:1.00]
@@ -3538,7 +3538,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pinsrw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movswl (%rsi), %eax # sched: [1:1.00]
; ATOM-NEXT: pinsrw $0, %edi, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pinsrw $1, %eax, %mm0 # sched: [1:1.00]
@@ -3546,7 +3546,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pinsrw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movswl (%rsi), %eax # sched: [4:1.00]
; SLM-NEXT: pinsrw $0, %edi, %mm0 # sched: [1:1.00]
; SLM-NEXT: pinsrw $1, %eax, %mm0 # sched: [1:1.00]
@@ -3554,7 +3554,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pinsrw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pinsrw $0, %edi, %mm0 # sched: [1:1.00]
; SANDY-NEXT: movswl (%rsi), %eax # sched: [5:0.50]
; SANDY-NEXT: pinsrw $1, %eax, %mm0 # sched: [1:1.00]
@@ -3562,7 +3562,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pinsrw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:2.00]
; HASWELL-NEXT: movswl (%rsi), %eax # sched: [4:0.50]
; HASWELL-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:2.00]
@@ -3570,7 +3570,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pinsrw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:2.00]
; BROADWELL-NEXT: movswl (%rsi), %eax # sched: [5:0.50]
; BROADWELL-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:2.00]
@@ -3578,7 +3578,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pinsrw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:2.00]
; SKYLAKE-NEXT: movswl (%rsi), %eax # sched: [5:0.50]
; SKYLAKE-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:2.00]
@@ -3586,7 +3586,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pinsrw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pinsrw $0, %edi, %mm0 # sched: [2:2.00]
; SKX-NEXT: movswl (%rsi), %eax # sched: [5:0.50]
; SKX-NEXT: pinsrw $1, %eax, %mm0 # sched: [2:2.00]
@@ -3594,7 +3594,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pinsrw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movswl (%rsi), %eax # sched: [4:1.00]
; BTVER2-NEXT: pinsrw $0, %edi, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pinsrw $1, %eax, %mm0 # sched: [1:0.50]
@@ -3602,7 +3602,7 @@ define i64 @test_pinsrw(x86_mmx %a0, i32
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pinsrw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movswl (%rsi), %eax # sched: [8:0.50]
; ZNVER1-NEXT: pinsrw $0, %edi, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pinsrw $1, %eax, %mm0 # sched: [1:0.25]
@@ -3619,70 +3619,70 @@ declare x86_mmx @llvm.x86.mmx.pinsr.w(x8
define i64 @test_pmaddwd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmaddwd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmaddwd %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pmaddwd (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmaddwd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmaddwd %mm1, %mm0 # sched: [4:4.00]
; ATOM-NEXT: pmaddwd (%rdi), %mm0 # sched: [4:4.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmaddwd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmaddwd %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmaddwd (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmaddwd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmaddwd %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pmaddwd (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmaddwd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmaddwd %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: pmaddwd (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmaddwd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmaddwd %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: pmaddwd (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmaddwd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaddwd %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmaddwd (%rdi), %mm0 # sched: [9:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaddwd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmaddwd %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmaddwd (%rdi), %mm0 # sched: [9:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaddwd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmaddwd %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmaddwd (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmaddwd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmaddwd %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmaddwd (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3697,70 +3697,70 @@ declare x86_mmx @llvm.x86.mmx.pmadd.wd(x
define i64 @test_pmaddubsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmaddubsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmaddubsw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pmaddubsw (%rdi), %mm0 # sched: [8:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmaddubsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:4.00]
; ATOM-NEXT: pmaddubsw (%rdi), %mm0 # sched: [4:4.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmaddubsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmaddubsw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmaddubsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmaddubsw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pmaddubsw (%rdi), %mm0 # sched: [8:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmaddubsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmaddubsw %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: pmaddubsw (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmaddubsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmaddubsw %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: pmaddubsw (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmaddubsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmaddubsw (%rdi), %mm0 # sched: [9:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaddubsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmaddubsw (%rdi), %mm0 # sched: [9:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaddubsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmaddubsw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmaddubsw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmaddubsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmaddubsw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmaddubsw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3775,70 +3775,70 @@ declare x86_mmx @llvm.x86.ssse3.pmadd.ub
define i64 @test_pmaxsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmaxsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmaxsw %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pmaxsw (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmaxsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmaxsw %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pmaxsw (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmaxsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmaxsw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmaxsw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmaxsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmaxsw %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pmaxsw (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmaxsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmaxsw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pmaxsw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmaxsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmaxsw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pmaxsw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmaxsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaxsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pmaxsw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaxsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmaxsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pmaxsw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaxsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmaxsw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmaxsw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmaxsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmaxsw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmaxsw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3853,70 +3853,70 @@ declare x86_mmx @llvm.x86.mmx.pmaxs.w(x8
define i64 @test_pmaxub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmaxub:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmaxub %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pmaxub (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmaxub:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmaxub %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pmaxub (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmaxub:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmaxub %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmaxub (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmaxub:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmaxub %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pmaxub (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmaxub:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmaxub %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pmaxub (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmaxub:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmaxub %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pmaxub (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmaxub:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmaxub %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pmaxub (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmaxub:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmaxub %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pmaxub (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmaxub:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmaxub %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmaxub (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmaxub:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmaxub %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmaxub (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -3931,70 +3931,70 @@ declare x86_mmx @llvm.x86.mmx.pmaxu.b(x8
define i64 @test_pminsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pminsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pminsw %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pminsw (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pminsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pminsw %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pminsw (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pminsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pminsw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pminsw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pminsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pminsw %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pminsw (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pminsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pminsw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pminsw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pminsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pminsw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pminsw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pminsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pminsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pminsw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pminsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pminsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pminsw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pminsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pminsw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pminsw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pminsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pminsw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pminsw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4009,70 +4009,70 @@ declare x86_mmx @llvm.x86.mmx.pmins.w(x8
define i64 @test_pminub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pminub:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pminub %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pminub (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pminub:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pminub %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pminub (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pminub:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pminub %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pminub (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pminub:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pminub %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pminub (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pminub:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pminub %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: pminub (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pminub:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pminub %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: pminub (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pminub:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pminub %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pminub (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pminub:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pminub %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pminub (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pminub:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pminub %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pminub (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pminub:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pminub %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pminub (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4087,52 +4087,52 @@ declare x86_mmx @llvm.x86.mmx.pminu.b(x8
define i32 @test_pmovmskb(x86_mmx %a0) optsize {
; GENERIC-LABEL: test_pmovmskb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmovmskb %mm0, %eax # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmovmskb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmovmskb %mm0, %eax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmovmskb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmovmskb %mm0, %eax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmovmskb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmovmskb %mm0, %eax # sched: [1:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmovmskb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmovmskb %mm0, %eax # sched: [3:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmovmskb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmovmskb %mm0, %eax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmovmskb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmovmskb %mm0, %eax # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmovmskb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmovmskb %mm0, %eax # sched: [2:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmovmskb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmovmskb %mm0, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmovmskb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmovmskb %mm0, %eax # sched: [1:1.00]
; ZNVER1-NEXT: retq # sched: [1:0.50]
%1 = call i32 @llvm.x86.mmx.pmovmskb(x86_mmx %a0)
@@ -4142,70 +4142,70 @@ declare i32 @llvm.x86.mmx.pmovmskb(x86_m
define i64 @test_pmulhrsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmulhrsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmulhrsw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pmulhrsw (%rdi), %mm0 # sched: [8:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmulhrsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:4.00]
; ATOM-NEXT: pmulhrsw (%rdi), %mm0 # sched: [4:4.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmulhrsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmulhrsw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmulhrsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmulhrsw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pmulhrsw (%rdi), %mm0 # sched: [8:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmulhrsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmulhrsw %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: pmulhrsw (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmulhrsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmulhrsw %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: pmulhrsw (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmulhrsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmulhrsw (%rdi), %mm0 # sched: [9:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmulhrsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmulhrsw (%rdi), %mm0 # sched: [9:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmulhrsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmulhrsw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmulhrsw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmulhrsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmulhrsw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmulhrsw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4220,70 +4220,70 @@ declare x86_mmx @llvm.x86.ssse3.pmul.hr.
define i64 @test_pmulhw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmulhw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmulhw %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pmulhw (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmulhw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmulhw %mm1, %mm0 # sched: [4:4.00]
; ATOM-NEXT: pmulhw (%rdi), %mm0 # sched: [4:4.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmulhw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmulhw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmulhw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmulhw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmulhw %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pmulhw (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmulhw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmulhw %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: pmulhw (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmulhw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmulhw %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: pmulhw (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmulhw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmulhw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmulhw (%rdi), %mm0 # sched: [9:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmulhw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmulhw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmulhw (%rdi), %mm0 # sched: [9:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmulhw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmulhw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmulhw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmulhw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmulhw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmulhw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4298,70 +4298,70 @@ declare x86_mmx @llvm.x86.mmx.pmulh.w(x8
define i64 @test_pmulhuw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmulhuw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmulhuw %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pmulhuw (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmulhuw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmulhuw %mm1, %mm0 # sched: [4:4.00]
; ATOM-NEXT: pmulhuw (%rdi), %mm0 # sched: [4:4.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmulhuw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmulhuw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmulhuw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmulhuw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmulhuw %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pmulhuw (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmulhuw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmulhuw %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: pmulhuw (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmulhuw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmulhuw %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: pmulhuw (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmulhuw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmulhuw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmulhuw (%rdi), %mm0 # sched: [9:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmulhuw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmulhuw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmulhuw (%rdi), %mm0 # sched: [9:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmulhuw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmulhuw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmulhuw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmulhuw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmulhuw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmulhuw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4376,70 +4376,70 @@ declare x86_mmx @llvm.x86.mmx.pmulhu.w(x
define i64 @test_pmullw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmullw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmullw %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pmullw (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmullw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmullw %mm1, %mm0 # sched: [4:4.00]
; ATOM-NEXT: pmullw (%rdi), %mm0 # sched: [4:4.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmullw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmullw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmullw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmullw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmullw %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: pmullw (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmullw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmullw %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: pmullw (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmullw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmullw %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: pmullw (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmullw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmullw %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmullw (%rdi), %mm0 # sched: [9:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmullw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmullw %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmullw (%rdi), %mm0 # sched: [9:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmullw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmullw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmullw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmullw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmullw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmullw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4454,70 +4454,70 @@ declare x86_mmx @llvm.x86.mmx.pmull.w(x8
define i64 @test_pmuludq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pmuludq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pmuludq %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: pmuludq (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pmuludq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pmuludq %mm1, %mm0 # sched: [4:4.00]
; ATOM-NEXT: pmuludq (%rdi), %mm0 # sched: [4:4.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pmuludq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pmuludq %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: pmuludq (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pmuludq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pmuludq %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: pmuludq (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pmuludq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pmuludq %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: pmuludq (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pmuludq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pmuludq %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: pmuludq (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pmuludq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pmuludq %mm1, %mm0 # sched: [4:1.00]
; SKYLAKE-NEXT: pmuludq (%rdi), %mm0 # sched: [9:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pmuludq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pmuludq %mm1, %mm0 # sched: [4:1.00]
; SKX-NEXT: pmuludq (%rdi), %mm0 # sched: [9:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pmuludq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pmuludq %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: pmuludq (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pmuludq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pmuludq %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: pmuludq (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4532,70 +4532,70 @@ declare x86_mmx @llvm.x86.mmx.pmulu.dq(x
define i64 @test_por(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_por:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: por %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: por (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_por:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: por %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: por (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_por:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: por %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: por (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_por:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: por %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: por (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_por:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
; HASWELL-NEXT: por (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_por:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: por %mm1, %mm0 # sched: [1:0.33]
; BROADWELL-NEXT: por (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_por:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: por %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: por (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_por:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: por %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: por (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_por:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: por %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: por (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_por:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: por %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: por (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4610,70 +4610,70 @@ declare x86_mmx @llvm.x86.mmx.por(x86_mm
define i64 @test_psadbw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psadbw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psadbw %mm1, %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psadbw (%rdi), %mm0 # sched: [9:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psadbw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psadbw %mm1, %mm0 # sched: [4:2.00]
; ATOM-NEXT: psadbw (%rdi), %mm0 # sched: [4:2.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psadbw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psadbw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: psadbw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psadbw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psadbw %mm1, %mm0 # sched: [5:1.00]
; SANDY-NEXT: psadbw (%rdi), %mm0 # sched: [9:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psadbw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psadbw %mm1, %mm0 # sched: [5:1.00]
; HASWELL-NEXT: psadbw (%rdi), %mm0 # sched: [5:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psadbw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psadbw %mm1, %mm0 # sched: [5:1.00]
; BROADWELL-NEXT: psadbw (%rdi), %mm0 # sched: [10:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psadbw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psadbw %mm1, %mm0 # sched: [3:1.00]
; SKYLAKE-NEXT: psadbw (%rdi), %mm0 # sched: [8:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psadbw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psadbw %mm1, %mm0 # sched: [3:1.00]
; SKX-NEXT: psadbw (%rdi), %mm0 # sched: [8:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psadbw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psadbw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: psadbw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psadbw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psadbw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: psadbw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4688,70 +4688,70 @@ declare x86_mmx @llvm.x86.mmx.psad.bw(x8
define i64 @test_pshufb(x86_mmx %a0, x86_mmx %a1, x86_mmx *%a2) optsize {
; GENERIC-LABEL: test_pshufb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pshufb %mm1, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: pshufb (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pshufb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: pshufb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pshufb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: pshufb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pshufb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pshufb %mm1, %mm0 # sched: [1:0.50]
; SANDY-NEXT: pshufb (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pshufb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: pshufb (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pshufb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: pshufb (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pshufb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pshufb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pshufb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pshufb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pshufb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pshufb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pshufb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pshufb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pshufb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pshufb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pshufb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4766,70 +4766,70 @@ declare x86_mmx @llvm.x86.ssse3.pshuf.b(
define i64 @test_pshufw(x86_mmx *%a0) optsize {
; GENERIC-LABEL: test_pshufw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [5:1.00]
; GENERIC-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pshufw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [1:1.00]
; ATOM-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pshufw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [4:1.00]
; SLM-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pshufw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [5:1.00]
; SANDY-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pshufw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [1:1.00]
; HASWELL-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pshufw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [6:1.00]
; BROADWELL-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pshufw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [6:1.00]
; SKYLAKE-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pshufw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [6:1.00]
; SKX-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pshufw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [6:1.00]
; BTVER2-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:0.50]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pshufw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pshufw $0, (%rdi), %mm0 # mm0 = mem[0,0,0,0] sched: [8:0.50]
; ZNVER1-NEXT: pshufw $0, %mm0, %mm0 # mm0 = mm0[0,0,0,0] sched: [1:0.25]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4844,70 +4844,70 @@ declare x86_mmx @llvm.x86.sse.pshuf.w(x8
define i64 @test_psignb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psignb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psignb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psignb %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: psignb (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psignb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psignb %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: psignb (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psignb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; SANDY-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psignb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psignb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psignb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psignb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psignb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psignb %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psignb (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psignb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psignb %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: psignb (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psignb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psignb %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: psignb (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -4922,70 +4922,70 @@ declare x86_mmx @llvm.x86.ssse3.psign.b(
define i64 @test_psignd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psignd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psignd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psignd %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: psignd (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psignd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psignd %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: psignd (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psignd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; SANDY-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psignd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psignd (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psignd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psignd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psignd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psignd %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psignd (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psignd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psignd %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: psignd (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psignd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psignd %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: psignd (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -5000,70 +5000,70 @@ declare x86_mmx @llvm.x86.ssse3.psign.d(
define i64 @test_psignw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psignw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; GENERIC-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psignw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psignw %mm1, %mm0 # sched: [1:1.00]
; ATOM-NEXT: psignw (%rdi), %mm0 # sched: [1:0.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psignw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psignw %mm1, %mm0 # sched: [4:1.00]
; SLM-NEXT: psignw (%rdi), %mm0 # sched: [7:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psignw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; SANDY-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psignw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psignw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psignw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psignw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psignw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psignw %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psignw (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psignw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psignw %mm1, %mm0 # sched: [2:1.00]
; BTVER2-NEXT: psignw (%rdi), %mm0 # sched: [7:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psignw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psignw %mm1, %mm0 # sched: [4:1.00]
; ZNVER1-NEXT: psignw (%rdi), %mm0 # sched: [11:1.00]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -5078,7 +5078,7 @@ declare x86_mmx @llvm.x86.ssse3.psign.w(
define i64 @test_pslld(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pslld:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: pslld (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: pslld $7, %mm0 # sched: [1:1.00]
@@ -5086,7 +5086,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pslld:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pslld %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: pslld (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: pslld $7, %mm0 # sched: [1:0.50]
@@ -5094,7 +5094,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pslld:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: pslld (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: pslld $7, %mm0 # sched: [1:1.00]
@@ -5102,7 +5102,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pslld:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: pslld (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: pslld $7, %mm0 # sched: [1:1.00]
@@ -5110,7 +5110,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pslld:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: pslld (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: pslld $7, %mm0 # sched: [1:1.00]
@@ -5118,7 +5118,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pslld:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: pslld (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: pslld $7, %mm0 # sched: [1:1.00]
@@ -5126,7 +5126,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pslld:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: pslld (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: pslld $7, %mm0 # sched: [1:1.00]
@@ -5134,7 +5134,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pslld:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pslld %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: pslld (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: pslld $7, %mm0 # sched: [1:1.00]
@@ -5142,7 +5142,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pslld:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pslld %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pslld (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: pslld $7, %mm0 # sched: [1:0.50]
@@ -5150,7 +5150,7 @@ define i64 @test_pslld(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pslld:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pslld %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pslld (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: pslld $7, %mm0 # sched: [1:0.25]
@@ -5168,7 +5168,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.d(x8
define i64 @test_psllq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psllq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: psllq (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psllq $7, %mm0 # sched: [1:1.00]
@@ -5176,7 +5176,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psllq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psllq %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psllq (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: psllq $7, %mm0 # sched: [1:0.50]
@@ -5184,7 +5184,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psllq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: psllq (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: psllq $7, %mm0 # sched: [1:1.00]
@@ -5192,7 +5192,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psllq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: psllq (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: psllq $7, %mm0 # sched: [1:1.00]
@@ -5200,7 +5200,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psllq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psllq (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psllq $7, %mm0 # sched: [1:1.00]
@@ -5208,7 +5208,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psllq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: psllq (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: psllq $7, %mm0 # sched: [1:1.00]
@@ -5216,7 +5216,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psllq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psllq (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psllq $7, %mm0 # sched: [1:1.00]
@@ -5224,7 +5224,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psllq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psllq %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psllq (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psllq $7, %mm0 # sched: [1:1.00]
@@ -5232,7 +5232,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psllq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psllq %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psllq (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: psllq $7, %mm0 # sched: [1:0.50]
@@ -5240,7 +5240,7 @@ define i64 @test_psllq(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psllq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psllq %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psllq (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: psllq $7, %mm0 # sched: [1:0.25]
@@ -5258,7 +5258,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.q(x8
define i64 @test_psllw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psllw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: psllw (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psllw $7, %mm0 # sched: [1:1.00]
@@ -5266,7 +5266,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psllw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psllw %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psllw (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: psllw $7, %mm0 # sched: [1:0.50]
@@ -5274,7 +5274,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psllw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: psllw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: psllw $7, %mm0 # sched: [1:1.00]
@@ -5282,7 +5282,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psllw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: psllw (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: psllw $7, %mm0 # sched: [1:1.00]
@@ -5290,7 +5290,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psllw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psllw (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psllw $7, %mm0 # sched: [1:1.00]
@@ -5298,7 +5298,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psllw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: psllw (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: psllw $7, %mm0 # sched: [1:1.00]
@@ -5306,7 +5306,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psllw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psllw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psllw $7, %mm0 # sched: [1:1.00]
@@ -5314,7 +5314,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psllw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psllw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psllw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psllw $7, %mm0 # sched: [1:1.00]
@@ -5322,7 +5322,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psllw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psllw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psllw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: psllw $7, %mm0 # sched: [1:0.50]
@@ -5330,7 +5330,7 @@ define i64 @test_psllw(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psllw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psllw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psllw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: psllw $7, %mm0 # sched: [1:0.25]
@@ -5348,7 +5348,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.w(x8
define i64 @test_psrad(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psrad:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: psrad (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psrad $7, %mm0 # sched: [1:1.00]
@@ -5356,7 +5356,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psrad:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psrad %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psrad (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: psrad $7, %mm0 # sched: [1:0.50]
@@ -5364,7 +5364,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psrad:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: psrad (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: psrad $7, %mm0 # sched: [1:1.00]
@@ -5372,7 +5372,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psrad:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: psrad (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: psrad $7, %mm0 # sched: [1:1.00]
@@ -5380,7 +5380,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psrad:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrad (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrad $7, %mm0 # sched: [1:1.00]
@@ -5388,7 +5388,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psrad:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: psrad (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: psrad $7, %mm0 # sched: [1:1.00]
@@ -5396,7 +5396,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psrad:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrad (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrad $7, %mm0 # sched: [1:1.00]
@@ -5404,7 +5404,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrad:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psrad %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrad (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrad $7, %mm0 # sched: [1:1.00]
@@ -5412,7 +5412,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrad:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psrad %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psrad (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: psrad $7, %mm0 # sched: [1:0.50]
@@ -5420,7 +5420,7 @@ define i64 @test_psrad(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psrad:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psrad %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psrad (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: psrad $7, %mm0 # sched: [1:0.25]
@@ -5438,7 +5438,7 @@ declare x86_mmx @llvm.x86.mmx.psrai.d(x8
define i64 @test_psraw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psraw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: psraw (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psraw $7, %mm0 # sched: [1:1.00]
@@ -5446,7 +5446,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psraw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psraw %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psraw (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: psraw $7, %mm0 # sched: [1:0.50]
@@ -5454,7 +5454,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psraw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: psraw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: psraw $7, %mm0 # sched: [1:1.00]
@@ -5462,7 +5462,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psraw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: psraw (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: psraw $7, %mm0 # sched: [1:1.00]
@@ -5470,7 +5470,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psraw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psraw (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psraw $7, %mm0 # sched: [1:1.00]
@@ -5478,7 +5478,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psraw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: psraw (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: psraw $7, %mm0 # sched: [1:1.00]
@@ -5486,7 +5486,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psraw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psraw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psraw $7, %mm0 # sched: [1:1.00]
@@ -5494,7 +5494,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psraw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psraw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psraw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psraw $7, %mm0 # sched: [1:1.00]
@@ -5502,7 +5502,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psraw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psraw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psraw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: psraw $7, %mm0 # sched: [1:0.50]
@@ -5510,7 +5510,7 @@ define i64 @test_psraw(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psraw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psraw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psraw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: psraw $7, %mm0 # sched: [1:0.25]
@@ -5528,7 +5528,7 @@ declare x86_mmx @llvm.x86.mmx.psrai.w(x8
define i64 @test_psrld(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psrld:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: psrld (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psrld $7, %mm0 # sched: [1:1.00]
@@ -5536,7 +5536,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psrld:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psrld %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psrld (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: psrld $7, %mm0 # sched: [1:0.50]
@@ -5544,7 +5544,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psrld:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: psrld (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: psrld $7, %mm0 # sched: [1:1.00]
@@ -5552,7 +5552,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psrld:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: psrld (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: psrld $7, %mm0 # sched: [1:1.00]
@@ -5560,7 +5560,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psrld:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrld (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrld $7, %mm0 # sched: [1:1.00]
@@ -5568,7 +5568,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psrld:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: psrld (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: psrld $7, %mm0 # sched: [1:1.00]
@@ -5576,7 +5576,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psrld:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrld (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrld $7, %mm0 # sched: [1:1.00]
@@ -5584,7 +5584,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrld:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psrld %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrld (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrld $7, %mm0 # sched: [1:1.00]
@@ -5592,7 +5592,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrld:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psrld %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psrld (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: psrld $7, %mm0 # sched: [1:0.50]
@@ -5600,7 +5600,7 @@ define i64 @test_psrld(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psrld:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psrld %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psrld (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: psrld $7, %mm0 # sched: [1:0.25]
@@ -5618,7 +5618,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.d(x8
define i64 @test_psrlq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psrlq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: psrlq (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
@@ -5626,7 +5626,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psrlq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psrlq %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psrlq (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: psrlq $7, %mm0 # sched: [1:0.50]
@@ -5634,7 +5634,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psrlq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: psrlq (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
@@ -5642,7 +5642,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psrlq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: psrlq (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
@@ -5650,7 +5650,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psrlq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrlq (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
@@ -5658,7 +5658,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psrlq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: psrlq (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
@@ -5666,7 +5666,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psrlq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrlq (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
@@ -5674,7 +5674,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrlq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psrlq %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrlq (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrlq $7, %mm0 # sched: [1:1.00]
@@ -5682,7 +5682,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrlq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psrlq %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psrlq (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: psrlq $7, %mm0 # sched: [1:0.50]
@@ -5690,7 +5690,7 @@ define i64 @test_psrlq(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psrlq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psrlq %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psrlq (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: psrlq $7, %mm0 # sched: [1:0.25]
@@ -5708,7 +5708,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.q(x8
define i64 @test_psrlw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psrlw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: psrlw (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
@@ -5716,7 +5716,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psrlw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psrlw %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psrlw (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: psrlw $7, %mm0 # sched: [1:0.50]
@@ -5724,7 +5724,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psrlw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; SLM-NEXT: psrlw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
@@ -5732,7 +5732,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psrlw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: psrlw (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
@@ -5740,7 +5740,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psrlw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrlw (%rdi), %mm0 # sched: [1:1.00]
; HASWELL-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
@@ -5748,7 +5748,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psrlw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; BROADWELL-NEXT: psrlw (%rdi), %mm0 # sched: [6:1.00]
; BROADWELL-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
@@ -5756,7 +5756,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psrlw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psrlw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
@@ -5764,7 +5764,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psrlw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psrlw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psrlw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: psrlw $7, %mm0 # sched: [1:1.00]
@@ -5772,7 +5772,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psrlw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psrlw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psrlw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: psrlw $7, %mm0 # sched: [1:0.50]
@@ -5780,7 +5780,7 @@ define i64 @test_psrlw(x86_mmx %a0, x86_
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psrlw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psrlw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psrlw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: psrlw $7, %mm0 # sched: [1:0.25]
@@ -5798,70 +5798,70 @@ declare x86_mmx @llvm.x86.mmx.psrli.w(x8
define i64 @test_psubb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: psubb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubb (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubb (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -5876,70 +5876,70 @@ declare x86_mmx @llvm.x86.mmx.psub.b(x86
define i64 @test_psubd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubd %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubd (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: psubd (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubd (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubd %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubd (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubd (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubd (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubd (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubd (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubd %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubd (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubd %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubd (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -5954,70 +5954,70 @@ declare x86_mmx @llvm.x86.mmx.psub.d(x86
define i64 @test_psubq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubq %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubq (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubq %mm1, %mm0 # sched: [2:1.00]
; ATOM-NEXT: psubq (%rdi), %mm0 # sched: [3:1.50]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubq (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubq %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubq (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubq (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubq (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubq (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubq (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubq %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubq (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubq %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubq (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6032,70 +6032,70 @@ declare x86_mmx @llvm.x86.mmx.psub.q(x86
define i64 @test_psubsb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubsb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubsb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubsb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubsb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubsb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: psubsb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubsb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubsb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubsb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubsb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubsb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubsb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubsb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubsb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubsb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubsb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubsb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubsb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubsb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubsb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubsb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubsb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubsb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubsb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubsb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubsb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubsb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubsb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubsb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubsb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6110,70 +6110,70 @@ declare x86_mmx @llvm.x86.mmx.psubs.b(x8
define i64 @test_psubsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubsw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubsw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubsw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubsw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubsw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: psubsw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubsw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubsw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubsw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubsw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubsw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubsw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubsw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubsw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubsw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubsw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubsw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubsw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubsw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubsw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubsw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubsw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubsw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubsw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubsw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubsw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubsw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubsw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubsw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubsw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6188,70 +6188,70 @@ declare x86_mmx @llvm.x86.mmx.psubs.w(x8
define i64 @test_psubusb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubusb:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubusb %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubusb (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubusb:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubusb %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: psubusb (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubusb:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubusb %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubusb (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubusb:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubusb %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubusb (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubusb:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubusb %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubusb (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubusb:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubusb %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubusb (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubusb:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubusb %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubusb (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubusb:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubusb %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubusb (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubusb:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubusb %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubusb (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubusb:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubusb %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubusb (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6266,70 +6266,70 @@ declare x86_mmx @llvm.x86.mmx.psubus.b(x
define i64 @test_psubusw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubusw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubusw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubusw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubusw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubusw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: psubusw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubusw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubusw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubusw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubusw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubusw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubusw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubusw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubusw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubusw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubusw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubusw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubusw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubusw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubusw %mm1, %mm0 # sched: [1:1.00]
; SKYLAKE-NEXT: psubusw (%rdi), %mm0 # sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubusw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubusw %mm1, %mm0 # sched: [1:1.00]
; SKX-NEXT: psubusw (%rdi), %mm0 # sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubusw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubusw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubusw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubusw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubusw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubusw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6344,70 +6344,70 @@ declare x86_mmx @llvm.x86.mmx.psubus.w(x
define i64 @test_psubw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_psubw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: psubw %mm1, %mm0 # sched: [3:1.00]
; GENERIC-NEXT: psubw (%rdi), %mm0 # sched: [7:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_psubw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: psubw (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_psubw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: psubw (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_psubw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: psubw %mm1, %mm0 # sched: [3:1.00]
; SANDY-NEXT: psubw (%rdi), %mm0 # sched: [7:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_psubw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; HASWELL-NEXT: psubw (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_psubw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; BROADWELL-NEXT: psubw (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_psubw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: psubw (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_psubw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: psubw (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_psubw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: psubw %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: psubw (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_psubw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: psubw %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: psubw (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6422,70 +6422,70 @@ declare x86_mmx @llvm.x86.mmx.psub.w(x86
define i64 @test_punpckhbw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_punpckhbw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; GENERIC-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_punpckhbw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:0.50]
; ATOM-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_punpckhbw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; SLM-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_punpckhbw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; SANDY-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_punpckhbw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; HASWELL-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_punpckhbw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; BROADWELL-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_punpckhbw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; SKYLAKE-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckhbw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:1.00]
; SKX-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckhbw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:0.50]
; BTVER2-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_punpckhbw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: punpckhbw %mm1, %mm0 # mm0 = mm0[4],mm1[4],mm0[5],mm1[5],mm0[6],mm1[6],mm0[7],mm1[7] sched: [1:0.25]
; ZNVER1-NEXT: punpckhbw (%rdi), %mm0 # mm0 = mm0[4],mem[4],mm0[5],mem[5],mm0[6],mem[6],mm0[7],mem[7] sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6500,70 +6500,70 @@ declare x86_mmx @llvm.x86.mmx.punpckhbw(
define i64 @test_punpckhdq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_punpckhdq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; GENERIC-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_punpckhdq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:0.50]
; ATOM-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_punpckhdq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; SLM-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_punpckhdq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; SANDY-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_punpckhdq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; HASWELL-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_punpckhdq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; BROADWELL-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_punpckhdq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; SKYLAKE-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckhdq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:1.00]
; SKX-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckhdq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:0.50]
; BTVER2-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_punpckhdq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: punpckhdq %mm1, %mm0 # mm0 = mm0[1],mm1[1] sched: [1:0.25]
; ZNVER1-NEXT: punpckhdq (%rdi), %mm0 # mm0 = mm0[1],mem[1] sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6578,70 +6578,70 @@ declare x86_mmx @llvm.x86.mmx.punpckhdq(
define i64 @test_punpckhwd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_punpckhwd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; GENERIC-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_punpckhwd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:0.50]
; ATOM-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_punpckhwd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SLM-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_punpckhwd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SANDY-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_punpckhwd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; HASWELL-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_punpckhwd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; BROADWELL-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_punpckhwd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKYLAKE-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckhwd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKX-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckhwd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:0.50]
; BTVER2-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_punpckhwd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: punpckhwd %mm1, %mm0 # mm0 = mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:0.25]
; ZNVER1-NEXT: punpckhwd (%rdi), %mm0 # mm0 = mm0[2],mem[2],mm0[3],mem[3] sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6656,70 +6656,70 @@ declare x86_mmx @llvm.x86.mmx.punpckhwd(
define i64 @test_punpcklbw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_punpcklbw:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; GENERIC-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_punpcklbw:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; ATOM-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_punpcklbw:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SLM-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_punpcklbw:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SANDY-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_punpcklbw:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; HASWELL-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_punpcklbw:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; BROADWELL-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_punpcklbw:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKYLAKE-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpcklbw:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:1.00]
; SKX-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpcklbw:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:0.50]
; BTVER2-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_punpcklbw:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: punpcklbw %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1],mm0[2],mm1[2],mm0[3],mm1[3] sched: [1:0.25]
; ZNVER1-NEXT: punpcklbw (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1],mm0[2],mem[2],mm0[3],mem[3] sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6734,70 +6734,70 @@ declare x86_mmx @llvm.x86.mmx.punpcklbw(
define i64 @test_punpckldq(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_punpckldq:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; GENERIC-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_punpckldq:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; ATOM-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_punpckldq:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; SLM-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_punpckldq:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; SANDY-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_punpckldq:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; HASWELL-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_punpckldq:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; BROADWELL-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_punpckldq:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; SKYLAKE-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpckldq:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:1.00]
; SKX-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpckldq:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:0.50]
; BTVER2-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_punpckldq:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: punpckldq %mm1, %mm0 # mm0 = mm0[0],mm1[0] sched: [1:0.25]
; ZNVER1-NEXT: punpckldq (%rdi), %mm0 # mm0 = mm0[0],mem[0] sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6812,70 +6812,70 @@ declare x86_mmx @llvm.x86.mmx.punpckldq(
define i64 @test_punpcklwd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_punpcklwd:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; GENERIC-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_punpcklwd:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; ATOM-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_punpcklwd:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; SLM-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_punpcklwd:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; SANDY-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_punpcklwd:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; HASWELL-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [1:1.00]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_punpcklwd:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; BROADWELL-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [6:1.00]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_punpcklwd:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; SKYLAKE-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [6:1.00]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_punpcklwd:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:1.00]
; SKX-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [6:1.00]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_punpcklwd:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:0.50]
; BTVER2-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_punpcklwd:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: punpcklwd %mm1, %mm0 # mm0 = mm0[0],mm1[0],mm0[1],mm1[1] sched: [1:0.25]
; ZNVER1-NEXT: punpcklwd (%rdi), %mm0 # mm0 = mm0[0],mem[0],mm0[1],mem[1] sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
@@ -6890,70 +6890,70 @@ declare x86_mmx @llvm.x86.mmx.punpcklwd(
define i64 @test_pxor(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize {
; GENERIC-LABEL: test_pxor:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pxor %mm1, %mm0 # sched: [1:1.00]
; GENERIC-NEXT: pxor (%rdi), %mm0 # sched: [5:1.00]
; GENERIC-NEXT: movd %mm0, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_pxor:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: pxor %mm1, %mm0 # sched: [1:0.50]
; ATOM-NEXT: pxor (%rdi), %mm0 # sched: [1:1.00]
; ATOM-NEXT: movd %mm0, %rax # sched: [3:3.00]
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_pxor:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: pxor %mm1, %mm0 # sched: [1:0.50]
; SLM-NEXT: pxor (%rdi), %mm0 # sched: [4:1.00]
; SLM-NEXT: movd %mm0, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_pxor:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: pxor %mm1, %mm0 # sched: [1:1.00]
; SANDY-NEXT: pxor (%rdi), %mm0 # sched: [5:1.00]
; SANDY-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pxor:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pxor %mm1, %mm0 # sched: [1:0.33]
; HASWELL-NEXT: pxor (%rdi), %mm0 # sched: [1:0.50]
; HASWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pxor:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pxor %mm1, %mm0 # sched: [1:0.33]
; BROADWELL-NEXT: pxor (%rdi), %mm0 # sched: [6:0.50]
; BROADWELL-NEXT: movd %mm0, %rax # sched: [1:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pxor:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pxor %mm1, %mm0 # sched: [1:0.50]
; SKYLAKE-NEXT: pxor (%rdi), %mm0 # sched: [6:0.50]
; SKYLAKE-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; SKX-LABEL: test_pxor:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: pxor %mm1, %mm0 # sched: [1:0.50]
; SKX-NEXT: pxor (%rdi), %mm0 # sched: [6:0.50]
; SKX-NEXT: movd %mm0, %rax # sched: [1:0.33]
; SKX-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_pxor:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: pxor %mm1, %mm0 # sched: [1:0.50]
; BTVER2-NEXT: pxor (%rdi), %mm0 # sched: [6:1.00]
; BTVER2-NEXT: movd %mm0, %rax # sched: [1:0.17]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_pxor:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pxor %mm1, %mm0 # sched: [1:0.25]
; ZNVER1-NEXT: pxor (%rdi), %mm0 # sched: [8:0.50]
; ZNVER1-NEXT: movd %mm0, %rax # sched: [2:1.00]
Modified: llvm/trunk/test/CodeGen/X86/movbe-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movbe-schedule.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movbe-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movbe-schedule.ll Mon Dec 4 09:18:51 2017
@@ -11,13 +11,13 @@
define i16 @test_movbe_i16(i16 *%a0, i16 %a1, i16 *%a2) {
; GENERIC-LABEL: test_movbe_i16:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movbew (%rdi), %ax # sched: [5:0.50]
; GENERIC-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movbe_i16:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movbew (%rdi), %ax # sched: [1:1.00]
; ATOM-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; ATOM-NEXT: nop # sched: [1:0.50]
@@ -27,37 +27,37 @@ define i16 @test_movbe_i16(i16 *%a0, i16
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movbe_i16:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movbew (%rdi), %ax # sched: [4:1.00]
; SLM-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; HASWELL-LABEL: test_movbe_i16:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movbew (%rdi), %ax # sched: [1:0.50]
; HASWELL-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movbe_i16:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movbew (%rdi), %ax # sched: [6:0.50]
; BROADWELL-NEXT: movbew %si, (%rdx) # sched: [2:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movbe_i16:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movbew (%rdi), %ax # sched: [6:0.50]
; SKYLAKE-NEXT: movbew %si, (%rdx) # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movbe_i16:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movbew (%rdi), %ax # sched: [4:1.00]
; BTVER2-NEXT: movbew %si, (%rdx) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movbe_i16:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movbew (%rdi), %ax # sched: [5:0.50]
; ZNVER1-NEXT: movbew %si, (%rdx) # sched: [5:0.50]
; ZNVER1-NEXT: retq # sched: [1:0.50]
@@ -71,13 +71,13 @@ declare i16 @llvm.bswap.i16(i16)
define i32 @test_movbe_i32(i32 *%a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_movbe_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movbel (%rdi), %eax # sched: [5:0.50]
; GENERIC-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movbe_i32:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movbel (%rdi), %eax # sched: [1:1.00]
; ATOM-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; ATOM-NEXT: nop # sched: [1:0.50]
@@ -87,37 +87,37 @@ define i32 @test_movbe_i32(i32 *%a0, i32
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movbe_i32:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movbel (%rdi), %eax # sched: [4:1.00]
; SLM-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; HASWELL-LABEL: test_movbe_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movbel (%rdi), %eax # sched: [1:0.50]
; HASWELL-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movbe_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movbel (%rdi), %eax # sched: [6:0.50]
; BROADWELL-NEXT: movbel %esi, (%rdx) # sched: [2:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movbe_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movbel (%rdi), %eax # sched: [6:0.50]
; SKYLAKE-NEXT: movbel %esi, (%rdx) # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movbe_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movbel (%rdi), %eax # sched: [4:1.00]
; BTVER2-NEXT: movbel %esi, (%rdx) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movbe_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movbel (%rdi), %eax # sched: [5:0.50]
; ZNVER1-NEXT: movbel %esi, (%rdx) # sched: [5:0.50]
; ZNVER1-NEXT: retq # sched: [1:0.50]
@@ -131,13 +131,13 @@ declare i32 @llvm.bswap.i32(i32)
define i64 @test_movbe_i64(i64 *%a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_movbe_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movbeq (%rdi), %rax # sched: [5:0.50]
; GENERIC-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; ATOM-LABEL: test_movbe_i64:
-; ATOM: # BB#0:
+; ATOM: # %bb.0:
; ATOM-NEXT: movbeq (%rdi), %rax # sched: [1:1.00]
; ATOM-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; ATOM-NEXT: nop # sched: [1:0.50]
@@ -147,37 +147,37 @@ define i64 @test_movbe_i64(i64 *%a0, i64
; ATOM-NEXT: retq # sched: [79:39.50]
;
; SLM-LABEL: test_movbe_i64:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: movbeq (%rdi), %rax # sched: [4:1.00]
; SLM-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; SLM-NEXT: retq # sched: [4:1.00]
;
; HASWELL-LABEL: test_movbe_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movbeq (%rdi), %rax # sched: [1:0.50]
; HASWELL-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_movbe_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movbeq (%rdi), %rax # sched: [6:0.50]
; BROADWELL-NEXT: movbeq %rsi, (%rdx) # sched: [2:1.00]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_movbe_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movbeq (%rdi), %rax # sched: [6:0.50]
; SKYLAKE-NEXT: movbeq %rsi, (%rdx) # sched: [2:1.00]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_movbe_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: movbeq (%rdi), %rax # sched: [4:1.00]
; BTVER2-NEXT: movbeq %rsi, (%rdx) # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_movbe_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movbeq (%rdi), %rax # sched: [5:0.50]
; ZNVER1-NEXT: movbeq %rsi, (%rdx) # sched: [5:0.50]
; ZNVER1-NEXT: retq # sched: [1:0.50]
Modified: llvm/trunk/test/CodeGen/X86/movgs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movgs.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movgs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movgs.ll Mon Dec 4 09:18:51 2017
@@ -4,13 +4,13 @@
define i32 @test1() nounwind readonly {
; X32-LABEL: test1:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movl %gs:196, %eax
; X32-NEXT: movl (%eax), %eax
; X32-NEXT: retl
;
; X64-LABEL: test1:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movq %gs:320, %rax
; X64-NEXT: movl (%rax), %eax
; X64-NEXT: retq
@@ -22,7 +22,7 @@ entry:
define i64 @test2(void (i8*)* addrspace(256)* %tmp8) nounwind {
; X32-LABEL: test2:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: subl $12, %esp
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: calll *%gs:(%eax)
@@ -32,7 +32,7 @@ define i64 @test2(void (i8*)* addrspace(
; X32-NEXT: retl
;
; X64-LABEL: test2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: {{(subq.*%rsp|pushq)}}
; X64-NEXT: callq *%gs:(%{{(rcx|rdi)}})
; X64-NEXT: xorl %eax, %eax
@@ -46,13 +46,13 @@ entry:
define <2 x i64> @pmovsxwd_1(i64 addrspace(256)* %p) nounwind readonly {
; X32-LABEL: pmovsxwd_1:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: pmovsxwd %gs:(%eax), %xmm0
; X32-NEXT: retl
;
; X64-LABEL: pmovsxwd_1:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: pmovsxwd %gs:(%{{(rcx|rdi)}}), %xmm0
; X64-NEXT: retq
entry:
@@ -69,7 +69,7 @@ entry:
; address spaces. Make sure they aren't CSE'd.
define i32 @test_no_cse() nounwind readonly {
; X32-LABEL: test_no_cse:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movl %gs:196, %eax
; X32-NEXT: movl (%eax), %eax
; X32-NEXT: movl %fs:196, %ecx
@@ -77,7 +77,7 @@ define i32 @test_no_cse() nounwind reado
; X32-NEXT: retl
;
; X64-LABEL: test_no_cse:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movq %gs:320, %rax
; X64-NEXT: movl (%rax), %eax
; X64-NEXT: movq %fs:320, %rcx
Modified: llvm/trunk/test/CodeGen/X86/movmsk.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/movmsk.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/movmsk.ll (original)
+++ llvm/trunk/test/CodeGen/X86/movmsk.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define i32 @double_signbit(double %d1) nounwind uwtable readnone ssp {
; CHECK-LABEL: double_signbit:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movmskpd %xmm0, %eax
@@ -28,7 +28,7 @@ entry:
define i32 @double_add_signbit(double %d1, double %d2) nounwind uwtable readnone ssp {
; CHECK-LABEL: double_add_signbit:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: addsd %xmm1, %xmm0
; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)
@@ -52,7 +52,7 @@ entry:
define i32 @float_signbit(float %f1) nounwind uwtable readnone ssp {
; CHECK-LABEL: float_signbit:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movss %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movss %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movmskps %xmm0, %eax
@@ -73,7 +73,7 @@ entry:
define i32 @float_add_signbit(float %f1, float %f2) nounwind uwtable readnone ssp {
; CHECK-LABEL: float_add_signbit:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: addss %xmm1, %xmm0
; CHECK-NEXT: movss %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movss %xmm0, -{{[0-9]+}}(%rsp)
@@ -99,7 +99,7 @@ entry:
; in this case, though.
define void @float_call_signbit(double %n) {
; CHECK-LABEL: float_call_signbit:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movq %xmm0, %rdi
; CHECK-NEXT: shrq $63, %rdi
; CHECK-NEXT: ## kill: %edi<def> %edi<kill> %rdi<kill>
@@ -118,7 +118,7 @@ declare void @float_call_signbit_callee(
define i32 @t1(<4 x float> %x, i32* nocapture %indexTable) nounwind uwtable readonly ssp {
; CHECK-LABEL: t1:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movmskps %xmm0, %eax
; CHECK-NEXT: movl (%rdi,%rax,4), %eax
; CHECK-NEXT: retq
@@ -132,7 +132,7 @@ entry:
define i32 @t2(<4 x float> %x, i32* nocapture %indexTable) nounwind uwtable readonly ssp {
; CHECK-LABEL: t2:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movmskpd %xmm0, %eax
; CHECK-NEXT: movl (%rdi,%rax,4), %eax
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll Mon Dec 4 09:18:51 2017
@@ -4,12 +4,12 @@
define i16 @test_mul_by_1(i16 %x) {
; X86-LABEL: test_mul_by_1:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_1:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
%mul = mul nsw i16 %x, 1
@@ -18,14 +18,14 @@ define i16 @test_mul_by_1(i16 %x) {
define i16 @test_mul_by_2(i16 %x) {
; X86-LABEL: test_mul_by_2:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_2:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi), %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -36,14 +36,14 @@ define i16 @test_mul_by_2(i16 %x) {
define i16 @test_mul_by_3(i16 %x) {
; X86-LABEL: test_mul_by_3:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_3:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -54,14 +54,14 @@ define i16 @test_mul_by_3(i16 %x) {
define i16 @test_mul_by_4(i16 %x) {
; X86-LABEL: test_mul_by_4:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_4:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (,%rdi,4), %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -72,14 +72,14 @@ define i16 @test_mul_by_4(i16 %x) {
define i16 @test_mul_by_5(i16 %x) {
; X86-LABEL: test_mul_by_5:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_5:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -90,7 +90,7 @@ define i16 @test_mul_by_5(i16 %x) {
define i16 @test_mul_by_6(i16 %x) {
; X86-LABEL: test_mul_by_6:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -98,7 +98,7 @@ define i16 @test_mul_by_6(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_6:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: addl %edi, %edi
; X64-NEXT: leal (%rdi,%rdi,2), %eax
@@ -110,7 +110,7 @@ define i16 @test_mul_by_6(i16 %x) {
define i16 @test_mul_by_7(i16 %x) {
; X86-LABEL: test_mul_by_7:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (,%ecx,8), %eax
; X86-NEXT: subl %ecx, %eax
@@ -118,7 +118,7 @@ define i16 @test_mul_by_7(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_7:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (,%rdi,8), %eax
; X64-NEXT: subl %edi, %eax
@@ -130,14 +130,14 @@ define i16 @test_mul_by_7(i16 %x) {
define i16 @test_mul_by_8(i16 %x) {
; X86-LABEL: test_mul_by_8:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (,%rdi,8), %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -148,14 +148,14 @@ define i16 @test_mul_by_8(i16 %x) {
define i16 @test_mul_by_9(i16 %x) {
; X86-LABEL: test_mul_by_9:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_9:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -166,7 +166,7 @@ define i16 @test_mul_by_9(i16 %x) {
define i16 @test_mul_by_10(i16 %x) {
; X86-LABEL: test_mul_by_10:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
@@ -174,7 +174,7 @@ define i16 @test_mul_by_10(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_10:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: addl %edi, %edi
; X64-NEXT: leal (%rdi,%rdi,4), %eax
@@ -186,7 +186,7 @@ define i16 @test_mul_by_10(i16 %x) {
define i16 @test_mul_by_11(i16 %x) {
; X86-LABEL: test_mul_by_11:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,2), %eax
@@ -194,7 +194,7 @@ define i16 @test_mul_by_11(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_11:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rdi,%rax,2), %eax
@@ -206,7 +206,7 @@ define i16 @test_mul_by_11(i16 %x) {
define i16 @test_mul_by_12(i16 %x) {
; X86-LABEL: test_mul_by_12:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -214,7 +214,7 @@ define i16 @test_mul_by_12(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_12:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shll $2, %edi
; X64-NEXT: leal (%rdi,%rdi,2), %eax
@@ -226,7 +226,7 @@ define i16 @test_mul_by_12(i16 %x) {
define i16 @test_mul_by_13(i16 %x) {
; X86-LABEL: test_mul_by_13:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
@@ -234,7 +234,7 @@ define i16 @test_mul_by_13(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_13:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
@@ -246,7 +246,7 @@ define i16 @test_mul_by_13(i16 %x) {
define i16 @test_mul_by_14(i16 %x) {
; X86-LABEL: test_mul_by_14:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
@@ -255,7 +255,7 @@ define i16 @test_mul_by_14(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_14:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
@@ -268,7 +268,7 @@ define i16 @test_mul_by_14(i16 %x) {
define i16 @test_mul_by_15(i16 %x) {
; X86-LABEL: test_mul_by_15:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -276,7 +276,7 @@ define i16 @test_mul_by_15(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_15:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
@@ -288,14 +288,14 @@ define i16 @test_mul_by_15(i16 %x) {
define i16 @test_mul_by_16(i16 %x) {
; X86-LABEL: test_mul_by_16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $4, %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: shll $4, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
@@ -305,7 +305,7 @@ define i16 @test_mul_by_16(i16 %x) {
define i16 @test_mul_by_17(i16 %x) {
; X86-LABEL: test_mul_by_17:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $4, %eax
@@ -314,7 +314,7 @@ define i16 @test_mul_by_17(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_17:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shll $4, %eax
@@ -327,7 +327,7 @@ define i16 @test_mul_by_17(i16 %x) {
define i16 @test_mul_by_18(i16 %x) {
; X86-LABEL: test_mul_by_18:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
@@ -335,7 +335,7 @@ define i16 @test_mul_by_18(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_18:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: addl %edi, %edi
; X64-NEXT: leal (%rdi,%rdi,8), %eax
@@ -347,7 +347,7 @@ define i16 @test_mul_by_18(i16 %x) {
define i16 @test_mul_by_19(i16 %x) {
; X86-LABEL: test_mul_by_19:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: shll $2, %eax
@@ -356,7 +356,7 @@ define i16 @test_mul_by_19(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_19:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: shll $2, %eax
@@ -369,7 +369,7 @@ define i16 @test_mul_by_19(i16 %x) {
define i16 @test_mul_by_20(i16 %x) {
; X86-LABEL: test_mul_by_20:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
@@ -377,7 +377,7 @@ define i16 @test_mul_by_20(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_20:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shll $2, %edi
; X64-NEXT: leal (%rdi,%rdi,4), %eax
@@ -389,7 +389,7 @@ define i16 @test_mul_by_20(i16 %x) {
define i16 @test_mul_by_21(i16 %x) {
; X86-LABEL: test_mul_by_21:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
@@ -397,7 +397,7 @@ define i16 @test_mul_by_21(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_21:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
@@ -409,7 +409,7 @@ define i16 @test_mul_by_21(i16 %x) {
define i16 @test_mul_by_22(i16 %x) {
; X86-LABEL: test_mul_by_22:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
@@ -418,7 +418,7 @@ define i16 @test_mul_by_22(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_22:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rdi,%rax,4), %eax
@@ -431,7 +431,7 @@ define i16 @test_mul_by_22(i16 %x) {
define i16 @test_mul_by_23(i16 %x) {
; X86-LABEL: test_mul_by_23:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: shll $3, %eax
@@ -440,7 +440,7 @@ define i16 @test_mul_by_23(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_23:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,2), %eax
; X64-NEXT: shll $3, %eax
@@ -453,7 +453,7 @@ define i16 @test_mul_by_23(i16 %x) {
define i16 @test_mul_by_24(i16 %x) {
; X86-LABEL: test_mul_by_24:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -461,7 +461,7 @@ define i16 @test_mul_by_24(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_24:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: shll $3, %edi
; X64-NEXT: leal (%rdi,%rdi,2), %eax
@@ -473,7 +473,7 @@ define i16 @test_mul_by_24(i16 %x) {
define i16 @test_mul_by_25(i16 %x) {
; X86-LABEL: test_mul_by_25:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
@@ -481,7 +481,7 @@ define i16 @test_mul_by_25(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_25:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,4), %eax
; X64-NEXT: leal (%rax,%rax,4), %eax
@@ -493,7 +493,7 @@ define i16 @test_mul_by_25(i16 %x) {
define i16 @test_mul_by_26(i16 %x) {
; X86-LABEL: test_mul_by_26:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -502,7 +502,7 @@ define i16 @test_mul_by_26(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_26:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
@@ -515,7 +515,7 @@ define i16 @test_mul_by_26(i16 %x) {
define i16 @test_mul_by_27(i16 %x) {
; X86-LABEL: test_mul_by_27:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -523,7 +523,7 @@ define i16 @test_mul_by_27(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_27:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
@@ -535,7 +535,7 @@ define i16 @test_mul_by_27(i16 %x) {
define i16 @test_mul_by_28(i16 %x) {
; X86-LABEL: test_mul_by_28:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -544,7 +544,7 @@ define i16 @test_mul_by_28(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_28:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
@@ -557,7 +557,7 @@ define i16 @test_mul_by_28(i16 %x) {
define i16 @test_mul_by_29(i16 %x) {
; X86-LABEL: test_mul_by_29:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -567,7 +567,7 @@ define i16 @test_mul_by_29(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_29:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal (%rdi,%rdi,8), %eax
; X64-NEXT: leal (%rax,%rax,2), %eax
@@ -581,7 +581,7 @@ define i16 @test_mul_by_29(i16 %x) {
define i16 @test_mul_by_30(i16 %x) {
; X86-LABEL: test_mul_by_30:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $5, %eax
@@ -591,7 +591,7 @@ define i16 @test_mul_by_30(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_30:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shll $5, %eax
; X64-NEXT: subl %edi, %eax
@@ -604,7 +604,7 @@ define i16 @test_mul_by_30(i16 %x) {
define i16 @test_mul_by_31(i16 %x) {
; X86-LABEL: test_mul_by_31:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $5, %eax
@@ -613,7 +613,7 @@ define i16 @test_mul_by_31(i16 %x) {
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_31:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shll $5, %eax
; X64-NEXT: subl %edi, %eax
@@ -625,14 +625,14 @@ define i16 @test_mul_by_31(i16 %x) {
define i16 @test_mul_by_32(i16 %x) {
; X86-LABEL: test_mul_by_32:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $5, %eax
; X86-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; X86-NEXT: retl
;
; X64-LABEL: test_mul_by_32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: shll $5, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
@@ -643,7 +643,7 @@ define i16 @test_mul_by_32(i16 %x) {
; (x*9+42)*(x*5+2)
define i16 @test_mul_spec(i16 %x) nounwind {
; X86-LABEL: test_mul_spec:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal 42(%eax,%eax,8), %ecx
; X86-NEXT: leal 2(%eax,%eax,4), %eax
@@ -652,7 +652,7 @@ define i16 @test_mul_spec(i16 %x) nounwi
; X86-NEXT: retl
;
; X64-LABEL: test_mul_spec:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: leal 42(%rdi,%rdi,8), %ecx
; X64-NEXT: leal 2(%rdi,%rdi,4), %eax
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll Mon Dec 4 09:18:51 2017
@@ -10,42 +10,42 @@
define i32 @test_mul_by_1(i32 %x) {
; X86-LABEL: test_mul_by_1:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_1:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_1:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_1:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_1:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.25]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_1:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_1:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_1:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 1
@@ -54,49 +54,49 @@ define i32 @test_mul_by_1(i32 %x) {
define i32 @test_mul_by_2(i32 %x) {
; X86-LABEL: test_mul_by_2:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_2:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_2:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_2:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: addl %eax, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_2:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_2:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_2:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_2:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -106,47 +106,47 @@ define i32 @test_mul_by_2(i32 %x) {
define i32 @test_mul_by_3(i32 %x) {
; X86-LABEL: test_mul_by_3:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_3:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_3:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_3:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $3, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_3:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_3:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_3:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_3:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -156,49 +156,49 @@ define i32 @test_mul_by_3(i32 %x) {
define i32 @test_mul_by_4(i32 %x) {
; X86-LABEL: test_mul_by_4:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_4:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_4:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_4:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: shll $2, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_4:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_4:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (,%rdi,4), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_4:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_4:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (,%rdi,4), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -208,47 +208,47 @@ define i32 @test_mul_by_4(i32 %x) {
define i32 @test_mul_by_5(i32 %x) {
; X86-LABEL: test_mul_by_5:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: imull $5, {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_5:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_5:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_5:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $5, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_5:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_5:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_5:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_5:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -258,50 +258,50 @@ define i32 @test_mul_by_5(i32 %x) {
define i32 @test_mul_by_6(i32 %x) {
; X86-LABEL: test_mul_by_6:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_6:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: addl %edi, %edi # sched: [1:0.25]
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_6:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_6:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $6, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_6:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $6, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_6:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $6, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_6:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_6:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $6, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 6
@@ -310,50 +310,50 @@ define i32 @test_mul_by_6(i32 %x) {
define i32 @test_mul_by_7(i32 %x) {
; X86-LABEL: test_mul_by_7:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (,%ecx,8), %eax
; X86-NEXT: subl %ecx, %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_7:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: subl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_7:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: subl %edi, %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_7:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $7, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_7:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $7, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_7:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $7, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_7:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: subl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_7:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $7, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 7
@@ -362,49 +362,49 @@ define i32 @test_mul_by_7(i32 %x) {
define i32 @test_mul_by_8(i32 %x) {
; X86-LABEL: test_mul_by_8:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_8:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_8:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_8:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: shll $3, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_8:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_8:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (,%rdi,8), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_8:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_8:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (,%rdi,8), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -414,47 +414,47 @@ define i32 @test_mul_by_8(i32 %x) {
define i32 @test_mul_by_9(i32 %x) {
; X86-LABEL: test_mul_by_9:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: imull $9, {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_9:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_9:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_9:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $9, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_9:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_9:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_9:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_9:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -464,50 +464,50 @@ define i32 @test_mul_by_9(i32 %x) {
define i32 @test_mul_by_10(i32 %x) {
; X86-LABEL: test_mul_by_10:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_10:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: addl %edi, %edi # sched: [1:0.25]
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_10:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_10:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $10, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_10:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $10, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_10:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $10, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_10:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_10:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $10, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 10
@@ -516,48 +516,48 @@ define i32 @test_mul_by_10(i32 %x) {
define i32 @test_mul_by_11(i32 %x) {
; X86-LABEL: test_mul_by_11:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,2), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_11:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_11:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_11:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $11, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_11:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $11, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_11:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $11, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_11:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $11, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_11:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $11, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 11
@@ -566,50 +566,50 @@ define i32 @test_mul_by_11(i32 %x) {
define i32 @test_mul_by_12(i32 %x) {
; X86-LABEL: test_mul_by_12:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_12:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_12:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_12:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $12, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_12:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $12, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_12:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $12, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_12:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: shll $2, %edi # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_12:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $12, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 12
@@ -618,48 +618,48 @@ define i32 @test_mul_by_12(i32 %x) {
define i32 @test_mul_by_13(i32 %x) {
; X86-LABEL: test_mul_by_13:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_13:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_13:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_13:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $13, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_13:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $13, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_13:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $13, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_13:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $13, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_13:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $13, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 13
@@ -668,7 +668,7 @@ define i32 @test_mul_by_13(i32 %x) {
define i32 @test_mul_by_14(i32 %x) {
; X86-LABEL: test_mul_by_14:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
@@ -676,7 +676,7 @@ define i32 @test_mul_by_14(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_14:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
@@ -684,7 +684,7 @@ define i32 @test_mul_by_14(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_14:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
@@ -692,27 +692,27 @@ define i32 @test_mul_by_14(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_14:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $14, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_14:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $14, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_14:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $14, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_14:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $14, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_14:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $14, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 14
@@ -721,50 +721,50 @@ define i32 @test_mul_by_14(i32 %x) {
define i32 @test_mul_by_15(i32 %x) {
; X86-LABEL: test_mul_by_15:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_15:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_15:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_15:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $15, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_15:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $15, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_15:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $15, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_15:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rax,%rax,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_15:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $15, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 15
@@ -773,49 +773,49 @@ define i32 @test_mul_by_15(i32 %x) {
define i32 @test_mul_by_16(i32 %x) {
; X86-LABEL: test_mul_by_16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $4, %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_16:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: shll $4, %edi # sched: [1:0.50]
; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_16:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: shll $4, %edi # sched: [1:0.50]
; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_16:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: shll $4, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_16:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: shll $4, %edi # sched: [1:0.50]
; HSW-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.25]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_16:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: shll $4, %edi # sched: [1:0.50]
; JAG-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_16:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: shll $4, %edi # sched: [1:1.00]
; X64-SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_16:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: shll $4, %edi # sched: [1:1.00]
; SLM-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -825,7 +825,7 @@ define i32 @test_mul_by_16(i32 %x) {
define i32 @test_mul_by_17(i32 %x) {
; X86-LABEL: test_mul_by_17:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $4, %eax
@@ -833,7 +833,7 @@ define i32 @test_mul_by_17(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_17:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: shll $4, %eax # sched: [1:0.50]
@@ -841,7 +841,7 @@ define i32 @test_mul_by_17(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_17:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.17]
; X64-JAG-NEXT: shll $4, %eax # sched: [1:0.50]
@@ -849,22 +849,22 @@ define i32 @test_mul_by_17(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_17:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $17, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_17:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $17, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_17:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $17, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_17:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: shll $4, %eax # sched: [1:1.00]
@@ -872,7 +872,7 @@ define i32 @test_mul_by_17(i32 %x) {
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_17:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $17, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 17
@@ -881,50 +881,50 @@ define i32 @test_mul_by_17(i32 %x) {
define i32 @test_mul_by_18(i32 %x) {
; X86-LABEL: test_mul_by_18:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: addl %eax, %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_18:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: addl %edi, %edi # sched: [1:0.25]
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_18:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_18:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $18, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_18:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $18, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_18:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $18, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_18:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: addl %edi, %edi # sched: [1:0.50]
; X64-SLM-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_18:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $18, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 18
@@ -933,7 +933,7 @@ define i32 @test_mul_by_18(i32 %x) {
define i32 @test_mul_by_19(i32 %x) {
; X86-LABEL: test_mul_by_19:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: shll $2, %eax
@@ -941,7 +941,7 @@ define i32 @test_mul_by_19(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_19:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: shll $2, %eax # sched: [1:0.50]
@@ -949,7 +949,7 @@ define i32 @test_mul_by_19(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_19:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: shll $2, %eax # sched: [1:0.50]
@@ -957,27 +957,27 @@ define i32 @test_mul_by_19(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_19:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $19, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_19:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $19, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_19:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $19, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_19:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $19, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_19:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $19, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 19
@@ -986,50 +986,50 @@ define i32 @test_mul_by_19(i32 %x) {
define i32 @test_mul_by_20(i32 %x) {
; X86-LABEL: test_mul_by_20:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $2, %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_20:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_20:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: shll $2, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_20:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $20, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_20:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $20, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_20:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $20, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_20:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: shll $2, %edi # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_20:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $20, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 20
@@ -1038,48 +1038,48 @@ define i32 @test_mul_by_20(i32 %x) {
define i32 @test_mul_by_21(i32 %x) {
; X86-LABEL: test_mul_by_21:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_21:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_21:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_21:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $21, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_21:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $21, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_21:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $21, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_21:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $21, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_21:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $21, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 21
@@ -1088,7 +1088,7 @@ define i32 @test_mul_by_21(i32 %x) {
define i32 @test_mul_by_22(i32 %x) {
; X86-LABEL: test_mul_by_22:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %eax
; X86-NEXT: leal (%ecx,%eax,4), %eax
@@ -1096,7 +1096,7 @@ define i32 @test_mul_by_22(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_22:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
@@ -1104,7 +1104,7 @@ define i32 @test_mul_by_22(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_22:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rax,4), %eax # sched: [1:0.50]
@@ -1112,27 +1112,27 @@ define i32 @test_mul_by_22(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_22:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $22, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_22:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $22, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_22:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $22, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_22:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $22, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_22:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $22, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 22
@@ -1141,7 +1141,7 @@ define i32 @test_mul_by_22(i32 %x) {
define i32 @test_mul_by_23(i32 %x) {
; X86-LABEL: test_mul_by_23:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %eax
; X86-NEXT: shll $3, %eax
@@ -1149,7 +1149,7 @@ define i32 @test_mul_by_23(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_23:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: shll $3, %eax # sched: [1:0.50]
@@ -1157,7 +1157,7 @@ define i32 @test_mul_by_23(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_23:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: shll $3, %eax # sched: [1:0.50]
@@ -1165,27 +1165,27 @@ define i32 @test_mul_by_23(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_23:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $23, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_23:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $23, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_23:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $23, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_23:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $23, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_23:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $23, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 23
@@ -1194,50 +1194,50 @@ define i32 @test_mul_by_23(i32 %x) {
define i32 @test_mul_by_24(i32 %x) {
; X86-LABEL: test_mul_by_24:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $3, %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_24:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: shll $3, %edi # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_24:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: shll $3, %edi # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_24:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $24, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_24:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $24, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_24:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $24, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_24:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: shll $3, %edi # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rdi,%rdi,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_24:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $24, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 24
@@ -1246,50 +1246,50 @@ define i32 @test_mul_by_24(i32 %x) {
define i32 @test_mul_by_25(i32 %x) {
; X86-LABEL: test_mul_by_25:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: leal (%eax,%eax,4), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_25:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_25:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,4), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_25:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $25, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_25:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $25, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_25:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $25, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_25:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rax,%rax,4), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_25:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $25, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 25
@@ -1298,7 +1298,7 @@ define i32 @test_mul_by_25(i32 %x) {
define i32 @test_mul_by_26(i32 %x) {
; X86-LABEL: test_mul_by_26:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -1306,7 +1306,7 @@ define i32 @test_mul_by_26(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_26:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
@@ -1314,7 +1314,7 @@ define i32 @test_mul_by_26(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_26:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
@@ -1322,27 +1322,27 @@ define i32 @test_mul_by_26(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_26:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $26, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_26:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $26, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_26:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $26, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_26:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $26, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_26:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $26, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 26
@@ -1351,50 +1351,50 @@ define i32 @test_mul_by_26(i32 %x) {
define i32 @test_mul_by_27(i32 %x) {
; X86-LABEL: test_mul_by_27:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_27:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_27:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_27:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $27, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_27:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $27, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_27:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $27, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_27:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:1.00]
; X64-SLM-NEXT: leal (%rax,%rax,2), %eax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_27:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $27, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 27
@@ -1403,7 +1403,7 @@ define i32 @test_mul_by_27(i32 %x) {
define i32 @test_mul_by_28(i32 %x) {
; X86-LABEL: test_mul_by_28:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -1411,7 +1411,7 @@ define i32 @test_mul_by_28(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_28:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
@@ -1419,7 +1419,7 @@ define i32 @test_mul_by_28(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_28:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
@@ -1427,27 +1427,27 @@ define i32 @test_mul_by_28(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_28:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $28, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_28:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $28, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_28:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $28, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_28:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $28, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_28:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $28, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 28
@@ -1456,7 +1456,7 @@ define i32 @test_mul_by_28(i32 %x) {
define i32 @test_mul_by_29(i32 %x) {
; X86-LABEL: test_mul_by_29:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: leal (%ecx,%ecx,8), %eax
; X86-NEXT: leal (%eax,%eax,2), %eax
@@ -1465,7 +1465,7 @@ define i32 @test_mul_by_29(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_29:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
@@ -1474,7 +1474,7 @@ define i32 @test_mul_by_29(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_29:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal (%rdi,%rdi,8), %eax # sched: [1:0.50]
; X64-JAG-NEXT: leal (%rax,%rax,2), %eax # sched: [1:0.50]
@@ -1483,27 +1483,27 @@ define i32 @test_mul_by_29(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_29:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $29, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_29:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $29, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_29:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $29, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_29:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $29, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_29:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $29, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 29
@@ -1512,7 +1512,7 @@ define i32 @test_mul_by_29(i32 %x) {
define i32 @test_mul_by_30(i32 %x) {
; X86-LABEL: test_mul_by_30:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $5, %eax
@@ -1521,7 +1521,7 @@ define i32 @test_mul_by_30(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_30:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: shll $5, %eax # sched: [1:0.50]
; X64-HSW-NEXT: subl %edi, %eax # sched: [1:0.25]
@@ -1529,7 +1529,7 @@ define i32 @test_mul_by_30(i32 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_30:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.17]
; X64-JAG-NEXT: shll $5, %eax # sched: [1:0.50]
; X64-JAG-NEXT: subl %edi, %eax # sched: [1:0.50]
@@ -1537,27 +1537,27 @@ define i32 @test_mul_by_30(i32 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_30:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $30, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_30:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $30, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_30:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $30, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_30:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imull $30, %edi, %eax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_30:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $30, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 30
@@ -1566,7 +1566,7 @@ define i32 @test_mul_by_30(i32 %x) {
define i32 @test_mul_by_31(i32 %x) {
; X86-LABEL: test_mul_by_31:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: shll $5, %eax
@@ -1574,43 +1574,43 @@ define i32 @test_mul_by_31(i32 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_31:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: shll $5, %eax # sched: [1:0.50]
; X64-HSW-NEXT: subl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_31:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.17]
; X64-JAG-NEXT: shll $5, %eax # sched: [1:0.50]
; X64-JAG-NEXT: subl %edi, %eax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_31:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: imull $31, {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_31:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imull $31, %edi, %eax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_31:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imull $31, %edi, %eax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_31:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: shll $5, %eax # sched: [1:1.00]
; X64-SLM-NEXT: subl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_31:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imull $31, %edi, %eax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i32 %x, 31
@@ -1619,49 +1619,49 @@ define i32 @test_mul_by_31(i32 %x) {
define i32 @test_mul_by_32(i32 %x) {
; X86-LABEL: test_mul_by_32:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: shll $5, %eax
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_32:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: shll $5, %edi # sched: [1:0.50]
; X64-HSW-NEXT: movl %edi, %eax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_32:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: shll $5, %edi # sched: [1:0.50]
; X64-JAG-NEXT: movl %edi, %eax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_32:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: shll $5, %eax
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_32:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: shll $5, %edi # sched: [1:0.50]
; HSW-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.25]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_32:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: shll $5, %edi # sched: [1:0.50]
; JAG-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_32:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: shll $5, %edi # sched: [1:1.00]
; X64-SLM-NEXT: movl %edi, %eax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_32:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: shll $5, %edi # sched: [1:1.00]
; SLM-NOOPT-NEXT: movl %edi, %eax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -1672,7 +1672,7 @@ define i32 @test_mul_by_32(i32 %x) {
; (x*9+42)*(x*5+2)
define i32 @test_mul_spec(i32 %x) nounwind {
; X86-LABEL: test_mul_spec:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal 42(%eax,%eax,8), %ecx
; X86-NEXT: leal 2(%eax,%eax,4), %eax
@@ -1680,7 +1680,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_spec:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: leal (%rdi,%rdi,8), %ecx # sched: [1:0.50]
; X64-HSW-NEXT: addl $42, %ecx # sched: [1:0.25]
@@ -1690,7 +1690,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_spec:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-JAG-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:0.50]
; X64-JAG-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:0.50]
@@ -1698,7 +1698,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_spec:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: leal 42(%eax,%eax,8), %ecx
; X86-NOOPT-NEXT: leal 2(%eax,%eax,4), %eax
@@ -1706,7 +1706,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_spec:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; HSW-NOOPT-NEXT: leal (%rdi,%rdi,8), %ecx # sched: [1:0.50]
; HSW-NOOPT-NEXT: addl $42, %ecx # sched: [1:0.25]
@@ -1716,7 +1716,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_spec:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; JAG-NOOPT-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:0.50]
; JAG-NOOPT-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:0.50]
@@ -1724,7 +1724,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_spec:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-SLM-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:1.00]
; X64-SLM-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:1.00]
@@ -1732,7 +1732,7 @@ define i32 @test_mul_spec(i32 %x) nounwi
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_spec:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SLM-NOOPT-NEXT: leal 42(%rdi,%rdi,8), %ecx # sched: [1:1.00]
; SLM-NOOPT-NEXT: leal 2(%rdi,%rdi,4), %eax # sched: [1:1.00]
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-i64.ll Mon Dec 4 09:18:51 2017
@@ -10,44 +10,44 @@
define i64 @test_mul_by_1(i64 %x) nounwind {
; X86-LABEL: test_mul_by_1:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_1:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_1:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_1:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_1:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.25]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_1:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_1:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_1:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 1
@@ -56,7 +56,7 @@ define i64 @test_mul_by_1(i64 %x) nounwi
define i64 @test_mul_by_2(i64 %x) {
; X86-LABEL: test_mul_by_2:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $1, %eax, %edx
@@ -64,17 +64,17 @@ define i64 @test_mul_by_2(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_2:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_2:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_2:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $1, %eax, %edx
@@ -82,22 +82,22 @@ define i64 @test_mul_by_2(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_2:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_2:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_2:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_2:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 2
@@ -106,7 +106,7 @@ define i64 @test_mul_by_2(i64 %x) {
define i64 @test_mul_by_3(i64 %x) {
; X86-LABEL: test_mul_by_3:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl $3, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: imull $3, {{[0-9]+}}(%esp), %ecx
@@ -114,17 +114,17 @@ define i64 @test_mul_by_3(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_3:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_3:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_3:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $3, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $3, {{[0-9]+}}(%esp), %ecx
@@ -132,22 +132,22 @@ define i64 @test_mul_by_3(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_3:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_3:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_3:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_3:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 3
@@ -156,7 +156,7 @@ define i64 @test_mul_by_3(i64 %x) {
define i64 @test_mul_by_4(i64 %x) {
; X86-LABEL: test_mul_by_4:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $2, %eax, %edx
@@ -164,17 +164,17 @@ define i64 @test_mul_by_4(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_4:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_4:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_4:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $2, %eax, %edx
@@ -182,22 +182,22 @@ define i64 @test_mul_by_4(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_4:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_4:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: leaq (,%rdi,4), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_4:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_4:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: leaq (,%rdi,4), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 4
@@ -206,7 +206,7 @@ define i64 @test_mul_by_4(i64 %x) {
define i64 @test_mul_by_5(i64 %x) {
; X86-LABEL: test_mul_by_5:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl $5, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: imull $5, {{[0-9]+}}(%esp), %ecx
@@ -214,17 +214,17 @@ define i64 @test_mul_by_5(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_5:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_5:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_5:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $5, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $5, {{[0-9]+}}(%esp), %ecx
@@ -232,22 +232,22 @@ define i64 @test_mul_by_5(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_5:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_5:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_5:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_5:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 5
@@ -256,7 +256,7 @@ define i64 @test_mul_by_5(i64 %x) {
define i64 @test_mul_by_6(i64 %x) {
; X86-LABEL: test_mul_by_6:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: movl $6, %eax
@@ -265,19 +265,19 @@ define i64 @test_mul_by_6(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_6:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: addq %rdi, %rdi # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_6:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_6:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $6, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $6, {{[0-9]+}}(%esp), %ecx
@@ -285,23 +285,23 @@ define i64 @test_mul_by_6(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_6:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $6, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_6:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $6, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_6:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_6:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $6, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 6
@@ -310,7 +310,7 @@ define i64 @test_mul_by_6(i64 %x) {
define i64 @test_mul_by_7(i64 %x) {
; X86-LABEL: test_mul_by_7:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (,%eax,8), %ecx
; X86-NEXT: subl %eax, %ecx
@@ -320,19 +320,19 @@ define i64 @test_mul_by_7(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_7:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_7:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_7:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $7, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $7, {{[0-9]+}}(%esp), %ecx
@@ -340,23 +340,23 @@ define i64 @test_mul_by_7(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_7:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $7, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_7:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $7, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_7:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_7:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $7, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 7
@@ -365,7 +365,7 @@ define i64 @test_mul_by_7(i64 %x) {
define i64 @test_mul_by_8(i64 %x) {
; X86-LABEL: test_mul_by_8:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $3, %eax, %edx
@@ -373,17 +373,17 @@ define i64 @test_mul_by_8(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_8:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_8:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_8:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $3, %eax, %edx
@@ -391,22 +391,22 @@ define i64 @test_mul_by_8(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_8:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_8:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: leaq (,%rdi,8), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_8:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_8:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: leaq (,%rdi,8), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 8
@@ -415,7 +415,7 @@ define i64 @test_mul_by_8(i64 %x) {
define i64 @test_mul_by_9(i64 %x) {
; X86-LABEL: test_mul_by_9:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl $9, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
; X86-NEXT: imull $9, {{[0-9]+}}(%esp), %ecx
@@ -423,17 +423,17 @@ define i64 @test_mul_by_9(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_9:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_9:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_9:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $9, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $9, {{[0-9]+}}(%esp), %ecx
@@ -441,22 +441,22 @@ define i64 @test_mul_by_9(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_9:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_9:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_9:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_9:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 9
@@ -465,7 +465,7 @@ define i64 @test_mul_by_9(i64 %x) {
define i64 @test_mul_by_10(i64 %x) {
; X86-LABEL: test_mul_by_10:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: movl $10, %eax
@@ -474,19 +474,19 @@ define i64 @test_mul_by_10(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_10:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: addq %rdi, %rdi # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_10:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_10:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $10, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $10, {{[0-9]+}}(%esp), %ecx
@@ -494,23 +494,23 @@ define i64 @test_mul_by_10(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_10:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $10, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_10:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $10, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_10:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_10:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $10, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 10
@@ -519,7 +519,7 @@ define i64 @test_mul_by_10(i64 %x) {
define i64 @test_mul_by_11(i64 %x) {
; X86-LABEL: test_mul_by_11:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,2), %ecx
@@ -529,19 +529,19 @@ define i64 @test_mul_by_11(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_11:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_11:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_11:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $11, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $11, {{[0-9]+}}(%esp), %ecx
@@ -549,22 +549,22 @@ define i64 @test_mul_by_11(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_11:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_11:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_11:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_11:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $11, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 11
@@ -573,7 +573,7 @@ define i64 @test_mul_by_11(i64 %x) {
define i64 @test_mul_by_12(i64 %x) {
; X86-LABEL: test_mul_by_12:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: movl $12, %eax
@@ -582,19 +582,19 @@ define i64 @test_mul_by_12(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_12:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_12:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_12:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $12, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $12, {{[0-9]+}}(%esp), %ecx
@@ -602,23 +602,23 @@ define i64 @test_mul_by_12(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_12:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $12, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_12:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $12, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_12:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: shlq $2, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_12:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $12, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 12
@@ -627,7 +627,7 @@ define i64 @test_mul_by_12(i64 %x) {
define i64 @test_mul_by_13(i64 %x) {
; X86-LABEL: test_mul_by_13:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
@@ -637,19 +637,19 @@ define i64 @test_mul_by_13(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_13:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_13:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_13:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $13, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $13, {{[0-9]+}}(%esp), %ecx
@@ -657,22 +657,22 @@ define i64 @test_mul_by_13(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_13:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_13:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_13:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_13:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $13, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 13
@@ -681,7 +681,7 @@ define i64 @test_mul_by_13(i64 %x) {
define i64 @test_mul_by_14(i64 %x) {
; X86-LABEL: test_mul_by_14:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
@@ -692,21 +692,21 @@ define i64 @test_mul_by_14(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_14:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_14:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_14:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $14, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $14, {{[0-9]+}}(%esp), %ecx
@@ -714,22 +714,22 @@ define i64 @test_mul_by_14(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_14:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_14:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_14:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_14:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $14, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 14
@@ -738,7 +738,7 @@ define i64 @test_mul_by_14(i64 %x) {
define i64 @test_mul_by_15(i64 %x) {
; X86-LABEL: test_mul_by_15:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $15, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
@@ -748,19 +748,19 @@ define i64 @test_mul_by_15(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_15:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_15:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_15:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $15, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $15, {{[0-9]+}}(%esp), %ecx
@@ -768,23 +768,23 @@ define i64 @test_mul_by_15(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_15:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $15, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_15:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $15, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_15:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_15:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $15, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 15
@@ -793,7 +793,7 @@ define i64 @test_mul_by_15(i64 %x) {
define i64 @test_mul_by_16(i64 %x) {
; X86-LABEL: test_mul_by_16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $4, %eax, %edx
@@ -801,19 +801,19 @@ define i64 @test_mul_by_16(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_16:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: shlq $4, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_16:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: shlq $4, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_16:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $4, %eax, %edx
@@ -821,25 +821,25 @@ define i64 @test_mul_by_16(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_16:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: shlq $4, %rdi # sched: [1:0.50]
; HSW-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.25]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_16:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: shlq $4, %rdi # sched: [1:0.50]
; JAG-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_16:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: shlq $4, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_16:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: shlq $4, %rdi # sched: [1:1.00]
; SLM-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -849,7 +849,7 @@ define i64 @test_mul_by_16(i64 %x) {
define i64 @test_mul_by_17(i64 %x) {
; X86-LABEL: test_mul_by_17:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $4, %ecx
@@ -860,21 +860,21 @@ define i64 @test_mul_by_17(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_17:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: shlq $4, %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rdi), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_17:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: shlq $4, %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rdi), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_17:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $17, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $17, {{[0-9]+}}(%esp), %ecx
@@ -882,24 +882,24 @@ define i64 @test_mul_by_17(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_17:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $17, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_17:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $17, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_17:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: shlq $4, %rax # sched: [1:1.00]
; X64-SLM-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_17:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $17, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 17
@@ -908,7 +908,7 @@ define i64 @test_mul_by_17(i64 %x) {
define i64 @test_mul_by_18(i64 %x) {
; X86-LABEL: test_mul_by_18:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: movl $18, %eax
@@ -917,19 +917,19 @@ define i64 @test_mul_by_18(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_18:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: addq %rdi, %rdi # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_18:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_18:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $18, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $18, {{[0-9]+}}(%esp), %ecx
@@ -937,23 +937,23 @@ define i64 @test_mul_by_18(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_18:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $18, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_18:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $18, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_18:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: addq %rdi, %rdi # sched: [1:0.50]
; X64-SLM-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_18:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $18, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 18
@@ -962,7 +962,7 @@ define i64 @test_mul_by_18(i64 %x) {
define i64 @test_mul_by_19(i64 %x) {
; X86-LABEL: test_mul_by_19:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: shll $2, %ecx
@@ -973,21 +973,21 @@ define i64 @test_mul_by_19(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_19:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: shlq $2, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_19:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: shlq $2, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_19:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $19, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $19, {{[0-9]+}}(%esp), %ecx
@@ -995,22 +995,22 @@ define i64 @test_mul_by_19(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_19:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_19:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_19:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_19:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $19, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 19
@@ -1019,7 +1019,7 @@ define i64 @test_mul_by_19(i64 %x) {
define i64 @test_mul_by_20(i64 %x) {
; X86-LABEL: test_mul_by_20:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: movl $20, %eax
@@ -1028,19 +1028,19 @@ define i64 @test_mul_by_20(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_20:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_20:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: shlq $2, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_20:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $20, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $20, {{[0-9]+}}(%esp), %ecx
@@ -1048,23 +1048,23 @@ define i64 @test_mul_by_20(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_20:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $20, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_20:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $20, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_20:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: shlq $2, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_20:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $20, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 20
@@ -1073,7 +1073,7 @@ define i64 @test_mul_by_20(i64 %x) {
define i64 @test_mul_by_21(i64 %x) {
; X86-LABEL: test_mul_by_21:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
@@ -1083,19 +1083,19 @@ define i64 @test_mul_by_21(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_21:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_21:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_21:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $21, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $21, {{[0-9]+}}(%esp), %ecx
@@ -1103,22 +1103,22 @@ define i64 @test_mul_by_21(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_21:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_21:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_21:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_21:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $21, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 21
@@ -1127,7 +1127,7 @@ define i64 @test_mul_by_21(i64 %x) {
define i64 @test_mul_by_22(i64 %x) {
; X86-LABEL: test_mul_by_22:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
@@ -1138,21 +1138,21 @@ define i64 @test_mul_by_22(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_22:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_22:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_22:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $22, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $22, {{[0-9]+}}(%esp), %ecx
@@ -1160,22 +1160,22 @@ define i64 @test_mul_by_22(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_22:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_22:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_22:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_22:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $22, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 22
@@ -1184,7 +1184,7 @@ define i64 @test_mul_by_22(i64 %x) {
define i64 @test_mul_by_23(i64 %x) {
; X86-LABEL: test_mul_by_23:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: shll $3, %ecx
@@ -1195,21 +1195,21 @@ define i64 @test_mul_by_23(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_23:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: shlq $3, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_23:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: shlq $3, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_23:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $23, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $23, {{[0-9]+}}(%esp), %ecx
@@ -1217,22 +1217,22 @@ define i64 @test_mul_by_23(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_23:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_23:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_23:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_23:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $23, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 23
@@ -1241,7 +1241,7 @@ define i64 @test_mul_by_23(i64 %x) {
define i64 @test_mul_by_24(i64 %x) {
; X86-LABEL: test_mul_by_24:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: movl $24, %eax
@@ -1250,19 +1250,19 @@ define i64 @test_mul_by_24(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_24:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: shlq $3, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_24:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: shlq $3, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_24:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $24, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $24, {{[0-9]+}}(%esp), %ecx
@@ -1270,23 +1270,23 @@ define i64 @test_mul_by_24(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_24:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $24, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_24:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $24, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_24:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: shlq $3, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rdi,%rdi,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_24:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $24, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 24
@@ -1295,7 +1295,7 @@ define i64 @test_mul_by_24(i64 %x) {
define i64 @test_mul_by_25(i64 %x) {
; X86-LABEL: test_mul_by_25:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $25, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
@@ -1305,19 +1305,19 @@ define i64 @test_mul_by_25(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_25:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,4), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_25:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_25:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $25, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $25, {{[0-9]+}}(%esp), %ecx
@@ -1325,23 +1325,23 @@ define i64 @test_mul_by_25(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_25:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $25, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_25:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $25, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_25:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rax,%rax,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_25:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $25, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 25
@@ -1350,7 +1350,7 @@ define i64 @test_mul_by_25(i64 %x) {
define i64 @test_mul_by_26(i64 %x) {
; X86-LABEL: test_mul_by_26:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
@@ -1361,21 +1361,21 @@ define i64 @test_mul_by_26(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_26:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_26:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_26:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $26, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $26, {{[0-9]+}}(%esp), %ecx
@@ -1383,22 +1383,22 @@ define i64 @test_mul_by_26(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_26:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_26:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_26:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_26:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $26, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 26
@@ -1407,7 +1407,7 @@ define i64 @test_mul_by_26(i64 %x) {
define i64 @test_mul_by_27(i64 %x) {
; X86-LABEL: test_mul_by_27:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl $27, %eax
; X86-NEXT: mull {{[0-9]+}}(%esp)
@@ -1417,19 +1417,19 @@ define i64 @test_mul_by_27(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_27:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_27:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_27:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $27, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $27, {{[0-9]+}}(%esp), %ecx
@@ -1437,23 +1437,23 @@ define i64 @test_mul_by_27(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_27:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $27, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_27:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $27, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_27:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:1.00]
; X64-SLM-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_27:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $27, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 27
@@ -1462,7 +1462,7 @@ define i64 @test_mul_by_27(i64 %x) {
define i64 @test_mul_by_28(i64 %x) {
; X86-LABEL: test_mul_by_28:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
@@ -1473,21 +1473,21 @@ define i64 @test_mul_by_28(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_28:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_28:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_28:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $28, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $28, {{[0-9]+}}(%esp), %ecx
@@ -1495,22 +1495,22 @@ define i64 @test_mul_by_28(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_28:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_28:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_28:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_28:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $28, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 28
@@ -1519,7 +1519,7 @@ define i64 @test_mul_by_28(i64 %x) {
define i64 @test_mul_by_29(i64 %x) {
; X86-LABEL: test_mul_by_29:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
@@ -1531,7 +1531,7 @@ define i64 @test_mul_by_29(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_29:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-HSW-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-HSW-NEXT: addq %rdi, %rax # sched: [1:0.25]
@@ -1539,7 +1539,7 @@ define i64 @test_mul_by_29(i64 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_29:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq (%rdi,%rdi,8), %rax # sched: [1:0.50]
; X64-JAG-NEXT: leaq (%rax,%rax,2), %rax # sched: [1:0.50]
; X64-JAG-NEXT: addq %rdi, %rax # sched: [1:0.50]
@@ -1547,7 +1547,7 @@ define i64 @test_mul_by_29(i64 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_29:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $29, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $29, {{[0-9]+}}(%esp), %ecx
@@ -1555,22 +1555,22 @@ define i64 @test_mul_by_29(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_29:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_29:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_29:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_29:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $29, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 29
@@ -1579,7 +1579,7 @@ define i64 @test_mul_by_29(i64 %x) {
define i64 @test_mul_by_30(i64 %x) {
; X86-LABEL: test_mul_by_30:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $5, %ecx
@@ -1591,7 +1591,7 @@ define i64 @test_mul_by_30(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_30:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
@@ -1599,7 +1599,7 @@ define i64 @test_mul_by_30(i64 %x) {
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_30:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
@@ -1607,7 +1607,7 @@ define i64 @test_mul_by_30(i64 %x) {
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_30:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $30, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $30, {{[0-9]+}}(%esp), %ecx
@@ -1615,22 +1615,22 @@ define i64 @test_mul_by_30(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_30:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_30:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_30:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_30:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $30, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 30
@@ -1639,7 +1639,7 @@ define i64 @test_mul_by_30(i64 %x) {
define i64 @test_mul_by_31(i64 %x) {
; X86-LABEL: test_mul_by_31:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $5, %ecx
@@ -1650,21 +1650,21 @@ define i64 @test_mul_by_31(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_31:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-HSW-NEXT: subq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_31:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: shlq $5, %rax # sched: [1:0.50]
; X64-JAG-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_31:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl $31, %eax
; X86-NOOPT-NEXT: mull {{[0-9]+}}(%esp)
; X86-NOOPT-NEXT: imull $31, {{[0-9]+}}(%esp), %ecx
@@ -1672,24 +1672,24 @@ define i64 @test_mul_by_31(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_31:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: imulq $31, %rdi, %rax # sched: [3:1.00]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_31:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: imulq $31, %rdi, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_31:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: shlq $5, %rax # sched: [1:1.00]
; X64-SLM-NEXT: subq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_31:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: imulq $31, %rdi, %rax # sched: [3:1.00]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
%mul = mul nsw i64 %x, 31
@@ -1698,7 +1698,7 @@ define i64 @test_mul_by_31(i64 %x) {
define i64 @test_mul_by_32(i64 %x) {
; X86-LABEL: test_mul_by_32:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: shldl $5, %eax, %edx
@@ -1706,19 +1706,19 @@ define i64 @test_mul_by_32(i64 %x) {
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_by_32:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: shlq $5, %rdi # sched: [1:0.50]
; X64-HSW-NEXT: movq %rdi, %rax # sched: [1:0.25]
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_by_32:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: shlq $5, %rdi # sched: [1:0.50]
; X64-JAG-NEXT: movq %rdi, %rax # sched: [1:0.17]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_by_32:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NOOPT-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NOOPT-NEXT: shldl $5, %eax, %edx
@@ -1726,25 +1726,25 @@ define i64 @test_mul_by_32(i64 %x) {
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_by_32:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: shlq $5, %rdi # sched: [1:0.50]
; HSW-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.25]
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_by_32:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: shlq $5, %rdi # sched: [1:0.50]
; JAG-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.17]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_by_32:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: shlq $5, %rdi # sched: [1:1.00]
; X64-SLM-NEXT: movq %rdi, %rax # sched: [1:0.50]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_by_32:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: shlq $5, %rdi # sched: [1:1.00]
; SLM-NOOPT-NEXT: movq %rdi, %rax # sched: [1:0.50]
; SLM-NOOPT-NEXT: retq # sched: [4:1.00]
@@ -1755,7 +1755,7 @@ define i64 @test_mul_by_32(i64 %x) {
; (x*9+42)*(x*5+2)
define i64 @test_mul_spec(i64 %x) nounwind {
; X86-LABEL: test_mul_spec:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
@@ -1787,7 +1787,7 @@ define i64 @test_mul_spec(i64 %x) nounwi
; X86-NEXT: retl
;
; X64-HSW-LABEL: test_mul_spec:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: leaq (%rdi,%rdi,8), %rcx # sched: [1:0.50]
; X64-HSW-NEXT: addq $42, %rcx # sched: [1:0.25]
; X64-HSW-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
@@ -1796,14 +1796,14 @@ define i64 @test_mul_spec(i64 %x) nounwi
; X64-HSW-NEXT: retq # sched: [2:1.00]
;
; X64-JAG-LABEL: test_mul_spec:
-; X64-JAG: # BB#0:
+; X64-JAG: # %bb.0:
; X64-JAG-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:0.50]
; X64-JAG-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:0.50]
; X64-JAG-NEXT: imulq %rcx, %rax # sched: [3:1.00]
; X64-JAG-NEXT: retq # sched: [4:1.00]
;
; X86-NOOPT-LABEL: test_mul_spec:
-; X86-NOOPT: # BB#0:
+; X86-NOOPT: # %bb.0:
; X86-NOOPT-NEXT: pushl %ebx
; X86-NOOPT-NEXT: pushl %edi
; X86-NOOPT-NEXT: pushl %esi
@@ -1835,7 +1835,7 @@ define i64 @test_mul_spec(i64 %x) nounwi
; X86-NOOPT-NEXT: retl
;
; HSW-NOOPT-LABEL: test_mul_spec:
-; HSW-NOOPT: # BB#0:
+; HSW-NOOPT: # %bb.0:
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,8), %rcx # sched: [1:0.50]
; HSW-NOOPT-NEXT: addq $42, %rcx # sched: [1:0.25]
; HSW-NOOPT-NEXT: leaq (%rdi,%rdi,4), %rax # sched: [1:0.50]
@@ -1844,21 +1844,21 @@ define i64 @test_mul_spec(i64 %x) nounwi
; HSW-NOOPT-NEXT: retq # sched: [2:1.00]
;
; JAG-NOOPT-LABEL: test_mul_spec:
-; JAG-NOOPT: # BB#0:
+; JAG-NOOPT: # %bb.0:
; JAG-NOOPT-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:0.50]
; JAG-NOOPT-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:0.50]
; JAG-NOOPT-NEXT: imulq %rcx, %rax # sched: [3:1.00]
; JAG-NOOPT-NEXT: retq # sched: [4:1.00]
;
; X64-SLM-LABEL: test_mul_spec:
-; X64-SLM: # BB#0:
+; X64-SLM: # %bb.0:
; X64-SLM-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:1.00]
; X64-SLM-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:1.00]
; X64-SLM-NEXT: imulq %rcx, %rax # sched: [3:1.00]
; X64-SLM-NEXT: retq # sched: [4:1.00]
;
; SLM-NOOPT-LABEL: test_mul_spec:
-; SLM-NOOPT: # BB#0:
+; SLM-NOOPT: # %bb.0:
; SLM-NOOPT-NEXT: leaq 42(%rdi,%rdi,8), %rcx # sched: [1:1.00]
; SLM-NOOPT-NEXT: leaq 2(%rdi,%rdi,4), %rax # sched: [1:1.00]
; SLM-NOOPT-NEXT: imulq %rcx, %rax # sched: [3:1.00]
Modified: llvm/trunk/test/CodeGen/X86/mul-constant-result.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-constant-result.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-constant-result.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-constant-result.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
; Function Attrs: norecurse nounwind readnone uwtable
define i32 @mult(i32, i32) local_unnamed_addr #0 {
; X86-LABEL: mult:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: .cfi_offset %esi, -8
@@ -17,19 +17,19 @@ define i32 @mult(i32, i32) local_unnamed
; X86-NEXT: movl $1, %eax
; X86-NEXT: movl $1, %esi
; X86-NEXT: jg .LBB0_2
-; X86-NEXT: # BB#1:
+; X86-NEXT: # %bb.1:
; X86-NEXT: movl %edx, %esi
; X86-NEXT: .LBB0_2:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: testl %edx, %edx
; X86-NEXT: je .LBB0_4
-; X86-NEXT: # BB#3:
+; X86-NEXT: # %bb.3:
; X86-NEXT: movl %esi, %eax
; X86-NEXT: .LBB0_4:
; X86-NEXT: decl %ecx
; X86-NEXT: cmpl $31, %ecx
; X86-NEXT: ja .LBB0_39
-; X86-NEXT: # BB#5:
+; X86-NEXT: # %bb.5:
; X86-NEXT: jmpl *.LJTI0_0(,%ecx,4)
; X86-NEXT: .LBB0_6:
; X86-NEXT: addl %eax, %eax
@@ -187,7 +187,7 @@ define i32 @mult(i32, i32) local_unnamed
; X86-NEXT: retl
;
; X64-HSW-LABEL: mult:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-HSW-NEXT: cmpl $1, %esi
; X64-HSW-NEXT: movl $1, %ecx
@@ -198,7 +198,7 @@ define i32 @mult(i32, i32) local_unnamed
; X64-HSW-NEXT: addl $-1, %edi
; X64-HSW-NEXT: cmpl $31, %edi
; X64-HSW-NEXT: ja .LBB0_36
-; X64-HSW-NEXT: # BB#1:
+; X64-HSW-NEXT: # %bb.1:
; X64-HSW-NEXT: jmpq *.LJTI0_0(,%rdi,8)
; X64-HSW-NEXT: .LBB0_2:
; X64-HSW-NEXT: addl %eax, %eax
@@ -524,7 +524,7 @@ define i32 @mult(i32, i32) local_unnamed
; Function Attrs: norecurse nounwind readnone uwtable
define i32 @foo() local_unnamed_addr #0 {
; X86-LABEL: foo:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: pushl %ebx
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %edi
@@ -862,7 +862,7 @@ define i32 @foo() local_unnamed_addr #0
; X86-NEXT: retl
;
; X64-HSW-LABEL: foo:
-; X64-HSW: # BB#0:
+; X64-HSW: # %bb.0:
; X64-HSW-NEXT: pushq %rbp
; X64-HSW-NEXT: .cfi_def_cfa_offset 16
; X64-HSW-NEXT: pushq %r15
Modified: llvm/trunk/test/CodeGen/X86/mul-i1024.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-i1024.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-i1024.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-i1024.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define void @test_1024(i1024* %a, i1024* %b, i1024* %out) nounwind {
; X32-LABEL: test_1024:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %ebp
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: pushl %ebx
@@ -6726,7 +6726,7 @@ define void @test_1024(i1024* %a, i1024*
; X32-NEXT: retl
;
; X64-LABEL: test_1024:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %r15
; X64-NEXT: pushq %r14
Modified: llvm/trunk/test/CodeGen/X86/mul-i256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-i256.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-i256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-i256.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@ target datalayout = "e-m:e-i64:64-f80:12
define void @test(i256* %a, i256* %b, i256* %out) #0 {
; X32-LABEL: test:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: pushl %ebp
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: pushl %ebx
@@ -356,7 +356,7 @@ define void @test(i256* %a, i256* %b, i2
; X32-NEXT: retl
;
; X64-LABEL: test:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: pushq %r15
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: pushq %r14
Modified: llvm/trunk/test/CodeGen/X86/mul-i512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul-i512.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul-i512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul-i512.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define void @test_512(i512* %a, i512* %b, i512* %out) nounwind {
; X32-LABEL: test_512:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %ebp
; X32-NEXT: pushl %ebx
; X32-NEXT: pushl %edi
@@ -1530,7 +1530,7 @@ define void @test_512(i512* %a, i512* %b
; X32-NEXT: retl
;
; X64-LABEL: test_512:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: pushq %rbp
; X64-NEXT: pushq %r15
; X64-NEXT: pushq %r14
Modified: llvm/trunk/test/CodeGen/X86/mul128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul128.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul128.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i128 @foo(i128 %t, i128 %u) {
; X64-LABEL: foo:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdx, %r8
; X64-NEXT: imulq %rdi, %rcx
; X64-NEXT: movq %rdi, %rax
@@ -15,7 +15,7 @@ define i128 @foo(i128 %t, i128 %u) {
; X64-NEXT: retq
;
; X86-LABEL: foo:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %ebx
Modified: llvm/trunk/test/CodeGen/X86/mul64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mul64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mul64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mul64.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i64 @foo(i64 %t, i64 %u) nounwind {
; X32-LABEL: foo:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %esi
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
@@ -18,7 +18,7 @@ define i64 @foo(i64 %t, i64 %u) nounwind
; X32-NEXT: retl
;
; X64-LABEL: foo:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: imulq %rsi, %rdi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/mulvi32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mulvi32.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mulvi32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mulvi32.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define <2 x i32> @_mul2xi32a(<2 x i32>, <2 x i32>) {
; SSE-LABEL: _mul2xi32a:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: psrlq $32, %xmm2
; SSE-NEXT: pmuludq %xmm1, %xmm2
@@ -22,7 +22,7 @@ define <2 x i32> @_mul2xi32a(<2 x i32>,
; SSE-NEXT: retq
;
; AVX-LABEL: _mul2xi32a:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpsrlq $32, %xmm0, %xmm2
; AVX-NEXT: vpmuludq %xmm1, %xmm2, %xmm2
; AVX-NEXT: vpsrlq $32, %xmm1, %xmm3
@@ -38,7 +38,7 @@ define <2 x i32> @_mul2xi32a(<2 x i32>,
define <2 x i32> @_mul2xi32b(<2 x i32>, <2 x i32>) {
; SSE2-LABEL: _mul2xi32b:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE2-NEXT: pmuludq %xmm0, %xmm1
@@ -46,7 +46,7 @@ define <2 x i32> @_mul2xi32b(<2 x i32>,
; SSE2-NEXT: retq
;
; SSE42-LABEL: _mul2xi32b:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE42-NEXT: pmuludq %xmm0, %xmm1
@@ -54,7 +54,7 @@ define <2 x i32> @_mul2xi32b(<2 x i32>,
; SSE42-NEXT: retq
;
; AVX-LABEL: _mul2xi32b:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
@@ -70,7 +70,7 @@ define <2 x i32> @_mul2xi32b(<2 x i32>,
define <4 x i32> @_mul4xi32a(<4 x i32>, <4 x i32>) {
; SSE2-LABEL: _mul4xi32a:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE2-NEXT: pmuludq %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -81,12 +81,12 @@ define <4 x i32> @_mul4xi32a(<4 x i32>,
; SSE2-NEXT: retq
;
; SSE42-LABEL: _mul4xi32a:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pmulld %xmm1, %xmm0
; SSE42-NEXT: retq
;
; AVX-LABEL: _mul4xi32a:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%r = mul <4 x i32> %0, %1
@@ -95,7 +95,7 @@ define <4 x i32> @_mul4xi32a(<4 x i32>,
define <4 x i32> @_mul4xi32b(<4 x i32>, <4 x i32>) {
; SSE2-LABEL: _mul4xi32b:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE2-NEXT: pmuludq %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -106,7 +106,7 @@ define <4 x i32> @_mul4xi32b(<4 x i32>,
; SSE2-NEXT: retq
;
; SSE42-LABEL: _mul4xi32b:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE42-NEXT: pmuludq %xmm1, %xmm0
; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -116,7 +116,7 @@ define <4 x i32> @_mul4xi32b(<4 x i32>,
; SSE42-NEXT: retq
;
; AVX1-LABEL: _mul4xi32b:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -126,7 +126,7 @@ define <4 x i32> @_mul4xi32b(<4 x i32>,
; AVX1-NEXT: retq
;
; AVX2-LABEL: _mul4xi32b:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -152,7 +152,7 @@ define <4 x i32> @_mul4xi32b(<4 x i32>,
; %ext1 = zext <4 x i32> %1 to <4 x i64>
define <4 x i64> @_mul4xi32toi64a(<4 x i32>, <4 x i32>) {
; SSE2-LABEL: _mul4xi32toi64a:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movq %xmm1, %rax
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
; SSE2-NEXT: movq %xmm1, %rcx
@@ -180,7 +180,7 @@ define <4 x i64> @_mul4xi32toi64a(<4 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: _mul4xi32toi64a:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movq %xmm1, %rax
; SSE42-NEXT: pextrq $1, %xmm1, %rcx
; SSE42-NEXT: movd %ecx, %xmm1
@@ -206,7 +206,7 @@ define <4 x i64> @_mul4xi32toi64a(<4 x i
; SSE42-NEXT: retq
;
; AVX1-LABEL: _mul4xi32toi64a:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovq %xmm0, %rax
; AVX1-NEXT: vmovd %eax, %xmm2
; AVX1-NEXT: shrq $32, %rax
@@ -233,7 +233,7 @@ define <4 x i64> @_mul4xi32toi64a(<4 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: _mul4xi32toi64a:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovq %xmm1, %rax
; AVX2-NEXT: vmovd %eax, %xmm2
; AVX2-NEXT: shrq $32, %rax
@@ -290,7 +290,7 @@ define <4 x i64> @_mul4xi32toi64a(<4 x i
; there is no bitcast and the final shuffle is a little different
define <4 x i64> @_mul4xi32toi64b(<4 x i32>, <4 x i32>) {
; SSE-LABEL: _mul4xi32toi64b:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3]
; SSE-NEXT: pmuludq %xmm1, %xmm2
@@ -303,7 +303,7 @@ define <4 x i64> @_mul4xi32toi64b(<4 x i
; SSE-NEXT: retq
;
; AVX1-LABEL: _mul4xi32toi64b:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -314,7 +314,7 @@ define <4 x i64> @_mul4xi32toi64b(<4 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: _mul4xi32toi64b:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -338,7 +338,7 @@ define <4 x i64> @_mul4xi32toi64b(<4 x i
; but the final shuffle is a no-op.
define <4 x i64> @_mul4xi32toi64c(<4 x i32>, <4 x i32>) {
; SSE2-LABEL: _mul4xi32toi64c:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,1,1,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,1,1,3]
; SSE2-NEXT: pmuludq %xmm3, %xmm2
@@ -349,7 +349,7 @@ define <4 x i64> @_mul4xi32toi64c(<4 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: _mul4xi32toi64c:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pmovzxdq {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero
; SSE42-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero
; SSE42-NEXT: pmuludq %xmm3, %xmm2
@@ -360,7 +360,7 @@ define <4 x i64> @_mul4xi32toi64c(<4 x i
; SSE42-NEXT: retq
;
; AVX1-LABEL: _mul4xi32toi64c:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero
; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero
; AVX1-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
@@ -371,7 +371,7 @@ define <4 x i64> @_mul4xi32toi64c(<4 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: _mul4xi32toi64c:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero
; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero
; AVX2-NEXT: vpmuludq %xmm3, %xmm2, %xmm2
@@ -403,7 +403,7 @@ define <4 x i64> @_mul4xi32toi64c(<4 x i
; %ext1 = zext <2 x i32> %1 to <2 x i64>
define <2 x i64> @_mul2xi64toi64a(<2 x i64>, <2 x i64>) {
; SSE2-LABEL: _mul2xi64toi64a:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,4294967295]
; SSE2-NEXT: pand %xmm2, %xmm0
; SSE2-NEXT: pand %xmm2, %xmm1
@@ -411,7 +411,7 @@ define <2 x i64> @_mul2xi64toi64a(<2 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: _mul2xi64toi64a:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pxor %xmm2, %xmm2
; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
@@ -419,7 +419,7 @@ define <2 x i64> @_mul2xi64toi64a(<2 x i
; SSE42-NEXT: retq
;
; AVX1-LABEL: _mul2xi64toi64a:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
@@ -427,7 +427,7 @@ define <2 x i64> @_mul2xi64toi64a(<2 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: _mul2xi64toi64a:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3]
; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3]
@@ -455,12 +455,12 @@ define <2 x i64> @_mul2xi64toi64a(<2 x i
define <2 x i64> @_mul2xi64toi64b(<2 x i64>, <2 x i64>) {
; SSE-LABEL: _mul2xi64toi64b:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: pmuludq %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: _mul2xi64toi64b:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%f0 = bitcast <2 x i64> %0 to <4 x i32>
Modified: llvm/trunk/test/CodeGen/X86/mulx32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mulx32.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mulx32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mulx32.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i64 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: mulxl {{[0-9]+}}(%esp), %eax, %edx
; CHECK-NEXT: retl
@@ -16,7 +16,7 @@ define i64 @f1(i32 %a, i32 %b) {
define i64 @f2(i32 %a, i32* %p) {
; CHECK-LABEL: f2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: mulxl (%eax), %eax, %edx
Modified: llvm/trunk/test/CodeGen/X86/mulx64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mulx64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mulx64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mulx64.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i128 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rdx
; CHECK-NEXT: mulxq %rsi, %rax, %rdx
; CHECK-NEXT: retq
@@ -16,7 +16,7 @@ define i128 @f1(i64 %a, i64 %b) {
define i128 @f2(i64 %a, i64* %p) {
; CHECK-LABEL: f2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rdx
; CHECK-NEXT: mulxq (%rsi), %rax, %rdx
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/neg_cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/neg_cmp.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/neg_cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/neg_cmp.ll Mon Dec 4 09:18:51 2017
@@ -8,10 +8,10 @@ declare void @g()
define void @neg_cmp(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: neg_cmp:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: addl %esi, %edi
; CHECK-NEXT: jne .LBB0_1
-; CHECK-NEXT: # BB#2: # %if.then
+; CHECK-NEXT: # %bb.2: # %if.then
; CHECK-NEXT: jmp g # TAILCALL
; CHECK-NEXT: .LBB0_1: # %if.end
; CHECK-NEXT: retq
@@ -29,10 +29,10 @@ if.end:
define void @neg_cmp_commuted(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: neg_cmp_commuted:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: addl %esi, %edi
; CHECK-NEXT: jne .LBB1_1
-; CHECK-NEXT: # BB#2: # %if.then
+; CHECK-NEXT: # %bb.2: # %if.then
; CHECK-NEXT: jmp g # TAILCALL
; CHECK-NEXT: .LBB1_1: # %if.end
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/negate-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negate-i1.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negate-i1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negate-i1.ll Mon Dec 4 09:18:51 2017
@@ -4,14 +4,14 @@
define i8 @select_i8_neg1_or_0(i1 %a) {
; X64-LABEL: select_i8_neg1_or_0:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: andb $1, %dil
; X64-NEXT: negb %dil
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
;
; X32-LABEL: select_i8_neg1_or_0:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: andb $1, %al
; X32-NEXT: negb %al
@@ -22,13 +22,13 @@ define i8 @select_i8_neg1_or_0(i1 %a) {
define i8 @select_i8_neg1_or_0_zeroext(i1 zeroext %a) {
; X64-LABEL: select_i8_neg1_or_0_zeroext:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: negb %dil
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
;
; X32-LABEL: select_i8_neg1_or_0_zeroext:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: negb %al
; X32-NEXT: retl
@@ -38,14 +38,14 @@ define i8 @select_i8_neg1_or_0_zeroext(i
define i16 @select_i16_neg1_or_0(i1 %a) {
; X64-LABEL: select_i16_neg1_or_0:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: andl $1, %edi
; X64-NEXT: negl %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
;
; X32-LABEL: select_i16_neg1_or_0:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andl $1, %eax
; X32-NEXT: negl %eax
@@ -57,13 +57,13 @@ define i16 @select_i16_neg1_or_0(i1 %a)
define i16 @select_i16_neg1_or_0_zeroext(i1 zeroext %a) {
; X64-LABEL: select_i16_neg1_or_0_zeroext:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: negl %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
;
; X32-LABEL: select_i16_neg1_or_0_zeroext:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: negl %eax
; X32-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -74,14 +74,14 @@ define i16 @select_i16_neg1_or_0_zeroext
define i32 @select_i32_neg1_or_0(i1 %a) {
; X64-LABEL: select_i32_neg1_or_0:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: andl $1, %edi
; X64-NEXT: negl %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
;
; X32-LABEL: select_i32_neg1_or_0:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andl $1, %eax
; X32-NEXT: negl %eax
@@ -92,13 +92,13 @@ define i32 @select_i32_neg1_or_0(i1 %a)
define i32 @select_i32_neg1_or_0_zeroext(i1 zeroext %a) {
; X64-LABEL: select_i32_neg1_or_0_zeroext:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: negl %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
;
; X32-LABEL: select_i32_neg1_or_0_zeroext:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: negl %eax
; X32-NEXT: retl
@@ -108,7 +108,7 @@ define i32 @select_i32_neg1_or_0_zeroext
define i64 @select_i64_neg1_or_0(i1 %a) {
; X64-LABEL: select_i64_neg1_or_0:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: andl $1, %edi
; X64-NEXT: negq %rdi
@@ -116,7 +116,7 @@ define i64 @select_i64_neg1_or_0(i1 %a)
; X64-NEXT: retq
;
; X32-LABEL: select_i64_neg1_or_0:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: andl $1, %eax
; X32-NEXT: negl %eax
@@ -128,13 +128,13 @@ define i64 @select_i64_neg1_or_0(i1 %a)
define i64 @select_i64_neg1_or_0_zeroext(i1 zeroext %a) {
; X64-LABEL: select_i64_neg1_or_0_zeroext:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: negq %rax
; X64-NEXT: retq
;
; X32-LABEL: select_i64_neg1_or_0_zeroext:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: negl %eax
; X32-NEXT: movl %eax, %edx
Modified: llvm/trunk/test/CodeGen/X86/negate-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negate-shift.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negate-shift.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negate-shift.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i32 @neg_lshr_signbit(i32 %x) {
; X64-LABEL: neg_lshr_signbit:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: sarl $31, %edi
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
@@ -14,7 +14,7 @@ define i32 @neg_lshr_signbit(i32 %x) {
define i64 @neg_ashr_signbit(i64 %x) {
; X64-LABEL: neg_ashr_signbit:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: shrq $63, %rdi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: retq
@@ -25,7 +25,7 @@ define i64 @neg_ashr_signbit(i64 %x) {
define <4 x i32> @neg_ashr_signbit_vec(<4 x i32> %x) {
; X64-LABEL: neg_ashr_signbit_vec:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: psrld $31, %xmm0
; X64-NEXT: retq
%sh = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
@@ -35,7 +35,7 @@ define <4 x i32> @neg_ashr_signbit_vec(<
define <8 x i16> @neg_lshr_signbit_vec(<8 x i16> %x) {
; X64-LABEL: neg_lshr_signbit_vec:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: psraw $15, %xmm0
; X64-NEXT: retq
%sh = lshr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
Modified: llvm/trunk/test/CodeGen/X86/negate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negate.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negate.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i32 @negate_nuw(i32 %x) {
; CHECK-LABEL: negate_nuw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: retq
%neg = sub nuw i32 0, %x
@@ -12,7 +12,7 @@ define i32 @negate_nuw(i32 %x) {
define <4 x i32> @negate_nuw_vec(<4 x i32> %x) {
; CHECK-LABEL: negate_nuw_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: retq
%neg = sub nuw <4 x i32> zeroinitializer, %x
@@ -21,7 +21,7 @@ define <4 x i32> @negate_nuw_vec(<4 x i3
define i8 @negate_zero_or_minsigned_nsw(i8 %x) {
; CHECK-LABEL: negate_zero_or_minsigned_nsw:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: retq
%signbit = and i8 %x, 128
@@ -31,7 +31,7 @@ define i8 @negate_zero_or_minsigned_nsw(
define <4 x i32> @negate_zero_or_minsigned_nsw_vec(<4 x i32> %x) {
; CHECK-LABEL: negate_zero_or_minsigned_nsw_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: retq
%signbit = shl <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
@@ -41,7 +41,7 @@ define <4 x i32> @negate_zero_or_minsign
define i8 @negate_zero_or_minsigned(i8 %x) {
; CHECK-LABEL: negate_zero_or_minsigned:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: shlb $7, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -52,7 +52,7 @@ define i8 @negate_zero_or_minsigned(i8 %
define <4 x i32> @negate_zero_or_minsigned_vec(<4 x i32> %x) {
; CHECK-LABEL: negate_zero_or_minsigned_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andps {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq
%signbit = and <4 x i32> %x, <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648>
Modified: llvm/trunk/test/CodeGen/X86/negative-sin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/negative-sin.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/negative-sin.ll (original)
+++ llvm/trunk/test/CodeGen/X86/negative-sin.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ declare double @sin(double %f)
define double @strict(double %e) nounwind {
; CHECK-LABEL: strict:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; CHECK-NEXT: vsubsd %xmm0, %xmm1, %xmm0
@@ -27,7 +27,7 @@ define double @strict(double %e) nounwin
define double @fast(double %e) nounwind {
; CHECK-LABEL: fast:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: jmp sin # TAILCALL
%f = fsub fast double 0.0, %e
%g = call double @sin(double %f) readonly
@@ -39,7 +39,7 @@ define double @fast(double %e) nounwind
define double @nsz(double %e) nounwind {
; CHECK-LABEL: nsz:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: jmp sin # TAILCALL
%f = fsub nsz double 0.0, %e
%g = call double @sin(double %f) readonly
@@ -51,7 +51,7 @@ define double @nsz(double %e) nounwind {
define double @semi_strict1(double %e) nounwind {
; CHECK-LABEL: semi_strict1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm1
; CHECK-NEXT: vsubsd %xmm0, %xmm1, %xmm0
@@ -69,7 +69,7 @@ define double @semi_strict1(double %e) n
define double @semi_strict2(double %e) nounwind {
; CHECK-LABEL: semi_strict2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: callq sin
; CHECK-NEXT: vxorpd %xmm1, %xmm1, %xmm1
@@ -87,7 +87,7 @@ define double @semi_strict2(double %e) n
define double @fn_attr(double %e) nounwind #0 {
; CHECK-LABEL: fn_attr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: jmp sin # TAILCALL
%f = fsub double 0.0, %e
%g = call double @sin(double %f) readonly
Modified: llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/no-sse2-avg.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define <16 x i8> @PR27973() {
; CHECK-LABEL: PR27973:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq $0, 8(%rdi)
; CHECK-NEXT: movq $0, (%rdi)
; CHECK-NEXT: movq %rdi, %rax
Modified: llvm/trunk/test/CodeGen/X86/nontemporal-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nontemporal-2.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nontemporal-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nontemporal-2.ll Mon Dec 4 09:18:51 2017
@@ -13,19 +13,19 @@
define void @test_zero_f32(float* %dst) {
; SSE-LABEL: test_zero_f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: movntil %eax, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: movntil %eax, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: xorl %eax, %eax
; VLX-NEXT: movntil %eax, (%rdi)
; VLX-NEXT: retq
@@ -35,19 +35,19 @@ define void @test_zero_f32(float* %dst)
define void @test_zero_i32(i32* %dst) {
; SSE-LABEL: test_zero_i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: movntil %eax, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: movntil %eax, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: xorl %eax, %eax
; VLX-NEXT: movntil %eax, (%rdi)
; VLX-NEXT: retq
@@ -57,19 +57,19 @@ define void @test_zero_i32(i32* %dst) {
define void @test_zero_f64(double* %dst) {
; SSE-LABEL: test_zero_f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: movntiq %rax, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: movntiq %rax, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: xorl %eax, %eax
; VLX-NEXT: movntiq %rax, (%rdi)
; VLX-NEXT: retq
@@ -79,19 +79,19 @@ define void @test_zero_f64(double* %dst)
define void @test_zero_i64(i64* %dst) {
; SSE-LABEL: test_zero_i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorl %eax, %eax
; SSE-NEXT: movntiq %rax, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: movntiq %rax, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: xorl %eax, %eax
; VLX-NEXT: movntiq %rax, (%rdi)
; VLX-NEXT: retq
@@ -103,19 +103,19 @@ define void @test_zero_i64(i64* %dst) {
define void @test_zero_v4f32(<4 x float>* %dst) {
; SSE-LABEL: test_zero_v4f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v4f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v4f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -125,19 +125,19 @@ define void @test_zero_v4f32(<4 x float>
define void @test_zero_v4i32(<4 x i32>* %dst) {
; SSE-LABEL: test_zero_v4i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v4i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v4i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -148,19 +148,19 @@ define void @test_zero_v4i32(<4 x i32>*
define void @test_zero_v2f64(<2 x double>* %dst) {
; SSE-LABEL: test_zero_v2f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v2f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v2f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -170,19 +170,19 @@ define void @test_zero_v2f64(<2 x double
define void @test_zero_v2i64(<2 x i64>* %dst) {
; SSE-LABEL: test_zero_v2i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v2i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v2i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -192,19 +192,19 @@ define void @test_zero_v2i64(<2 x i64>*
define void @test_zero_v8i16(<8 x i16>* %dst) {
; SSE-LABEL: test_zero_v8i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v8i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v8i16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -214,19 +214,19 @@ define void @test_zero_v8i16(<8 x i16>*
define void @test_zero_v16i8(<16 x i8>* %dst) {
; SSE-LABEL: test_zero_v16i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v16i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v16i8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -238,21 +238,21 @@ define void @test_zero_v16i8(<16 x i8>*
define void @test_zero_v8f32(<8 x float>* %dst) {
; SSE-LABEL: test_zero_v8f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v8f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v8f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -263,21 +263,21 @@ define void @test_zero_v8f32(<8 x float>
define void @test_zero_v8i32(<8 x i32>* %dst) {
; SSE-LABEL: test_zero_v8i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v8i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v8i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -288,21 +288,21 @@ define void @test_zero_v8i32(<8 x i32>*
define void @test_zero_v4f64(<4 x double>* %dst) {
; SSE-LABEL: test_zero_v4f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v4f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v4f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -313,21 +313,21 @@ define void @test_zero_v4f64(<4 x double
define void @test_zero_v4i64(<4 x i64>* %dst) {
; SSE-LABEL: test_zero_v4i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v4i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v4i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -338,21 +338,21 @@ define void @test_zero_v4i64(<4 x i64>*
define void @test_zero_v16i16(<16 x i16>* %dst) {
; SSE-LABEL: test_zero_v16i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v16i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v16i16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -363,21 +363,21 @@ define void @test_zero_v16i16(<16 x i16>
define void @test_zero_v32i8(<32 x i8>* %dst) {
; SSE-LABEL: test_zero_v32i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: movntps %xmm0, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_zero_v32i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_zero_v32i8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpxor %xmm0, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -393,27 +393,27 @@ define void @test_zero_v32i8(<32 x i8>*
define void @test_arg_f32(float %arg, float* %dst) {
; SSE2-LABEL: test_arg_f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movss %xmm0, (%rdi)
; SSE2-NEXT: retq
;
; SSE4A-LABEL: test_arg_f32:
-; SSE4A: # BB#0:
+; SSE4A: # %bb.0:
; SSE4A-NEXT: movntss %xmm0, (%rdi)
; SSE4A-NEXT: retq
;
; SSE41-LABEL: test_arg_f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movss %xmm0, (%rdi)
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovss %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovss %xmm0, (%rdi)
; VLX-NEXT: retq
store float %arg, float* %dst, align 1, !nontemporal !1
@@ -422,17 +422,17 @@ define void @test_arg_f32(float %arg, fl
define void @test_arg_i32(i32 %arg, i32* %dst) {
; SSE-LABEL: test_arg_i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntil %edi, (%rsi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: movntil %edi, (%rsi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: movntil %edi, (%rsi)
; VLX-NEXT: retq
store i32 %arg, i32* %dst, align 1, !nontemporal !1
@@ -441,27 +441,27 @@ define void @test_arg_i32(i32 %arg, i32*
define void @test_arg_f64(double %arg, double* %dst) {
; SSE2-LABEL: test_arg_f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movsd %xmm0, (%rdi)
; SSE2-NEXT: retq
;
; SSE4A-LABEL: test_arg_f64:
-; SSE4A: # BB#0:
+; SSE4A: # %bb.0:
; SSE4A-NEXT: movntsd %xmm0, (%rdi)
; SSE4A-NEXT: retq
;
; SSE41-LABEL: test_arg_f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movsd %xmm0, (%rdi)
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovsd %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovsd %xmm0, (%rdi)
; VLX-NEXT: retq
store double %arg, double* %dst, align 1, !nontemporal !1
@@ -470,17 +470,17 @@ define void @test_arg_f64(double %arg, d
define void @test_arg_i64(i64 %arg, i64* %dst) {
; SSE-LABEL: test_arg_i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntiq %rdi, (%rsi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: movntiq %rdi, (%rsi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: movntiq %rdi, (%rsi)
; VLX-NEXT: retq
store i64 %arg, i64* %dst, align 1, !nontemporal !1
@@ -491,31 +491,31 @@ define void @test_arg_i64(i64 %arg, i64*
define void @test_extract_f32(<4 x float> %arg, float* %dst) {
; SSE2-LABEL: test_extract_f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
; SSE2-NEXT: movss %xmm0, (%rdi)
; SSE2-NEXT: retq
;
; SSE4A-LABEL: test_extract_f32:
-; SSE4A: # BB#0:
+; SSE4A: # %bb.0:
; SSE4A-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE4A-NEXT: movntss %xmm0, (%rdi)
; SSE4A-NEXT: retq
;
; SSE41-LABEL: test_extract_f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: extractps $1, %xmm0, %eax
; SSE41-NEXT: movntil %eax, (%rdi)
; SSE41-NEXT: retq
;
; AVX-LABEL: test_extract_f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractps $1, %xmm0, %eax
; AVX-NEXT: movntil %eax, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_extract_f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vextractps $1, %xmm0, %eax
; VLX-NEXT: movntil %eax, (%rdi)
; VLX-NEXT: retq
@@ -526,33 +526,33 @@ define void @test_extract_f32(<4 x float
define void @test_extract_i32(<4 x i32> %arg, i32* %dst) {
; SSE2-LABEL: test_extract_i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
; SSE2-NEXT: movd %xmm0, %eax
; SSE2-NEXT: movntil %eax, (%rdi)
; SSE2-NEXT: retq
;
; SSE4A-LABEL: test_extract_i32:
-; SSE4A: # BB#0:
+; SSE4A: # %bb.0:
; SSE4A-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
; SSE4A-NEXT: movd %xmm0, %eax
; SSE4A-NEXT: movntil %eax, (%rdi)
; SSE4A-NEXT: retq
;
; SSE41-LABEL: test_extract_i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: extractps $1, %xmm0, %eax
; SSE41-NEXT: movntil %eax, (%rdi)
; SSE41-NEXT: retq
;
; AVX-LABEL: test_extract_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractps $1, %xmm0, %eax
; AVX-NEXT: movntil %eax, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_extract_i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vextractps $1, %xmm0, %eax
; VLX-NEXT: movntil %eax, (%rdi)
; VLX-NEXT: retq
@@ -563,28 +563,28 @@ define void @test_extract_i32(<4 x i32>
define void @test_extract_f64(<2 x double> %arg, double* %dst) {
; SSE2-LABEL: test_extract_f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movhpd %xmm0, (%rdi)
; SSE2-NEXT: retq
;
; SSE4A-LABEL: test_extract_f64:
-; SSE4A: # BB#0:
+; SSE4A: # %bb.0:
; SSE4A-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE4A-NEXT: movntsd %xmm0, (%rdi)
; SSE4A-NEXT: retq
;
; SSE41-LABEL: test_extract_f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movhpd %xmm0, (%rdi)
; SSE41-NEXT: retq
;
; AVX-LABEL: test_extract_f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovhpd %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_extract_f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovhpd %xmm0, (%rdi)
; VLX-NEXT: retq
%1 = extractelement <2 x double> %arg, i32 1
@@ -594,33 +594,33 @@ define void @test_extract_f64(<2 x doubl
define void @test_extract_i64(<2 x i64> %arg, i64* %dst) {
; SSE2-LABEL: test_extract_i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE2-NEXT: movq %xmm0, %rax
; SSE2-NEXT: movntiq %rax, (%rdi)
; SSE2-NEXT: retq
;
; SSE4A-LABEL: test_extract_i64:
-; SSE4A: # BB#0:
+; SSE4A: # %bb.0:
; SSE4A-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; SSE4A-NEXT: movq %xmm0, %rax
; SSE4A-NEXT: movntiq %rax, (%rdi)
; SSE4A-NEXT: retq
;
; SSE41-LABEL: test_extract_i64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pextrq $1, %xmm0, %rax
; SSE41-NEXT: movntiq %rax, (%rdi)
; SSE41-NEXT: retq
;
; AVX-LABEL: test_extract_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpextrq $1, %xmm0, %rax
; AVX-NEXT: movntiq %rax, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_extract_i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpextrq $1, %xmm0, %rax
; VLX-NEXT: movntiq %rax, (%rdi)
; VLX-NEXT: retq
@@ -633,17 +633,17 @@ define void @test_extract_i64(<2 x i64>
define void @test_arg_v4f32(<4 x float> %arg, <4 x float>* %dst) {
; SSE-LABEL: test_arg_v4f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v4f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v4f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %xmm0, (%rdi)
; VLX-NEXT: retq
store <4 x float> %arg, <4 x float>* %dst, align 16, !nontemporal !1
@@ -652,17 +652,17 @@ define void @test_arg_v4f32(<4 x float>
define void @test_arg_v4i32(<4 x i32> %arg, <4 x i32>* %dst) {
; SSE-LABEL: test_arg_v4i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v4i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v4i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %xmm0, (%rdi)
; VLX-NEXT: retq
store <4 x i32> %arg, <4 x i32>* %dst, align 16, !nontemporal !1
@@ -671,17 +671,17 @@ define void @test_arg_v4i32(<4 x i32> %a
define void @test_arg_v2f64(<2 x double> %arg, <2 x double>* %dst) {
; SSE-LABEL: test_arg_v2f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v2f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v2f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %xmm0, (%rdi)
; VLX-NEXT: retq
store <2 x double> %arg, <2 x double>* %dst, align 16, !nontemporal !1
@@ -690,17 +690,17 @@ define void @test_arg_v2f64(<2 x double>
define void @test_arg_v2i64(<2 x i64> %arg, <2 x i64>* %dst) {
; SSE-LABEL: test_arg_v2i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v2i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v2i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %xmm0, (%rdi)
; VLX-NEXT: retq
store <2 x i64> %arg, <2 x i64>* %dst, align 16, !nontemporal !1
@@ -709,17 +709,17 @@ define void @test_arg_v2i64(<2 x i64> %a
define void @test_arg_v8i16(<8 x i16> %arg, <8 x i16>* %dst) {
; SSE-LABEL: test_arg_v8i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v8i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v8i16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %xmm0, (%rdi)
; VLX-NEXT: retq
store <8 x i16> %arg, <8 x i16>* %dst, align 16, !nontemporal !1
@@ -728,17 +728,17 @@ define void @test_arg_v8i16(<8 x i16> %a
define void @test_arg_v16i8(<16 x i8> %arg, <16 x i8>* %dst) {
; SSE-LABEL: test_arg_v16i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v16i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v16i8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %xmm0, (%rdi)
; VLX-NEXT: retq
store <16 x i8> %arg, <16 x i8>* %dst, align 16, !nontemporal !1
@@ -749,19 +749,19 @@ define void @test_arg_v16i8(<16 x i8> %a
define void @test_arg_v8f32(<8 x float> %arg, <8 x float>* %dst) {
; SSE-LABEL: test_arg_v8f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm1, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v8f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v8f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
@@ -771,19 +771,19 @@ define void @test_arg_v8f32(<8 x float>
define void @test_arg_v8i32(<8 x i32> %arg, <8 x i32>* %dst) {
; SSE-LABEL: test_arg_v8i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm1, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v8i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v8i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
@@ -793,19 +793,19 @@ define void @test_arg_v8i32(<8 x i32> %a
define void @test_arg_v4f64(<4 x double> %arg, <4 x double>* %dst) {
; SSE-LABEL: test_arg_v4f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm1, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v4f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v4f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
@@ -815,19 +815,19 @@ define void @test_arg_v4f64(<4 x double>
define void @test_arg_v4i64(<4 x i64> %arg, <4 x i64>* %dst) {
; SSE-LABEL: test_arg_v4i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm1, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v4i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v4i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
@@ -837,19 +837,19 @@ define void @test_arg_v4i64(<4 x i64> %a
define void @test_arg_v16i16(<16 x i16> %arg, <16 x i16>* %dst) {
; SSE-LABEL: test_arg_v16i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm1, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v16i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v16i16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
@@ -859,19 +859,19 @@ define void @test_arg_v16i16(<16 x i16>
define void @test_arg_v32i8(<32 x i8> %arg, <32 x i8>* %dst) {
; SSE-LABEL: test_arg_v32i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movntps %xmm1, 16(%rdi)
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_arg_v32i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_arg_v32i8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vmovntps %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
@@ -885,19 +885,19 @@ define void @test_arg_v32i8(<32 x i8> %a
define void @test_op_v4f32(<4 x float> %a, <4 x float> %b, <4 x float>* %dst) {
; SSE-LABEL: test_op_v4f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: addps %xmm1, %xmm0
; SSE-NEXT: movntps %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v4f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovntps %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v4f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vaddps %xmm1, %xmm0, %xmm0
; VLX-NEXT: vmovntps %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -908,19 +908,19 @@ define void @test_op_v4f32(<4 x float> %
define void @test_op_v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32>* %dst) {
; SSE-LABEL: test_op_v4i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddd %xmm1, %xmm0
; SSE-NEXT: movntdq %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v4i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovntdq %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v4i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -931,19 +931,19 @@ define void @test_op_v4i32(<4 x i32> %a,
define void @test_op_v2f64(<2 x double> %a, <2 x double> %b, <2 x double>* %dst) {
; SSE-LABEL: test_op_v2f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: addpd %xmm1, %xmm0
; SSE-NEXT: movntpd %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v2f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovntpd %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v2f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; VLX-NEXT: vmovntpd %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -954,19 +954,19 @@ define void @test_op_v2f64(<2 x double>
define void @test_op_v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64>* %dst) {
; SSE-LABEL: test_op_v2i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddq %xmm1, %xmm0
; SSE-NEXT: movntdq %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v2i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovntdq %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v2i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -977,19 +977,19 @@ define void @test_op_v2i64(<2 x i64> %a,
define void @test_op_v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16>* %dst) {
; SSE-LABEL: test_op_v8i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddw %xmm1, %xmm0
; SSE-NEXT: movntdq %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v8i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovntdq %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v8i16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -1000,19 +1000,19 @@ define void @test_op_v8i16(<8 x i16> %a,
define void @test_op_v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8>* %dst) {
; SSE-LABEL: test_op_v16i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddb %xmm1, %xmm0
; SSE-NEXT: movntdq %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v16i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vmovntdq %xmm0, (%rdi)
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v16i8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; VLX-NEXT: vmovntdq %xmm0, (%rdi)
; VLX-NEXT: retq
@@ -1025,7 +1025,7 @@ define void @test_op_v16i8(<16 x i8> %a,
define void @test_op_v8f32(<8 x float> %a, <8 x float> %b, <8 x float>* %dst) {
; SSE-LABEL: test_op_v8f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: addps %xmm2, %xmm0
; SSE-NEXT: addps %xmm3, %xmm1
; SSE-NEXT: movntps %xmm1, 16(%rdi)
@@ -1033,14 +1033,14 @@ define void @test_op_v8f32(<8 x float> %
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v8f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vaddps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vmovntps %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v8f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vaddps %ymm1, %ymm0, %ymm0
; VLX-NEXT: vmovntps %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -1052,7 +1052,7 @@ define void @test_op_v8f32(<8 x float> %
define void @test_op_v8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32>* %dst) {
; SSE-LABEL: test_op_v8i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddd %xmm2, %xmm0
; SSE-NEXT: paddd %xmm3, %xmm1
; SSE-NEXT: movntdq %xmm1, 16(%rdi)
@@ -1060,7 +1060,7 @@ define void @test_op_v8i32(<8 x i32> %a,
; SSE-NEXT: retq
;
; AVX1-LABEL: test_op_v8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpaddd %xmm2, %xmm3, %xmm2
@@ -1071,14 +1071,14 @@ define void @test_op_v8i32(<8 x i32> %a,
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_op_v8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovntdq %ymm0, (%rdi)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; VLX-LABEL: test_op_v8i32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -1090,7 +1090,7 @@ define void @test_op_v8i32(<8 x i32> %a,
define void @test_op_v4f64(<4 x double> %a, <4 x double> %b, <4 x double>* %dst) {
; SSE-LABEL: test_op_v4f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: addpd %xmm2, %xmm0
; SSE-NEXT: addpd %xmm3, %xmm1
; SSE-NEXT: movntpd %xmm1, 16(%rdi)
@@ -1098,14 +1098,14 @@ define void @test_op_v4f64(<4 x double>
; SSE-NEXT: retq
;
; AVX-LABEL: test_op_v4f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; AVX-NEXT: vmovntpd %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_op_v4f64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; VLX-NEXT: vmovntpd %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -1117,7 +1117,7 @@ define void @test_op_v4f64(<4 x double>
define void @test_op_v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64>* %dst) {
; SSE-LABEL: test_op_v4i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddq %xmm2, %xmm0
; SSE-NEXT: paddq %xmm3, %xmm1
; SSE-NEXT: movntdq %xmm1, 16(%rdi)
@@ -1125,7 +1125,7 @@ define void @test_op_v4i64(<4 x i64> %a,
; SSE-NEXT: retq
;
; AVX1-LABEL: test_op_v4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpaddq %xmm2, %xmm3, %xmm2
@@ -1136,14 +1136,14 @@ define void @test_op_v4i64(<4 x i64> %a,
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_op_v4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovntdq %ymm0, (%rdi)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; VLX-LABEL: test_op_v4i64:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -1155,7 +1155,7 @@ define void @test_op_v4i64(<4 x i64> %a,
define void @test_op_v16i16(<16 x i16> %a, <16 x i16> %b, <16 x i16>* %dst) {
; SSE-LABEL: test_op_v16i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddw %xmm2, %xmm0
; SSE-NEXT: paddw %xmm3, %xmm1
; SSE-NEXT: movntdq %xmm1, 16(%rdi)
@@ -1163,7 +1163,7 @@ define void @test_op_v16i16(<16 x i16> %
; SSE-NEXT: retq
;
; AVX1-LABEL: test_op_v16i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpaddw %xmm2, %xmm3, %xmm2
@@ -1174,14 +1174,14 @@ define void @test_op_v16i16(<16 x i16> %
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_op_v16i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovntdq %ymm0, (%rdi)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; VLX-LABEL: test_op_v16i16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -1193,7 +1193,7 @@ define void @test_op_v16i16(<16 x i16> %
define void @test_op_v32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8>* %dst) {
; SSE-LABEL: test_op_v32i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: paddb %xmm2, %xmm0
; SSE-NEXT: paddb %xmm3, %xmm1
; SSE-NEXT: movntdq %xmm1, 16(%rdi)
@@ -1201,7 +1201,7 @@ define void @test_op_v32i8(<32 x i8> %a,
; SSE-NEXT: retq
;
; AVX1-LABEL: test_op_v32i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpaddb %xmm2, %xmm3, %xmm2
@@ -1212,14 +1212,14 @@ define void @test_op_v32i8(<32 x i8> %a,
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_op_v32i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovntdq %ymm0, (%rdi)
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; VLX-LABEL: test_op_v32i8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; VLX-NEXT: vmovntdq %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
@@ -1235,7 +1235,7 @@ define void @test_op_v32i8(<32 x i8> %a,
; probably always worth even some 20 instruction scalarization.
define void @test_unaligned_v8f32(<8 x float> %a, <8 x float> %b, <8 x float>* %dst) {
; SSE-LABEL: test_unaligned_v8f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: addps %xmm2, %xmm0
; SSE-NEXT: addps %xmm3, %xmm1
; SSE-NEXT: movntps %xmm1, 16(%rdi)
@@ -1243,14 +1243,14 @@ define void @test_unaligned_v8f32(<8 x f
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v8f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vaddps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vmovups %ymm0, (%rdi)
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
;
; VLX-LABEL: test_unaligned_v8f32:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vaddps %ymm1, %ymm0, %ymm0
; VLX-NEXT: vmovups %ymm0, (%rdi)
; VLX-NEXT: vzeroupper
Modified: llvm/trunk/test/CodeGen/X86/nontemporal-loads.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nontemporal-loads.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nontemporal-loads.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nontemporal-loads.ll Mon Dec 4 09:18:51 2017
@@ -9,22 +9,22 @@
define <4 x float> @test_v4f32(<4 x float>* %src) {
; SSE2-LABEL: test_v4f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v4f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_v4f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v4f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <4 x float>, <4 x float>* %src, align 16, !nontemporal !1
@@ -33,22 +33,22 @@ define <4 x float> @test_v4f32(<4 x floa
define <4 x i32> @test_v4i32(<4 x i32>* %src) {
; SSE2-LABEL: test_v4i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v4i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_v4i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v4i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <4 x i32>, <4 x i32>* %src, align 16, !nontemporal !1
@@ -57,22 +57,22 @@ define <4 x i32> @test_v4i32(<4 x i32>*
define <2 x double> @test_v2f64(<2 x double>* %src) {
; SSE2-LABEL: test_v2f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v2f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_v2f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v2f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <2 x double>, <2 x double>* %src, align 16, !nontemporal !1
@@ -81,22 +81,22 @@ define <2 x double> @test_v2f64(<2 x dou
define <2 x i64> @test_v2i64(<2 x i64>* %src) {
; SSE2-LABEL: test_v2i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v2i64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_v2i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v2i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <2 x i64>, <2 x i64>* %src, align 16, !nontemporal !1
@@ -105,22 +105,22 @@ define <2 x i64> @test_v2i64(<2 x i64>*
define <8 x i16> @test_v8i16(<8 x i16>* %src) {
; SSE2-LABEL: test_v8i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v8i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_v8i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v8i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <8 x i16>, <8 x i16>* %src, align 16, !nontemporal !1
@@ -129,22 +129,22 @@ define <8 x i16> @test_v8i16(<8 x i16>*
define <16 x i8> @test_v16i8(<16 x i8>* %src) {
; SSE2-LABEL: test_v16i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v16i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_v16i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_v16i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <16 x i8>, <16 x i8>* %src, align 16, !nontemporal !1
@@ -155,31 +155,31 @@ define <16 x i8> @test_v16i8(<16 x i8>*
define <8 x float> @test_v8f32(<8 x float>* %src) {
; SSE2-LABEL: test_v8f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v8f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v8f32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v8f32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v8f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <8 x float>, <8 x float>* %src, align 32, !nontemporal !1
@@ -188,31 +188,31 @@ define <8 x float> @test_v8f32(<8 x floa
define <8 x i32> @test_v8i32(<8 x i32>* %src) {
; SSE2-LABEL: test_v8i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v8i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v8i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <8 x i32>, <8 x i32>* %src, align 32, !nontemporal !1
@@ -221,31 +221,31 @@ define <8 x i32> @test_v8i32(<8 x i32>*
define <4 x double> @test_v4f64(<4 x double>* %src) {
; SSE2-LABEL: test_v4f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v4f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v4f64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v4f64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v4f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <4 x double>, <4 x double>* %src, align 32, !nontemporal !1
@@ -254,31 +254,31 @@ define <4 x double> @test_v4f64(<4 x dou
define <4 x i64> @test_v4i64(<4 x i64>* %src) {
; SSE2-LABEL: test_v4i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v4i64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v4i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <4 x i64>, <4 x i64>* %src, align 32, !nontemporal !1
@@ -287,31 +287,31 @@ define <4 x i64> @test_v4i64(<4 x i64>*
define <16 x i16> @test_v16i16(<16 x i16>* %src) {
; SSE2-LABEL: test_v16i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v16i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v16i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v16i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v16i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <16 x i16>, <16 x i16>* %src, align 32, !nontemporal !1
@@ -320,31 +320,31 @@ define <16 x i16> @test_v16i16(<16 x i16
define <32 x i8> @test_v32i8(<32 x i8>* %src) {
; SSE2-LABEL: test_v32i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v32i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v32i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v32i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v32i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <32 x i8>, <32 x i8>* %src, align 32, !nontemporal !1
@@ -355,7 +355,7 @@ define <32 x i8> @test_v32i8(<32 x i8>*
define <16 x float> @test_v16f32(<16 x float>* %src) {
; SSE2-LABEL: test_v16f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: movaps 32(%rdi), %xmm2
@@ -363,7 +363,7 @@ define <16 x float> @test_v16f32(<16 x f
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v16f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: movntdqa 32(%rdi), %xmm2
@@ -371,7 +371,7 @@ define <16 x float> @test_v16f32(<16 x f
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v16f32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -381,13 +381,13 @@ define <16 x float> @test_v16f32(<16 x f
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v16f32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v16f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <16 x float>, <16 x float>* %src, align 64, !nontemporal !1
@@ -396,7 +396,7 @@ define <16 x float> @test_v16f32(<16 x f
define <16 x i32> @test_v16i32(<16 x i32>* %src) {
; SSE2-LABEL: test_v16i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: movaps 32(%rdi), %xmm2
@@ -404,7 +404,7 @@ define <16 x i32> @test_v16i32(<16 x i32
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v16i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: movntdqa 32(%rdi), %xmm2
@@ -412,7 +412,7 @@ define <16 x i32> @test_v16i32(<16 x i32
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v16i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -422,13 +422,13 @@ define <16 x i32> @test_v16i32(<16 x i32
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v16i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v16i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <16 x i32>, <16 x i32>* %src, align 64, !nontemporal !1
@@ -437,7 +437,7 @@ define <16 x i32> @test_v16i32(<16 x i32
define <8 x double> @test_v8f64(<8 x double>* %src) {
; SSE2-LABEL: test_v8f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: movaps 32(%rdi), %xmm2
@@ -445,7 +445,7 @@ define <8 x double> @test_v8f64(<8 x dou
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v8f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: movntdqa 32(%rdi), %xmm2
@@ -453,7 +453,7 @@ define <8 x double> @test_v8f64(<8 x dou
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v8f64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -463,13 +463,13 @@ define <8 x double> @test_v8f64(<8 x dou
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v8f64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v8f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <8 x double>, <8 x double>* %src, align 64, !nontemporal !1
@@ -478,7 +478,7 @@ define <8 x double> @test_v8f64(<8 x dou
define <8 x i64> @test_v8i64(<8 x i64>* %src) {
; SSE2-LABEL: test_v8i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: movaps 32(%rdi), %xmm2
@@ -486,7 +486,7 @@ define <8 x i64> @test_v8i64(<8 x i64>*
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v8i64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: movntdqa 32(%rdi), %xmm2
@@ -494,7 +494,7 @@ define <8 x i64> @test_v8i64(<8 x i64>*
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v8i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -504,13 +504,13 @@ define <8 x i64> @test_v8i64(<8 x i64>*
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v8i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_v8i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <8 x i64>, <8 x i64>* %src, align 64, !nontemporal !1
@@ -519,7 +519,7 @@ define <8 x i64> @test_v8i64(<8 x i64>*
define <32 x i16> @test_v32i16(<32 x i16>* %src) {
; SSE2-LABEL: test_v32i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: movaps 32(%rdi), %xmm2
@@ -527,7 +527,7 @@ define <32 x i16> @test_v32i16(<32 x i16
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v32i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: movntdqa 32(%rdi), %xmm2
@@ -535,7 +535,7 @@ define <32 x i16> @test_v32i16(<32 x i16
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v32i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -545,24 +545,24 @@ define <32 x i16> @test_v32i16(<32 x i16
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v32i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX2-NEXT: retq
;
; AVX512F-LABEL: test_v32i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512F-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_v32i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vmovntdqa (%rdi), %zmm0
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: test_v32i16:
-; AVX512VL: # BB#0:
+; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512VL-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX512VL-NEXT: retq
@@ -572,7 +572,7 @@ define <32 x i16> @test_v32i16(<32 x i16
define <64 x i8> @test_v64i8(<64 x i8>* %src) {
; SSE2-LABEL: test_v64i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rdi), %xmm0
; SSE2-NEXT: movaps 16(%rdi), %xmm1
; SSE2-NEXT: movaps 32(%rdi), %xmm2
@@ -580,7 +580,7 @@ define <64 x i8> @test_v64i8(<64 x i8>*
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_v64i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm0
; SSE41-NEXT: movntdqa 16(%rdi), %xmm1
; SSE41-NEXT: movntdqa 32(%rdi), %xmm2
@@ -588,7 +588,7 @@ define <64 x i8> @test_v64i8(<64 x i8>*
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_v64i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm0
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -598,24 +598,24 @@ define <64 x i8> @test_v64i8(<64 x i8>*
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_v64i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm0
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX2-NEXT: retq
;
; AVX512F-LABEL: test_v64i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512F-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_v64i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vmovntdqa (%rdi), %zmm0
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: test_v64i8:
-; AVX512VL: # BB#0:
+; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vmovntdqa (%rdi), %ymm0
; AVX512VL-NEXT: vmovntdqa 32(%rdi), %ymm1
; AVX512VL-NEXT: retq
@@ -628,24 +628,24 @@ define <64 x i8> @test_v64i8(<64 x i8>*
define <4 x float> @test_arg_v4f32(<4 x float> %arg, <4 x float>* %src) {
; SSE2-LABEL: test_arg_v4f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: addps (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v4f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm1
; SSE41-NEXT: addps %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_v4f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm1
; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_arg_v4f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm1
; AVX512-NEXT: vaddps %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -656,24 +656,24 @@ define <4 x float> @test_arg_v4f32(<4 x
define <4 x i32> @test_arg_v4i32(<4 x i32> %arg, <4 x i32>* %src) {
; SSE2-LABEL: test_arg_v4i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddd (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v4i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm1
; SSE41-NEXT: paddd %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_v4i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm1
; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_arg_v4i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm1
; AVX512-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -684,24 +684,24 @@ define <4 x i32> @test_arg_v4i32(<4 x i3
define <2 x double> @test_arg_v2f64(<2 x double> %arg, <2 x double>* %src) {
; SSE2-LABEL: test_arg_v2f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: addpd (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v2f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm1
; SSE41-NEXT: addpd %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_v2f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm1
; AVX-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_arg_v2f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm1
; AVX512-NEXT: vaddpd %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -712,24 +712,24 @@ define <2 x double> @test_arg_v2f64(<2 x
define <2 x i64> @test_arg_v2i64(<2 x i64> %arg, <2 x i64>* %src) {
; SSE2-LABEL: test_arg_v2i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddq (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v2i64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm1
; SSE41-NEXT: paddq %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_v2i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm1
; AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_arg_v2i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm1
; AVX512-NEXT: vpaddq %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -740,24 +740,24 @@ define <2 x i64> @test_arg_v2i64(<2 x i6
define <8 x i16> @test_arg_v8i16(<8 x i16> %arg, <8 x i16>* %src) {
; SSE2-LABEL: test_arg_v8i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddw (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v8i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm1
; SSE41-NEXT: paddw %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_v8i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm1
; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_arg_v8i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm1
; AVX512-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -768,24 +768,24 @@ define <8 x i16> @test_arg_v8i16(<8 x i1
define <16 x i8> @test_arg_v16i8(<16 x i8> %arg, <16 x i8>* %src) {
; SSE2-LABEL: test_arg_v16i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddb (%rdi), %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v16i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa (%rdi), %xmm1
; SSE41-NEXT: paddb %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: test_arg_v16i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovntdqa (%rdi), %xmm1
; AVX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_arg_v16i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %xmm1
; AVX512-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -798,13 +798,13 @@ define <16 x i8> @test_arg_v16i8(<16 x i
define <8 x float> @test_arg_v8f32(<8 x float> %arg, <8 x float>* %src) {
; SSE2-LABEL: test_arg_v8f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: addps (%rdi), %xmm0
; SSE2-NEXT: addps 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v8f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 16(%rdi), %xmm2
; SSE41-NEXT: movntdqa (%rdi), %xmm3
; SSE41-NEXT: addps %xmm3, %xmm0
@@ -812,7 +812,7 @@ define <8 x float> @test_arg_v8f32(<8 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v8f32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm1
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm2
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
@@ -820,13 +820,13 @@ define <8 x float> @test_arg_v8f32(<8 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v8f32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm1
; AVX2-NEXT: vaddps %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v8f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm1
; AVX512-NEXT: vaddps %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -837,13 +837,13 @@ define <8 x float> @test_arg_v8f32(<8 x
define <8 x i32> @test_arg_v8i32(<8 x i32> %arg, <8 x i32>* %src) {
; SSE2-LABEL: test_arg_v8i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddd (%rdi), %xmm0
; SSE2-NEXT: paddd 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v8i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 16(%rdi), %xmm2
; SSE41-NEXT: movntdqa (%rdi), %xmm3
; SSE41-NEXT: paddd %xmm3, %xmm0
@@ -851,7 +851,7 @@ define <8 x i32> @test_arg_v8i32(<8 x i3
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm1
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
@@ -861,13 +861,13 @@ define <8 x i32> @test_arg_v8i32(<8 x i3
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm1
; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v8i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm1
; AVX512-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -878,13 +878,13 @@ define <8 x i32> @test_arg_v8i32(<8 x i3
define <4 x double> @test_arg_v4f64(<4 x double> %arg, <4 x double>* %src) {
; SSE2-LABEL: test_arg_v4f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: addpd (%rdi), %xmm0
; SSE2-NEXT: addpd 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v4f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 16(%rdi), %xmm2
; SSE41-NEXT: movntdqa (%rdi), %xmm3
; SSE41-NEXT: addpd %xmm3, %xmm0
@@ -892,7 +892,7 @@ define <4 x double> @test_arg_v4f64(<4 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v4f64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm1
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm2
; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
@@ -900,13 +900,13 @@ define <4 x double> @test_arg_v4f64(<4 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v4f64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm1
; AVX2-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v4f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm1
; AVX512-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -917,13 +917,13 @@ define <4 x double> @test_arg_v4f64(<4 x
define <4 x i64> @test_arg_v4i64(<4 x i64> %arg, <4 x i64>* %src) {
; SSE2-LABEL: test_arg_v4i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddq (%rdi), %xmm0
; SSE2-NEXT: paddq 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v4i64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 16(%rdi), %xmm2
; SSE41-NEXT: movntdqa (%rdi), %xmm3
; SSE41-NEXT: paddq %xmm3, %xmm0
@@ -931,7 +931,7 @@ define <4 x i64> @test_arg_v4i64(<4 x i6
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm1
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
@@ -941,13 +941,13 @@ define <4 x i64> @test_arg_v4i64(<4 x i6
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm1
; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v4i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm1
; AVX512-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -958,13 +958,13 @@ define <4 x i64> @test_arg_v4i64(<4 x i6
define <16 x i16> @test_arg_v16i16(<16 x i16> %arg, <16 x i16>* %src) {
; SSE2-LABEL: test_arg_v16i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddw (%rdi), %xmm0
; SSE2-NEXT: paddw 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v16i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 16(%rdi), %xmm2
; SSE41-NEXT: movntdqa (%rdi), %xmm3
; SSE41-NEXT: paddw %xmm3, %xmm0
@@ -972,7 +972,7 @@ define <16 x i16> @test_arg_v16i16(<16 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v16i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm1
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
@@ -982,13 +982,13 @@ define <16 x i16> @test_arg_v16i16(<16 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v16i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm1
; AVX2-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v16i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm1
; AVX512-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -999,13 +999,13 @@ define <16 x i16> @test_arg_v16i16(<16 x
define <32 x i8> @test_arg_v32i8(<32 x i8> %arg, <32 x i8>* %src) {
; SSE2-LABEL: test_arg_v32i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddb (%rdi), %xmm0
; SSE2-NEXT: paddb 16(%rdi), %xmm1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v32i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 16(%rdi), %xmm2
; SSE41-NEXT: movntdqa (%rdi), %xmm3
; SSE41-NEXT: paddb %xmm3, %xmm0
@@ -1013,7 +1013,7 @@ define <32 x i8> @test_arg_v32i8(<32 x i
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v32i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa (%rdi), %xmm1
; AVX1-NEXT: vmovntdqa 16(%rdi), %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
@@ -1023,13 +1023,13 @@ define <32 x i8> @test_arg_v32i8(<32 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v32i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa (%rdi), %ymm1
; AVX2-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v32i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %ymm1
; AVX512-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -1042,7 +1042,7 @@ define <32 x i8> @test_arg_v32i8(<32 x i
define <16 x float> @test_arg_v16f32(<16 x float> %arg, <16 x float>* %src) {
; SSE2-LABEL: test_arg_v16f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: addps (%rdi), %xmm0
; SSE2-NEXT: addps 16(%rdi), %xmm1
; SSE2-NEXT: addps 32(%rdi), %xmm2
@@ -1050,7 +1050,7 @@ define <16 x float> @test_arg_v16f32(<16
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v16f32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 48(%rdi), %xmm4
; SSE41-NEXT: movntdqa 32(%rdi), %xmm5
; SSE41-NEXT: movntdqa 16(%rdi), %xmm6
@@ -1062,7 +1062,7 @@ define <16 x float> @test_arg_v16f32(<16
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v16f32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa 32(%rdi), %xmm2
; AVX1-NEXT: vmovntdqa 48(%rdi), %xmm3
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
@@ -1074,7 +1074,7 @@ define <16 x float> @test_arg_v16f32(<16
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v16f32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX2-NEXT: vmovntdqa (%rdi), %ymm3
; AVX2-NEXT: vaddps %ymm3, %ymm0, %ymm0
@@ -1082,7 +1082,7 @@ define <16 x float> @test_arg_v16f32(<16
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v16f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm1
; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retq
@@ -1093,7 +1093,7 @@ define <16 x float> @test_arg_v16f32(<16
define <16 x i32> @test_arg_v16i32(<16 x i32> %arg, <16 x i32>* %src) {
; SSE2-LABEL: test_arg_v16i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddd (%rdi), %xmm0
; SSE2-NEXT: paddd 16(%rdi), %xmm1
; SSE2-NEXT: paddd 32(%rdi), %xmm2
@@ -1101,7 +1101,7 @@ define <16 x i32> @test_arg_v16i32(<16 x
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v16i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 48(%rdi), %xmm4
; SSE41-NEXT: movntdqa 32(%rdi), %xmm5
; SSE41-NEXT: movntdqa 16(%rdi), %xmm6
@@ -1113,7 +1113,7 @@ define <16 x i32> @test_arg_v16i32(<16 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v16i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa 32(%rdi), %xmm2
; AVX1-NEXT: vmovntdqa 48(%rdi), %xmm3
; AVX1-NEXT: vmovntdqa (%rdi), %xmm4
@@ -1129,7 +1129,7 @@ define <16 x i32> @test_arg_v16i32(<16 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v16i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX2-NEXT: vmovntdqa (%rdi), %ymm3
; AVX2-NEXT: vpaddd %ymm3, %ymm0, %ymm0
@@ -1137,7 +1137,7 @@ define <16 x i32> @test_arg_v16i32(<16 x
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v16i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm1
; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retq
@@ -1148,7 +1148,7 @@ define <16 x i32> @test_arg_v16i32(<16 x
define <8 x double> @test_arg_v8f64(<8 x double> %arg, <8 x double>* %src) {
; SSE2-LABEL: test_arg_v8f64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: addpd (%rdi), %xmm0
; SSE2-NEXT: addpd 16(%rdi), %xmm1
; SSE2-NEXT: addpd 32(%rdi), %xmm2
@@ -1156,7 +1156,7 @@ define <8 x double> @test_arg_v8f64(<8 x
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v8f64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 48(%rdi), %xmm4
; SSE41-NEXT: movntdqa 32(%rdi), %xmm5
; SSE41-NEXT: movntdqa 16(%rdi), %xmm6
@@ -1168,7 +1168,7 @@ define <8 x double> @test_arg_v8f64(<8 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v8f64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa 32(%rdi), %xmm2
; AVX1-NEXT: vmovntdqa 48(%rdi), %xmm3
; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
@@ -1180,7 +1180,7 @@ define <8 x double> @test_arg_v8f64(<8 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v8f64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX2-NEXT: vmovntdqa (%rdi), %ymm3
; AVX2-NEXT: vaddpd %ymm3, %ymm0, %ymm0
@@ -1188,7 +1188,7 @@ define <8 x double> @test_arg_v8f64(<8 x
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v8f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm1
; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retq
@@ -1199,7 +1199,7 @@ define <8 x double> @test_arg_v8f64(<8 x
define <8 x i64> @test_arg_v8i64(<8 x i64> %arg, <8 x i64>* %src) {
; SSE2-LABEL: test_arg_v8i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddq (%rdi), %xmm0
; SSE2-NEXT: paddq 16(%rdi), %xmm1
; SSE2-NEXT: paddq 32(%rdi), %xmm2
@@ -1207,7 +1207,7 @@ define <8 x i64> @test_arg_v8i64(<8 x i6
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v8i64:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 48(%rdi), %xmm4
; SSE41-NEXT: movntdqa 32(%rdi), %xmm5
; SSE41-NEXT: movntdqa 16(%rdi), %xmm6
@@ -1219,7 +1219,7 @@ define <8 x i64> @test_arg_v8i64(<8 x i6
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v8i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa 32(%rdi), %xmm2
; AVX1-NEXT: vmovntdqa 48(%rdi), %xmm3
; AVX1-NEXT: vmovntdqa (%rdi), %xmm4
@@ -1235,7 +1235,7 @@ define <8 x i64> @test_arg_v8i64(<8 x i6
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v8i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX2-NEXT: vmovntdqa (%rdi), %ymm3
; AVX2-NEXT: vpaddq %ymm3, %ymm0, %ymm0
@@ -1243,7 +1243,7 @@ define <8 x i64> @test_arg_v8i64(<8 x i6
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_arg_v8i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovntdqa (%rdi), %zmm1
; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retq
@@ -1254,7 +1254,7 @@ define <8 x i64> @test_arg_v8i64(<8 x i6
define <32 x i16> @test_arg_v32i16(<32 x i16> %arg, <32 x i16>* %src) {
; SSE2-LABEL: test_arg_v32i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddw (%rdi), %xmm0
; SSE2-NEXT: paddw 16(%rdi), %xmm1
; SSE2-NEXT: paddw 32(%rdi), %xmm2
@@ -1262,7 +1262,7 @@ define <32 x i16> @test_arg_v32i16(<32 x
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v32i16:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 48(%rdi), %xmm4
; SSE41-NEXT: movntdqa 32(%rdi), %xmm5
; SSE41-NEXT: movntdqa 16(%rdi), %xmm6
@@ -1274,7 +1274,7 @@ define <32 x i16> @test_arg_v32i16(<32 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v32i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa 32(%rdi), %xmm2
; AVX1-NEXT: vmovntdqa 48(%rdi), %xmm3
; AVX1-NEXT: vmovntdqa (%rdi), %xmm4
@@ -1290,7 +1290,7 @@ define <32 x i16> @test_arg_v32i16(<32 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v32i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX2-NEXT: vmovntdqa (%rdi), %ymm3
; AVX2-NEXT: vpaddw %ymm3, %ymm0, %ymm0
@@ -1298,7 +1298,7 @@ define <32 x i16> @test_arg_v32i16(<32 x
; AVX2-NEXT: retq
;
; AVX512F-LABEL: test_arg_v32i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX512F-NEXT: vmovntdqa (%rdi), %ymm3
; AVX512F-NEXT: vpaddw %ymm3, %ymm0, %ymm0
@@ -1306,13 +1306,13 @@ define <32 x i16> @test_arg_v32i16(<32 x
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_arg_v32i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vmovntdqa (%rdi), %zmm1
; AVX512BW-NEXT: vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: test_arg_v32i16:
-; AVX512VL: # BB#0:
+; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX512VL-NEXT: vmovntdqa (%rdi), %ymm3
; AVX512VL-NEXT: vpaddw %ymm3, %ymm0, %ymm0
@@ -1325,7 +1325,7 @@ define <32 x i16> @test_arg_v32i16(<32 x
define <64 x i8> @test_arg_v64i8(<64 x i8> %arg, <64 x i8>* %src) {
; SSE2-LABEL: test_arg_v64i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: paddb (%rdi), %xmm0
; SSE2-NEXT: paddb 16(%rdi), %xmm1
; SSE2-NEXT: paddb 32(%rdi), %xmm2
@@ -1333,7 +1333,7 @@ define <64 x i8> @test_arg_v64i8(<64 x i
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_arg_v64i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movntdqa 48(%rdi), %xmm4
; SSE41-NEXT: movntdqa 32(%rdi), %xmm5
; SSE41-NEXT: movntdqa 16(%rdi), %xmm6
@@ -1345,7 +1345,7 @@ define <64 x i8> @test_arg_v64i8(<64 x i
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_arg_v64i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovntdqa 32(%rdi), %xmm2
; AVX1-NEXT: vmovntdqa 48(%rdi), %xmm3
; AVX1-NEXT: vmovntdqa (%rdi), %xmm4
@@ -1361,7 +1361,7 @@ define <64 x i8> @test_arg_v64i8(<64 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_arg_v64i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX2-NEXT: vmovntdqa (%rdi), %ymm3
; AVX2-NEXT: vpaddb %ymm3, %ymm0, %ymm0
@@ -1369,7 +1369,7 @@ define <64 x i8> @test_arg_v64i8(<64 x i
; AVX2-NEXT: retq
;
; AVX512F-LABEL: test_arg_v64i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX512F-NEXT: vmovntdqa (%rdi), %ymm3
; AVX512F-NEXT: vpaddb %ymm3, %ymm0, %ymm0
@@ -1377,13 +1377,13 @@ define <64 x i8> @test_arg_v64i8(<64 x i
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_arg_v64i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vmovntdqa (%rdi), %zmm1
; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: test_arg_v64i8:
-; AVX512VL: # BB#0:
+; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vmovntdqa 32(%rdi), %ymm2
; AVX512VL-NEXT: vmovntdqa (%rdi), %ymm3
; AVX512VL-NEXT: vpaddb %ymm3, %ymm0, %ymm0
@@ -1399,17 +1399,17 @@ define <64 x i8> @test_arg_v64i8(<64 x i
define <4 x float> @test_unaligned_v4f32(<4 x float>* %src) {
; SSE-LABEL: test_unaligned_v4f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v4f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v4f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <4 x float>, <4 x float>* %src, align 1, !nontemporal !1
@@ -1418,17 +1418,17 @@ define <4 x float> @test_unaligned_v4f32
define <4 x i32> @test_unaligned_v4i32(<4 x i32>* %src) {
; SSE-LABEL: test_unaligned_v4i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v4i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v4i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <4 x i32>, <4 x i32>* %src, align 1, !nontemporal !1
@@ -1437,17 +1437,17 @@ define <4 x i32> @test_unaligned_v4i32(<
define <2 x double> @test_unaligned_v2f64(<2 x double>* %src) {
; SSE-LABEL: test_unaligned_v2f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v2f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v2f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <2 x double>, <2 x double>* %src, align 1, !nontemporal !1
@@ -1456,17 +1456,17 @@ define <2 x double> @test_unaligned_v2f6
define <2 x i64> @test_unaligned_v2i64(<2 x i64>* %src) {
; SSE-LABEL: test_unaligned_v2i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v2i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v2i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <2 x i64>, <2 x i64>* %src, align 1, !nontemporal !1
@@ -1475,17 +1475,17 @@ define <2 x i64> @test_unaligned_v2i64(<
define <8 x i16> @test_unaligned_v8i16(<8 x i16>* %src) {
; SSE-LABEL: test_unaligned_v8i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v8i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v8i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <8 x i16>, <8 x i16>* %src, align 1, !nontemporal !1
@@ -1494,17 +1494,17 @@ define <8 x i16> @test_unaligned_v8i16(<
define <16 x i8> @test_unaligned_v16i8(<16 x i8>* %src) {
; SSE-LABEL: test_unaligned_v16i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v16i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v16i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %xmm0
; AVX512-NEXT: retq
%1 = load <16 x i8>, <16 x i8>* %src, align 1, !nontemporal !1
@@ -1515,18 +1515,18 @@ define <16 x i8> @test_unaligned_v16i8(<
define <8 x float> @test_unaligned_v8f32(<8 x float>* %src) {
; SSE-LABEL: test_unaligned_v8f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v8f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v8f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <8 x float>, <8 x float>* %src, align 1, !nontemporal !1
@@ -1535,18 +1535,18 @@ define <8 x float> @test_unaligned_v8f32
define <8 x i32> @test_unaligned_v8i32(<8 x i32>* %src) {
; SSE-LABEL: test_unaligned_v8i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v8i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v8i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <8 x i32>, <8 x i32>* %src, align 1, !nontemporal !1
@@ -1555,18 +1555,18 @@ define <8 x i32> @test_unaligned_v8i32(<
define <4 x double> @test_unaligned_v4f64(<4 x double>* %src) {
; SSE-LABEL: test_unaligned_v4f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v4f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v4f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <4 x double>, <4 x double>* %src, align 1, !nontemporal !1
@@ -1575,18 +1575,18 @@ define <4 x double> @test_unaligned_v4f6
define <4 x i64> @test_unaligned_v4i64(<4 x i64>* %src) {
; SSE-LABEL: test_unaligned_v4i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v4i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v4i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <4 x i64>, <4 x i64>* %src, align 1, !nontemporal !1
@@ -1595,18 +1595,18 @@ define <4 x i64> @test_unaligned_v4i64(<
define <16 x i16> @test_unaligned_v16i16(<16 x i16>* %src) {
; SSE-LABEL: test_unaligned_v16i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v16i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v16i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <16 x i16>, <16 x i16>* %src, align 1, !nontemporal !1
@@ -1615,18 +1615,18 @@ define <16 x i16> @test_unaligned_v16i16
define <32 x i8> @test_unaligned_v32i8(<32 x i8>* %src) {
; SSE-LABEL: test_unaligned_v32i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v32i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v32i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %ymm0
; AVX512-NEXT: retq
%1 = load <32 x i8>, <32 x i8>* %src, align 1, !nontemporal !1
@@ -1637,7 +1637,7 @@ define <32 x i8> @test_unaligned_v32i8(<
define <16 x float> @test_unaligned_v16f32(<16 x float>* %src) {
; SSE-LABEL: test_unaligned_v16f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: movups 32(%rdi), %xmm2
@@ -1645,13 +1645,13 @@ define <16 x float> @test_unaligned_v16f
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v16f32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: vmovups 32(%rdi), %ymm1
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v16f32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <16 x float>, <16 x float>* %src, align 1, !nontemporal !1
@@ -1660,7 +1660,7 @@ define <16 x float> @test_unaligned_v16f
define <16 x i32> @test_unaligned_v16i32(<16 x i32>* %src) {
; SSE-LABEL: test_unaligned_v16i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: movups 32(%rdi), %xmm2
@@ -1668,13 +1668,13 @@ define <16 x i32> @test_unaligned_v16i32
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v16i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: vmovups 32(%rdi), %ymm1
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v16i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <16 x i32>, <16 x i32>* %src, align 1, !nontemporal !1
@@ -1683,7 +1683,7 @@ define <16 x i32> @test_unaligned_v16i32
define <8 x double> @test_unaligned_v8f64(<8 x double>* %src) {
; SSE-LABEL: test_unaligned_v8f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: movups 32(%rdi), %xmm2
@@ -1691,13 +1691,13 @@ define <8 x double> @test_unaligned_v8f6
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v8f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: vmovups 32(%rdi), %ymm1
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v8f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <8 x double>, <8 x double>* %src, align 1, !nontemporal !1
@@ -1706,7 +1706,7 @@ define <8 x double> @test_unaligned_v8f6
define <8 x i64> @test_unaligned_v8i64(<8 x i64>* %src) {
; SSE-LABEL: test_unaligned_v8i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: movups 32(%rdi), %xmm2
@@ -1714,13 +1714,13 @@ define <8 x i64> @test_unaligned_v8i64(<
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v8i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: vmovups 32(%rdi), %ymm1
; AVX-NEXT: retq
;
; AVX512-LABEL: test_unaligned_v8i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovups (%rdi), %zmm0
; AVX512-NEXT: retq
%1 = load <8 x i64>, <8 x i64>* %src, align 1, !nontemporal !1
@@ -1729,7 +1729,7 @@ define <8 x i64> @test_unaligned_v8i64(<
define <32 x i16> @test_unaligned_v32i16(<32 x i16>* %src) {
; SSE-LABEL: test_unaligned_v32i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: movups 32(%rdi), %xmm2
@@ -1737,24 +1737,24 @@ define <32 x i16> @test_unaligned_v32i16
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v32i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: vmovups 32(%rdi), %ymm1
; AVX-NEXT: retq
;
; AVX512F-LABEL: test_unaligned_v32i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vmovups (%rdi), %ymm0
; AVX512F-NEXT: vmovups 32(%rdi), %ymm1
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_unaligned_v32i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vmovups (%rdi), %zmm0
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: test_unaligned_v32i16:
-; AVX512VL: # BB#0:
+; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vmovups (%rdi), %ymm0
; AVX512VL-NEXT: vmovups 32(%rdi), %ymm1
; AVX512VL-NEXT: retq
@@ -1764,7 +1764,7 @@ define <32 x i16> @test_unaligned_v32i16
define <64 x i8> @test_unaligned_v64i8(<64 x i8>* %src) {
; SSE-LABEL: test_unaligned_v64i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movups (%rdi), %xmm0
; SSE-NEXT: movups 16(%rdi), %xmm1
; SSE-NEXT: movups 32(%rdi), %xmm2
@@ -1772,24 +1772,24 @@ define <64 x i8> @test_unaligned_v64i8(<
; SSE-NEXT: retq
;
; AVX-LABEL: test_unaligned_v64i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovups (%rdi), %ymm0
; AVX-NEXT: vmovups 32(%rdi), %ymm1
; AVX-NEXT: retq
;
; AVX512F-LABEL: test_unaligned_v64i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vmovups (%rdi), %ymm0
; AVX512F-NEXT: vmovups 32(%rdi), %ymm1
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: test_unaligned_v64i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vmovups (%rdi), %zmm0
; AVX512BW-NEXT: retq
;
; AVX512VL-LABEL: test_unaligned_v64i8:
-; AVX512VL: # BB#0:
+; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vmovups (%rdi), %ymm0
; AVX512VL-NEXT: vmovups 32(%rdi), %ymm1
; AVX512VL-NEXT: retq
@@ -1799,7 +1799,7 @@ define <64 x i8> @test_unaligned_v64i8(<
define <16 x i32> @test_masked_v16i32(i8 * %addr, <16 x i32> %old, <16 x i32> %mask1) {
; SSE2-LABEL: test_masked_v16i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqa %xmm0, %xmm10
; SSE2-NEXT: pxor %xmm12, %xmm12
; SSE2-NEXT: pcmpeqd %xmm12, %xmm7
@@ -1832,7 +1832,7 @@ define <16 x i32> @test_masked_v16i32(i8
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_masked_v16i32:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movdqa %xmm0, %xmm8
; SSE41-NEXT: pxor %xmm0, %xmm0
; SSE41-NEXT: pcmpeqd %xmm0, %xmm7
@@ -1859,7 +1859,7 @@ define <16 x i32> @test_masked_v16i32(i8
; SSE41-NEXT: retq
;
; AVX1-LABEL: test_masked_v16i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
; AVX1-NEXT: vpxor %xmm5, %xmm5, %xmm5
; AVX1-NEXT: vpcmpeqd %xmm5, %xmm4, %xmm4
@@ -1885,7 +1885,7 @@ define <16 x i32> @test_masked_v16i32(i8
; AVX1-NEXT: retq
;
; AVX2-LABEL: test_masked_v16i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4
; AVX2-NEXT: vpcmpeqd %ymm4, %ymm3, %ymm3
; AVX2-NEXT: vpcmpeqd %ymm5, %ymm5, %ymm5
@@ -1899,7 +1899,7 @@ define <16 x i32> @test_masked_v16i32(i8
; AVX2-NEXT: retq
;
; AVX512-LABEL: test_masked_v16i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX512-NEXT: vpcmpneqd %zmm2, %zmm1, %k1
; AVX512-NEXT: vmovntdqa (%rdi), %zmm1
Modified: llvm/trunk/test/CodeGen/X86/nontemporal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nontemporal.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nontemporal.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nontemporal.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define void @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4 x i32> %F, <8 x i16> %G, <16 x i8> %H, i64 %I) nounwind {
; X32-SSE-LABEL: f:
-; X32-SSE: # BB#0:
+; X32-SSE: # %bb.0:
; X32-SSE-NEXT: pushl %ebp
; X32-SSE-NEXT: movl %esp, %ebp
; X32-SSE-NEXT: andl $-16, %esp
@@ -36,7 +36,7 @@ define void @f(<4 x float> %A, i8* %B, <
; X32-SSE-NEXT: retl
;
; X32-AVX-LABEL: f:
-; X32-AVX: # BB#0:
+; X32-AVX: # %bb.0:
; X32-AVX-NEXT: pushl %ebp
; X32-AVX-NEXT: movl %esp, %ebp
; X32-AVX-NEXT: andl $-16, %esp
@@ -66,7 +66,7 @@ define void @f(<4 x float> %A, i8* %B, <
; X32-AVX-NEXT: retl
;
; X64-SSE-LABEL: f:
-; X64-SSE: # BB#0:
+; X64-SSE: # %bb.0:
; X64-SSE-NEXT: addps {{.*}}(%rip), %xmm0
; X64-SSE-NEXT: movntps %xmm0, (%rdi)
; X64-SSE-NEXT: paddq {{.*}}(%rip), %xmm2
@@ -84,7 +84,7 @@ define void @f(<4 x float> %A, i8* %B, <
; X64-SSE-NEXT: retq
;
; X64-AVX-LABEL: f:
-; X64-AVX: # BB#0:
+; X64-AVX: # %bb.0:
; X64-AVX-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0
; X64-AVX-NEXT: vmovntps %xmm0, (%rdi)
; X64-AVX-NEXT: vpaddq {{.*}}(%rip), %xmm2, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/nosse-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/nosse-vector.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/nosse-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/nosse-vector.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define void @fadd_2f64_mem(<2 x double>* %p0, <2 x double>* %p1, <2 x double>* %p2) nounwind {
; X32-LABEL: fadd_2f64_mem:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
@@ -18,7 +18,7 @@ define void @fadd_2f64_mem(<2 x double>*
; X32-NEXT: retl
;
; X64-LABEL: fadd_2f64_mem:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: fldl 8(%rdi)
; X64-NEXT: fldl (%rdi)
; X64-NEXT: faddl (%rsi)
@@ -36,7 +36,7 @@ define void @fadd_2f64_mem(<2 x double>*
define void @fadd_4f32_mem(<4 x float>* %p0, <4 x float>* %p1, <4 x float>* %p2) nounwind {
; X32-LABEL: fadd_4f32_mem:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
@@ -59,7 +59,7 @@ define void @fadd_4f32_mem(<4 x float>*
; X32-NEXT: retl
;
; X64-LABEL: fadd_4f32_mem:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: flds 12(%rdi)
; X64-NEXT: flds 8(%rdi)
; X64-NEXT: flds 4(%rdi)
@@ -86,7 +86,7 @@ define void @fadd_4f32_mem(<4 x float>*
define void @fdiv_4f32_mem(<4 x float>* %p0, <4 x float>* %p1, <4 x float>* %p2) nounwind {
; X32-LABEL: fdiv_4f32_mem:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
@@ -109,7 +109,7 @@ define void @fdiv_4f32_mem(<4 x float>*
; X32-NEXT: retl
;
; X64-LABEL: fdiv_4f32_mem:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: flds 12(%rdi)
; X64-NEXT: flds 8(%rdi)
; X64-NEXT: flds 4(%rdi)
@@ -136,7 +136,7 @@ define void @fdiv_4f32_mem(<4 x float>*
define void @sitofp_4i64_4f32_mem(<4 x i64>* %p0, <4 x float>* %p1) nounwind {
; X32-LABEL: sitofp_4i64_4f32_mem:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %ebp
; X32-NEXT: movl %esp, %ebp
; X32-NEXT: pushl %ebx
@@ -182,7 +182,7 @@ define void @sitofp_4i64_4f32_mem(<4 x i
; X32-NEXT: retl
;
; X64-LABEL: sitofp_4i64_4f32_mem:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq 24(%rdi), %rax
; X64-NEXT: movq 16(%rdi), %rcx
; X64-NEXT: movq (%rdi), %rdx
@@ -208,7 +208,7 @@ define void @sitofp_4i64_4f32_mem(<4 x i
define void @sitofp_4i32_4f32_mem(<4 x i32>* %p0, <4 x float>* %p1) nounwind {
; X32-LABEL: sitofp_4i32_4f32_mem:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi
; X32-NEXT: subl $16, %esp
@@ -236,7 +236,7 @@ define void @sitofp_4i32_4f32_mem(<4 x i
; X32-NEXT: retl
;
; X64-LABEL: sitofp_4i32_4f32_mem:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl 12(%rdi), %eax
; X64-NEXT: movl 8(%rdi), %ecx
; X64-NEXT: movl (%rdi), %edx
@@ -262,7 +262,7 @@ define void @sitofp_4i32_4f32_mem(<4 x i
define void @add_2i64_mem(<2 x i64>* %p0, <2 x i64>* %p1, <2 x i64>* %p2) nounwind {
; X32-LABEL: add_2i64_mem:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %ebx
; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi
@@ -287,7 +287,7 @@ define void @add_2i64_mem(<2 x i64>* %p0
; X32-NEXT: retl
;
; X64-LABEL: add_2i64_mem:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: movq 8(%rdi), %rcx
; X64-NEXT: addq (%rsi), %rax
@@ -304,7 +304,7 @@ define void @add_2i64_mem(<2 x i64>* %p0
define void @add_4i32_mem(<4 x i32>* %p0, <4 x i32>* %p1, <4 x i32>* %p2) nounwind {
; X32-LABEL: add_4i32_mem:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %ebx
; X32-NEXT: pushl %edi
; X32-NEXT: pushl %esi
@@ -329,7 +329,7 @@ define void @add_4i32_mem(<4 x i32>* %p0
; X32-NEXT: retl
;
; X64-LABEL: add_4i32_mem:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl 12(%rdi), %eax
; X64-NEXT: movl 8(%rdi), %ecx
; X64-NEXT: movl (%rdi), %r8d
Modified: llvm/trunk/test/CodeGen/X86/not-and-simplify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/not-and-simplify.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/not-and-simplify.ll (original)
+++ llvm/trunk/test/CodeGen/X86/not-and-simplify.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define i32 @shrink_xor_constant1(i32 %x) {
; ALL-LABEL: shrink_xor_constant1:
-; ALL: # BB#0:
+; ALL: # %bb.0:
; ALL-NEXT: shrl $31, %edi
; ALL-NEXT: xorl $1, %edi
; ALL-NEXT: movl %edi, %eax
@@ -19,7 +19,7 @@ define i32 @shrink_xor_constant1(i32 %x)
define <4 x i32> @shrink_xor_constant1_splat(<4 x i32> %x) {
; ALL-LABEL: shrink_xor_constant1_splat:
-; ALL: # BB#0:
+; ALL: # %bb.0:
; ALL-NEXT: psrld $31, %xmm0
; ALL-NEXT: pandn {{.*}}(%rip), %xmm0
; ALL-NEXT: retq
@@ -33,7 +33,7 @@ define <4 x i32> @shrink_xor_constant1_s
define i8 @shrink_xor_constant2(i8 %x) {
; ALL-LABEL: shrink_xor_constant2:
-; ALL: # BB#0:
+; ALL: # %bb.0:
; ALL-NEXT: shlb $5, %dil
; ALL-NEXT: xorb $-32, %dil
; ALL-NEXT: movl %edi, %eax
@@ -46,7 +46,7 @@ define i8 @shrink_xor_constant2(i8 %x) {
define <16 x i8> @shrink_xor_constant2_splat(<16 x i8> %x) {
; ALL-LABEL: shrink_xor_constant2_splat:
-; ALL: # BB#0:
+; ALL: # %bb.0:
; ALL-NEXT: movaps {{.*#+}} xmm0 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
; ALL-NEXT: retq
%sh = shl <16 x i8> %x, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
Modified: llvm/trunk/test/CodeGen/X86/oddshuffles.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/oddshuffles.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/oddshuffles.ll (original)
+++ llvm/trunk/test/CodeGen/X86/oddshuffles.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define void @v3i64(<2 x i64> %a, <2 x i64> %b, <3 x i64>* %p) nounwind {
; SSE2-LABEL: v3i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE2-NEXT: movq %xmm2, 16(%rdi)
@@ -15,21 +15,21 @@ define void @v3i64(<2 x i64> %a, <2 x i6
; SSE2-NEXT: retq
;
; SSE42-LABEL: v3i64:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pextrq $1, %xmm0, 16(%rdi)
; SSE42-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE42-NEXT: movdqa %xmm0, (%rdi)
; SSE42-NEXT: retq
;
; AVX1-LABEL: v3i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm0[0],xmm1[0]
; AVX1-NEXT: vpextrq $1, %xmm0, 16(%rdi)
; AVX1-NEXT: vmovdqa %xmm1, (%rdi)
; AVX1-NEXT: retq
;
; AVX2-LABEL: v3i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,1,3]
@@ -39,7 +39,7 @@ define void @v3i64(<2 x i64> %a, <2 x i6
; AVX2-NEXT: retq
;
; XOP-LABEL: v3i64:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm0[0],xmm1[0]
; XOP-NEXT: vpextrq $1, %xmm0, 16(%rdi)
; XOP-NEXT: vmovdqa %xmm1, (%rdi)
@@ -50,21 +50,21 @@ define void @v3i64(<2 x i64> %a, <2 x i6
}
define void @v3f64(<2 x double> %a, <2 x double> %b, <3 x double>* %p) nounwind {
; SSE-LABEL: v3f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movhpd %xmm0, 16(%rdi)
; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: movapd %xmm0, (%rdi)
; SSE-NEXT: retq
;
; AVX1-LABEL: v3f64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm0[0],xmm1[0]
; AVX1-NEXT: vmovhpd %xmm0, 16(%rdi)
; AVX1-NEXT: vmovapd %xmm1, (%rdi)
; AVX1-NEXT: retq
;
; AVX2-LABEL: v3f64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,2,1,3]
@@ -74,7 +74,7 @@ define void @v3f64(<2 x double> %a, <2 x
; AVX2-NEXT: retq
;
; XOP-LABEL: v3f64:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm0[0],xmm1[0]
; XOP-NEXT: vmovhpd %xmm0, 16(%rdi)
; XOP-NEXT: vmovapd %xmm1, (%rdi)
@@ -86,7 +86,7 @@ define void @v3f64(<2 x double> %a, <2 x
define void @v3i32(<2 x i32> %a, <2 x i32> %b, <3 x i32>* %p) nounwind {
; SSE2-LABEL: v3i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
@@ -95,7 +95,7 @@ define void @v3i32(<2 x i32> %a, <2 x i3
; SSE2-NEXT: retq
;
; SSE42-LABEL: v3i32:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
; SSE42-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
; SSE42-NEXT: pextrd $2, %xmm0, 8(%rdi)
@@ -103,7 +103,7 @@ define void @v3i32(<2 x i32> %a, <2 x i3
; SSE42-NEXT: retq
;
; AVX1-LABEL: v3i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
; AVX1-NEXT: vpextrd $2, %xmm0, 8(%rdi)
@@ -111,7 +111,7 @@ define void @v3i32(<2 x i32> %a, <2 x i3
; AVX1-NEXT: retq
;
; AVX2-LABEL: v3i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastss %xmm1, %xmm1
; AVX2-NEXT: vblendps {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2,3]
; AVX2-NEXT: vextractps $2, %xmm0, 8(%rdi)
@@ -119,7 +119,7 @@ define void @v3i32(<2 x i32> %a, <2 x i3
; AVX2-NEXT: retq
;
; XOP-LABEL: v3i32:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
; XOP-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
; XOP-NEXT: vpextrd $2, %xmm0, 8(%rdi)
@@ -132,7 +132,7 @@ define void @v3i32(<2 x i32> %a, <2 x i3
define void @v5i16(<4 x i16> %a, <4 x i16> %b, <5 x i16>* %p) nounwind {
; SSE2-LABEL: v5i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,1,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,2,2,3,4,5,6,7]
@@ -144,7 +144,7 @@ define void @v5i16(<4 x i16> %a, <4 x i1
; SSE2-NEXT: retq
;
; SSE42-LABEL: v5i16:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,1,2,3]
; SSE42-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7]
; SSE42-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,2,2,3,4,5,6,7]
@@ -155,7 +155,7 @@ define void @v5i16(<4 x i16> %a, <4 x i1
; SSE42-NEXT: retq
;
; AVX-LABEL: v5i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,1,2,3]
; AVX-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[2,0,2,3,4,5,6,7]
; AVX-NEXT: vpshuflw {{.*#+}} xmm2 = xmm0[0,2,2,3,4,5,6,7]
@@ -166,7 +166,7 @@ define void @v5i16(<4 x i16> %a, <4 x i1
; AVX-NEXT: retq
;
; XOP-LABEL: v5i16:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpperm {{.*#+}} xmm1 = xmm0[0,1],xmm1[4,5],xmm0[4,5],xmm1[8,9],xmm0[12,13],xmm1[4,5],xmm0[14,15],xmm1[6,7]
; XOP-NEXT: vpextrw $6, %xmm0, 8(%rdi)
; XOP-NEXT: vmovq %xmm1, (%rdi)
@@ -178,7 +178,7 @@ define void @v5i16(<4 x i16> %a, <4 x i1
define void @v5i32(<4 x i32> %a, <4 x i32> %b, <5 x i32>* %p) nounwind {
; SSE2-LABEL: v5i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[3,1,2,3]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
@@ -187,7 +187,7 @@ define void @v5i32(<4 x i32> %a, <4 x i3
; SSE2-NEXT: retq
;
; SSE42-LABEL: v5i32:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,2]
; SSE42-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero
; SSE42-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
@@ -196,7 +196,7 @@ define void @v5i32(<4 x i32> %a, <4 x i3
; SSE42-NEXT: retq
;
; AVX1-LABEL: v5i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm0[0,1],xmm1[1,2]
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,2,1,3]
; AVX1-NEXT: vextractps $3, %xmm0, 16(%rdi)
@@ -204,7 +204,7 @@ define void @v5i32(<4 x i32> %a, <4 x i3
; AVX1-NEXT: retq
;
; AVX2-LABEL: v5i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <0,5,1,6,3,u,u,u>
@@ -215,7 +215,7 @@ define void @v5i32(<4 x i32> %a, <4 x i3
; AVX2-NEXT: retq
;
; XOP-LABEL: v5i32:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vshufps {{.*#+}} xmm1 = xmm0[0,1],xmm1[1,2]
; XOP-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,2,1,3]
; XOP-NEXT: vextractps $3, %xmm0, 16(%rdi)
@@ -228,7 +228,7 @@ define void @v5i32(<4 x i32> %a, <4 x i3
define void @v5f32(<4 x float> %a, <4 x float> %b, <5 x float>* %p) nounwind {
; SSE2-LABEL: v5f32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps %xmm0, %xmm2
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm1[1,2]
; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2,1,3]
@@ -238,7 +238,7 @@ define void @v5f32(<4 x float> %a, <4 x
; SSE2-NEXT: retq
;
; SSE42-LABEL: v5f32:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: extractps $3, %xmm0, 16(%rdi)
; SSE42-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[1,2]
; SSE42-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
@@ -246,7 +246,7 @@ define void @v5f32(<4 x float> %a, <4 x
; SSE42-NEXT: retq
;
; AVX1-LABEL: v5f32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm0[0,1],xmm1[1,2]
; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,2,1,3]
; AVX1-NEXT: vextractps $3, %xmm0, 16(%rdi)
@@ -254,7 +254,7 @@ define void @v5f32(<4 x float> %a, <4 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: v5f32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm1
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <0,5,1,6,3,u,u,u>
@@ -265,7 +265,7 @@ define void @v5f32(<4 x float> %a, <4 x
; AVX2-NEXT: retq
;
; XOP-LABEL: v5f32:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vshufps {{.*#+}} xmm1 = xmm0[0,1],xmm1[1,2]
; XOP-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,2,1,3]
; XOP-NEXT: vextractps $3, %xmm0, 16(%rdi)
@@ -278,7 +278,7 @@ define void @v5f32(<4 x float> %a, <4 x
define void @v7i8(<4 x i8> %a, <4 x i8> %b, <7 x i8>* %p) nounwind {
; SSE2-LABEL: v7i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,3]
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [0,65535,0,65535,0,65535,65535,65535]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,1,0,3]
@@ -299,7 +299,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8>
; SSE2-NEXT: retq
;
; SSE42-LABEL: v7i8:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,3]
; SSE42-NEXT: pextrb $0, %xmm1, 6(%rdi)
; SSE42-NEXT: pshufb {{.*#+}} xmm1 = xmm1[8,9,8,9,4,5,8,9,0,1,12,13,0,1,14,15]
@@ -310,7 +310,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8>
; SSE42-NEXT: retq
;
; AVX-LABEL: v7i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,1,3]
; AVX-NEXT: vpshufb {{.*#+}} xmm2 = xmm1[8,9,8,9,4,5,8,9,0,1,12,13,0,1,14,15]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5,6,7]
@@ -321,7 +321,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8>
; AVX-NEXT: retq
;
; XOP-LABEL: v7i8:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0],xmm1[8],xmm0[12],xmm1[8],xmm0[4],xmm1[12,0,14,u,u,u,u,u,u,u,u]
; XOP-NEXT: vpextrb $0, %xmm1, 6(%rdi)
; XOP-NEXT: vpextrw $2, %xmm0, 4(%rdi)
@@ -334,7 +334,7 @@ define void @v7i8(<4 x i8> %a, <4 x i8>
define void @v7i16(<4 x i16> %a, <4 x i16> %b, <7 x i16>* %p) nounwind {
; SSE2-LABEL: v7i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,3]
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [0,65535,0,65535,0,65535,65535,65535]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,1,0,3]
@@ -351,7 +351,7 @@ define void @v7i16(<4 x i16> %a, <4 x i1
; SSE2-NEXT: retq
;
; SSE42-LABEL: v7i16:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,1,3]
; SSE42-NEXT: pextrw $0, %xmm1, 12(%rdi)
; SSE42-NEXT: pshufb {{.*#+}} xmm1 = xmm1[8,9,8,9,4,5,8,9,0,1,12,13,0,1,14,15]
@@ -361,7 +361,7 @@ define void @v7i16(<4 x i16> %a, <4 x i1
; SSE42-NEXT: retq
;
; AVX-LABEL: v7i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,3,1,3]
; AVX-NEXT: vpshufb {{.*#+}} xmm2 = xmm1[8,9,8,9,4,5,8,9,0,1,12,13,0,1,14,15]
; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5,6,7]
@@ -371,7 +371,7 @@ define void @v7i16(<4 x i16> %a, <4 x i1
; AVX-NEXT: retq
;
; XOP-LABEL: v7i16:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0,1],xmm1[8,9],xmm0[12,13],xmm1[8,9],xmm0[4,5],xmm1[12,13,0,1,14,15]
; XOP-NEXT: vpextrw $0, %xmm1, 12(%rdi)
; XOP-NEXT: vpextrd $2, %xmm0, 8(%rdi)
@@ -385,7 +385,7 @@ define void @v7i16(<4 x i16> %a, <4 x i1
define void @v7i32(<4 x i32> %a, <4 x i32> %b, <7 x i32>* %p) nounwind {
; SSE2-LABEL: v7i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,1,2,2]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,1,0,3]
; SSE2-NEXT: punpckhdq {{.*#+}} xmm3 = xmm3[2],xmm2[2],xmm3[3],xmm2[3]
@@ -397,7 +397,7 @@ define void @v7i32(<4 x i32> %a, <4 x i3
; SSE2-NEXT: retq
;
; SSE42-LABEL: v7i32:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movdqa %xmm1, %xmm2
; SSE42-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm0[2,3],xmm2[4,5,6,7]
; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
@@ -409,7 +409,7 @@ define void @v7i32(<4 x i32> %a, <4 x i3
; SSE42-NEXT: retq
;
; AVX1-LABEL: v7i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vblendps {{.*#+}} xmm2 = xmm0[0,1],xmm1[2],xmm0[3]
; AVX1-NEXT: vpermilps {{.*#+}} xmm2 = xmm2[0,2,3,2]
; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
@@ -420,7 +420,7 @@ define void @v7i32(<4 x i32> %a, <4 x i3
; AVX1-NEXT: retq
;
; AVX2-LABEL: v7i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<def>
; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = <0,6,3,6,1,7,4,u>
@@ -433,7 +433,7 @@ define void @v7i32(<4 x i32> %a, <4 x i3
; AVX2-NEXT: retq
;
; XOP-LABEL: v7i32:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vblendps {{.*#+}} xmm2 = xmm0[0,1],xmm1[2],xmm0[3]
; XOP-NEXT: vpermilps {{.*#+}} xmm2 = xmm2[0,2,3,2]
; XOP-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
@@ -449,7 +449,7 @@ define void @v7i32(<4 x i32> %a, <4 x i3
define void @v12i8(<8 x i8> %a, <8 x i8> %b, <12 x i8>* %p) nounwind {
; SSE2-LABEL: v12i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
@@ -471,7 +471,7 @@ define void @v12i8(<8 x i8> %a, <8 x i8>
; SSE2-NEXT: retq
;
; SSE42-LABEL: v12i8:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufb {{.*#+}} xmm1 = zero,zero,xmm1[0],zero,zero,xmm1[2],zero,zero,xmm1[4],zero,zero,xmm1[6,u,u,u,u]
; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,8],zero,xmm0[2,10],zero,xmm0[4,12],zero,xmm0[6,14],zero,xmm0[u,u,u,u]
; SSE42-NEXT: por %xmm1, %xmm0
@@ -480,7 +480,7 @@ define void @v12i8(<8 x i8> %a, <8 x i8>
; SSE42-NEXT: retq
;
; AVX-LABEL: v12i8:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpshufb {{.*#+}} xmm1 = zero,zero,xmm1[0],zero,zero,xmm1[2],zero,zero,xmm1[4],zero,zero,xmm1[6,u,u,u,u]
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8],zero,xmm0[2,10],zero,xmm0[4,12],zero,xmm0[6,14],zero,xmm0[u,u,u,u]
; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
@@ -489,7 +489,7 @@ define void @v12i8(<8 x i8> %a, <8 x i8>
; AVX-NEXT: retq
;
; XOP-LABEL: v12i8:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpshufb {{.*#+}} xmm1 = zero,zero,xmm1[0],zero,zero,xmm1[2],zero,zero,xmm1[4],zero,zero,xmm1[6,u,u,u,u]
; XOP-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8],zero,xmm0[2,10],zero,xmm0[4,12],zero,xmm0[6,14],zero,xmm0[u,u,u,u]
; XOP-NEXT: vpor %xmm1, %xmm0, %xmm0
@@ -503,7 +503,7 @@ define void @v12i8(<8 x i8> %a, <8 x i8>
define void @v12i16(<8 x i16> %a, <8 x i16> %b, <12 x i16>* %p) nounwind {
; SSE2-LABEL: v12i16:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,0,0,3]
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [65535,65535,0,65535,65535,0,65535,65535]
; SSE2-NEXT: pshufhw {{.*#+}} xmm4 = xmm0[0,1,2,3,6,5,4,7]
@@ -525,7 +525,7 @@ define void @v12i16(<8 x i16> %a, <8 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: v12i16:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
; SSE42-NEXT: pshufd {{.*#+}} xmm3 = xmm0[3,1,2,3]
; SSE42-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,3,1,3,4,5,6,7]
@@ -538,7 +538,7 @@ define void @v12i16(<8 x i16> %a, <8 x i
; SSE42-NEXT: retq
;
; AVX1-LABEL: v12i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[3,1,2,3]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,3,1,3,4,5,6,7]
@@ -551,7 +551,7 @@ define void @v12i16(<8 x i16> %a, <8 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: v12i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,2,3]
; AVX2-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[3,1,2,3]
; AVX2-NEXT: vpshuflw {{.*#+}} xmm3 = xmm3[0,3,1,3,4,5,6,7]
@@ -564,7 +564,7 @@ define void @v12i16(<8 x i16> %a, <8 x i
; AVX2-NEXT: retq
;
; XOP-LABEL: v12i16:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpperm {{.*#+}} xmm2 = xmm0[0,1,8,9],xmm1[0,1],xmm0[2,3,10,11],xmm1[2,3],xmm0[4,5,12,13]
; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm1[4,5],xmm0[6,7,14,15],xmm1[6,7],xmm0[8,9,10,11,12,13,14,15]
; XOP-NEXT: vmovq %xmm0, 16(%rdi)
@@ -577,7 +577,7 @@ define void @v12i16(<8 x i16> %a, <8 x i
define void @v12i32(<8 x i32> %a, <8 x i32> %b, <12 x i32>* %p) nounwind {
; SSE2-LABEL: v12i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,1,2,2]
@@ -600,7 +600,7 @@ define void @v12i32(<8 x i32> %a, <8 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: v12i32:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,0,1,1]
; SSE42-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,1,0,1]
; SSE42-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm3[2,3],xmm4[4,5,6,7]
@@ -620,7 +620,7 @@ define void @v12i32(<8 x i32> %a, <8 x i
; SSE42-NEXT: retq
;
; AVX1-LABEL: v12i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3,0,1]
; AVX1-NEXT: vmovsldup {{.*#+}} ymm2 = ymm2[0,0,2,2,4,4,6,6]
; AVX1-NEXT: vpermilps {{.*#+}} ymm3 = ymm0[0,u,u,1,5,u,u,6]
@@ -638,7 +638,7 @@ define void @v12i32(<8 x i32> %a, <8 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: v12i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpermilps {{.*#+}} xmm2 = xmm1[2,3,2,3]
; AVX2-NEXT: vpermilps {{.*#+}} ymm3 = ymm0[3,3,2,3,7,7,6,7]
; AVX2-NEXT: vpermpd {{.*#+}} ymm3 = ymm3[0,2,2,3]
@@ -653,7 +653,7 @@ define void @v12i32(<8 x i32> %a, <8 x i
; AVX2-NEXT: retq
;
; XOP-LABEL: v12i32:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3,0,1]
; XOP-NEXT: vpermil2ps {{.*#+}} ymm2 = ymm0[0],ymm2[0],ymm0[u,1,5,u],ymm2[6],ymm0[6]
; XOP-NEXT: vmovddup {{.*#+}} xmm3 = xmm1[0,0]
@@ -674,7 +674,7 @@ define void @v12i32(<8 x i32> %a, <8 x i
define void @pr29025(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c, <12 x i8> *%p) nounwind {
; SSE2-LABEL: pr29025:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255]
; SSE2-NEXT: pand %xmm3, %xmm1
; SSE2-NEXT: pand %xmm3, %xmm0
@@ -704,7 +704,7 @@ define void @pr29025(<4 x i8> %a, <4 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: pr29025:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movdqa {{.*#+}} xmm3 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
; SSE42-NEXT: pshufb %xmm3, %xmm1
; SSE42-NEXT: pshufb %xmm3, %xmm0
@@ -717,7 +717,7 @@ define void @pr29025(<4 x i8> %a, <4 x i
; SSE42-NEXT: retq
;
; AVX-LABEL: pr29025:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
; AVX-NEXT: vpshufb %xmm3, %xmm1, %xmm1
; AVX-NEXT: vpshufb %xmm3, %xmm0, %xmm0
@@ -730,7 +730,7 @@ define void @pr29025(<4 x i8> %a, <4 x i
; AVX-NEXT: retq
;
; XOP-LABEL: pr29025:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0,4,8,12],xmm1[0,4,8,12],xmm0[u,u,u,u,u,u,u,u]
; XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0,4],xmm2[0],xmm0[1,5],xmm2[4],xmm0[2,6],xmm2[8],xmm0[3,7],xmm2[12],xmm0[u,u,u,u]
; XOP-NEXT: vpextrd $2, %xmm0, 8(%rdi)
@@ -745,7 +745,7 @@ define void @pr29025(<4 x i8> %a, <4 x i
define void @interleave_24i8_out(<24 x i8>* %p, <8 x i8>* %q1, <8 x i8>* %q2, <8 x i8>* %q3) nounwind {
; SSE2-LABEL: interleave_24i8_out:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqu (%rdi), %xmm0
; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,0,255,255,0,255,255,255,255,255,255,255,255,255,255]
@@ -808,7 +808,7 @@ define void @interleave_24i8_out(<24 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: interleave_24i8_out:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movdqu (%rdi), %xmm0
; SSE42-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE42-NEXT: movdqa %xmm1, %xmm2
@@ -830,7 +830,7 @@ define void @interleave_24i8_out(<24 x i
; SSE42-NEXT: retq
;
; AVX-LABEL: interleave_24i8_out:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqu (%rdi), %xmm0
; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX-NEXT: vpshufb {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,xmm1[2,5,u,u,u,u,u,u,u,u]
@@ -848,7 +848,7 @@ define void @interleave_24i8_out(<24 x i
; AVX-NEXT: retq
;
; XOP-LABEL: interleave_24i8_out:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vmovdqu (%rdi), %xmm0
; XOP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; XOP-NEXT: vpshufb {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,xmm1[2,5,u,u,u,u,u,u,u,u]
@@ -876,7 +876,7 @@ define void @interleave_24i8_out(<24 x i
define void @interleave_24i8_in(<24 x i8>* %p, <8 x i8>* %q1, <8 x i8>* %q2, <8 x i8>* %q3) nounwind {
; SSE2-LABEL: interleave_24i8_in:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
@@ -920,7 +920,7 @@ define void @interleave_24i8_in(<24 x i8
; SSE2-NEXT: retq
;
; SSE42-LABEL: interleave_24i8_in:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
; SSE42-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
; SSE42-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
@@ -938,7 +938,7 @@ define void @interleave_24i8_in(<24 x i8
; SSE42-NEXT: retq
;
; AVX-LABEL: interleave_24i8_in:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
@@ -954,7 +954,7 @@ define void @interleave_24i8_in(<24 x i8
; AVX-NEXT: retq
;
; XOP-LABEL: interleave_24i8_in:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero
; XOP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
; XOP-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
@@ -981,7 +981,7 @@ define void @interleave_24i8_in(<24 x i8
define void @interleave_24i16_out(<24 x i16>* %p, <8 x i16>* %q1, <8 x i16>* %q2, <8 x i16>* %q3) nounwind {
; SSE2-LABEL: interleave_24i16_out:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqu (%rdi), %xmm3
; SSE2-NEXT: movdqu 16(%rdi), %xmm2
; SSE2-NEXT: movdqu 32(%rdi), %xmm8
@@ -1037,7 +1037,7 @@ define void @interleave_24i16_out(<24 x
; SSE2-NEXT: retq
;
; SSE42-LABEL: interleave_24i16_out:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movdqu (%rdi), %xmm0
; SSE42-NEXT: movdqu 16(%rdi), %xmm1
; SSE42-NEXT: movdqu 32(%rdi), %xmm2
@@ -1063,7 +1063,7 @@ define void @interleave_24i16_out(<24 x
; SSE42-NEXT: retq
;
; AVX1-LABEL: interleave_24i16_out:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqu 32(%rdi), %xmm0
; AVX1-NEXT: vmovdqu (%rdi), %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
@@ -1087,7 +1087,7 @@ define void @interleave_24i16_out(<24 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleave_24i16_out:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqu (%rdi), %ymm0
; AVX2-NEXT: vmovdqu 32(%rdi), %xmm1
; AVX2-NEXT: vpblendw {{.*#+}} ymm2 = ymm0[0,1],ymm1[2],ymm0[3,4],ymm1[5],ymm0[6,7,8,9],ymm1[10],ymm0[11,12],ymm1[13],ymm0[14,15]
@@ -1109,7 +1109,7 @@ define void @interleave_24i16_out(<24 x
; AVX2-NEXT: retq
;
; XOP-LABEL: interleave_24i16_out:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vmovdqu 32(%rdi), %xmm0
; XOP-NEXT: vmovdqu (%rdi), %ymm1
; XOP-NEXT: vextractf128 $1, %ymm1, %xmm2
@@ -1136,7 +1136,7 @@ define void @interleave_24i16_out(<24 x
define void @interleave_24i16_in(<24 x i16>* %p, <8 x i16>* %q1, <8 x i16>* %q2, <8 x i16>* %q3) nounwind {
; SSE2-LABEL: interleave_24i16_in:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqu (%rsi), %xmm3
; SSE2-NEXT: movdqu (%rdx), %xmm2
; SSE2-NEXT: movdqu (%rcx), %xmm1
@@ -1176,7 +1176,7 @@ define void @interleave_24i16_in(<24 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: interleave_24i16_in:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movdqu (%rsi), %xmm0
; SSE42-NEXT: movdqu (%rdx), %xmm1
; SSE42-NEXT: movdqu (%rcx), %xmm2
@@ -1200,7 +1200,7 @@ define void @interleave_24i16_in(<24 x i
; SSE42-NEXT: retq
;
; AVX1-LABEL: interleave_24i16_in:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovdqu (%rsi), %xmm0
; AVX1-NEXT: vmovdqu (%rdx), %xmm1
; AVX1-NEXT: vmovdqu (%rcx), %xmm2
@@ -1225,7 +1225,7 @@ define void @interleave_24i16_in(<24 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleave_24i16_in:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqu (%rsi), %xmm0
; AVX2-NEXT: vmovdqu (%rdx), %xmm1
; AVX2-NEXT: vmovdqu (%rcx), %xmm2
@@ -1248,7 +1248,7 @@ define void @interleave_24i16_in(<24 x i
; AVX2-NEXT: retq
;
; XOP-LABEL: interleave_24i16_in:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vmovdqu (%rsi), %xmm0
; XOP-NEXT: vmovdqu (%rdx), %xmm1
; XOP-NEXT: vmovdqu (%rcx), %xmm2
@@ -1277,7 +1277,7 @@ define void @interleave_24i16_in(<24 x i
define void @interleave_24i32_out(<24 x i32>* %p, <8 x i32>* %q1, <8 x i32>* %q2, <8 x i32>* %q3) nounwind {
; SSE2-LABEL: interleave_24i32_out:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movups 80(%rdi), %xmm5
; SSE2-NEXT: movups 64(%rdi), %xmm8
; SSE2-NEXT: movups (%rdi), %xmm0
@@ -1321,7 +1321,7 @@ define void @interleave_24i32_out(<24 x
; SSE2-NEXT: retq
;
; SSE42-LABEL: interleave_24i32_out:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movdqu 80(%rdi), %xmm9
; SSE42-NEXT: movdqu 64(%rdi), %xmm10
; SSE42-NEXT: movdqu (%rdi), %xmm4
@@ -1361,7 +1361,7 @@ define void @interleave_24i32_out(<24 x
; SSE42-NEXT: retq
;
; AVX1-LABEL: interleave_24i32_out:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovups (%rdi), %ymm0
; AVX1-NEXT: vmovups 32(%rdi), %ymm1
; AVX1-NEXT: vmovups 64(%rdi), %ymm2
@@ -1401,7 +1401,7 @@ define void @interleave_24i32_out(<24 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleave_24i32_out:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovups (%rdi), %ymm0
; AVX2-NEXT: vmovups 32(%rdi), %ymm1
; AVX2-NEXT: vmovups 64(%rdi), %ymm2
@@ -1430,7 +1430,7 @@ define void @interleave_24i32_out(<24 x
; AVX2-NEXT: retq
;
; XOP-LABEL: interleave_24i32_out:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vmovups (%rdi), %ymm0
; XOP-NEXT: vmovups 32(%rdi), %ymm1
; XOP-NEXT: vmovups 64(%rdi), %ymm2
@@ -1480,7 +1480,7 @@ define void @interleave_24i32_out(<24 x
define void @interleave_24i32_in(<24 x i32>* %p, <8 x i32>* %q1, <8 x i32>* %q2, <8 x i32>* %q3) nounwind {
; SSE2-LABEL: interleave_24i32_in:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqu (%rsi), %xmm5
; SSE2-NEXT: movdqu 16(%rsi), %xmm2
; SSE2-NEXT: movdqu (%rdx), %xmm6
@@ -1528,7 +1528,7 @@ define void @interleave_24i32_in(<24 x i
; SSE2-NEXT: retq
;
; SSE42-LABEL: interleave_24i32_in:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movdqu (%rsi), %xmm5
; SSE42-NEXT: movdqu 16(%rsi), %xmm2
; SSE42-NEXT: movdqu (%rdx), %xmm6
@@ -1570,7 +1570,7 @@ define void @interleave_24i32_in(<24 x i
; SSE42-NEXT: retq
;
; AVX1-LABEL: interleave_24i32_in:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovups (%rsi), %ymm0
; AVX1-NEXT: vmovups (%rdx), %ymm1
; AVX1-NEXT: vmovupd (%rcx), %ymm2
@@ -1604,7 +1604,7 @@ define void @interleave_24i32_in(<24 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: interleave_24i32_in:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovups (%rsi), %ymm0
; AVX2-NEXT: vmovups (%rdx), %ymm1
; AVX2-NEXT: vmovups (%rcx), %ymm2
@@ -1632,7 +1632,7 @@ define void @interleave_24i32_in(<24 x i
; AVX2-NEXT: retq
;
; XOP-LABEL: interleave_24i32_in:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vmovups (%rsi), %ymm0
; XOP-NEXT: vmovups (%rdx), %ymm1
; XOP-NEXT: vmovupd (%rcx), %ymm2
@@ -1674,7 +1674,7 @@ define void @interleave_24i32_in(<24 x i
define <2 x double> @wrongorder(<4 x double> %A, <8 x double>* %P) #0 {
; SSE2-LABEL: wrongorder:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
; SSE2-NEXT: movaps %xmm0, 48(%rdi)
; SSE2-NEXT: movaps %xmm0, 32(%rdi)
@@ -1683,7 +1683,7 @@ define <2 x double> @wrongorder(<4 x dou
; SSE2-NEXT: retq
;
; SSE42-LABEL: wrongorder:
-; SSE42: # BB#0:
+; SSE42: # %bb.0:
; SSE42-NEXT: movddup {{.*#+}} xmm0 = xmm0[0,0]
; SSE42-NEXT: movapd %xmm0, 48(%rdi)
; SSE42-NEXT: movapd %xmm0, 32(%rdi)
@@ -1692,7 +1692,7 @@ define <2 x double> @wrongorder(<4 x dou
; SSE42-NEXT: retq
;
; AVX1-LABEL: wrongorder:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
; AVX1-NEXT: vmovaps %ymm1, 32(%rdi)
@@ -1702,7 +1702,7 @@ define <2 x double> @wrongorder(<4 x dou
; AVX1-NEXT: retq
;
; AVX2-LABEL: wrongorder:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastsd %xmm0, %ymm1
; AVX2-NEXT: vmovapd %ymm1, 32(%rdi)
; AVX2-NEXT: vmovapd %ymm1, (%rdi)
@@ -1711,7 +1711,7 @@ define <2 x double> @wrongorder(<4 x dou
; AVX2-NEXT: retq
;
; XOP-LABEL: wrongorder:
-; XOP: # BB#0:
+; XOP: # %bb.0:
; XOP-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
; XOP-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
; XOP-NEXT: vmovaps %ymm1, 32(%rdi)
Modified: llvm/trunk/test/CodeGen/X86/optimize-max-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/optimize-max-1.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/optimize-max-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/optimize-max-1.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@ target datalayout = "e-p:64:64:64-i1:8:8
define void @fs(double* nocapture %p, i64 %n) nounwind {
; CHECK-LABEL: fs:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_1: # %bb
@@ -17,7 +17,7 @@ define void @fs(double* nocapture %p, i6
; CHECK-NEXT: incq %rax
; CHECK-NEXT: cmpq %rsi, %rax
; CHECK-NEXT: jl .LBB0_1
-; CHECK-NEXT: # BB#2: # %return
+; CHECK-NEXT: # %bb.2: # %return
; CHECK-NEXT: retq
entry:
%tmp = icmp slt i64 %n, 1 ; <i1> [#uses=1]
@@ -38,7 +38,7 @@ return: ; preds = %bb
define void @bs(double* nocapture %p, i64 %n) nounwind {
; CHECK-LABEL: bs:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB1_1: # %bb
@@ -47,7 +47,7 @@ define void @bs(double* nocapture %p, i6
; CHECK-NEXT: incq %rax
; CHECK-NEXT: cmpq %rsi, %rax
; CHECK-NEXT: jl .LBB1_1
-; CHECK-NEXT: # BB#2: # %return
+; CHECK-NEXT: # %bb.2: # %return
; CHECK-NEXT: retq
entry:
%tmp = icmp sge i64 %n, 1 ; <i1> [#uses=1]
@@ -68,7 +68,7 @@ return: ; preds = %bb
define void @fu(double* nocapture %p, i64 %n) nounwind {
; CHECK-LABEL: fu:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB2_1: # %bb
@@ -77,7 +77,7 @@ define void @fu(double* nocapture %p, i6
; CHECK-NEXT: incq %rax
; CHECK-NEXT: cmpq %rsi, %rax
; CHECK-NEXT: jb .LBB2_1
-; CHECK-NEXT: # BB#2: # %return
+; CHECK-NEXT: # %bb.2: # %return
; CHECK-NEXT: retq
entry:
%tmp = icmp eq i64 %n, 0 ; <i1> [#uses=1]
@@ -98,7 +98,7 @@ return: ; preds = %bb
define void @bu(double* nocapture %p, i64 %n) nounwind {
; CHECK-LABEL: bu:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB3_1: # %bb
@@ -107,7 +107,7 @@ define void @bu(double* nocapture %p, i6
; CHECK-NEXT: incq %rax
; CHECK-NEXT: cmpq %rsi, %rax
; CHECK-NEXT: jb .LBB3_1
-; CHECK-NEXT: # BB#2: # %return
+; CHECK-NEXT: # %bb.2: # %return
; CHECK-NEXT: retq
entry:
%tmp = icmp ne i64 %n, 0 ; <i1> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/optimize-max-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/optimize-max-2.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/optimize-max-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/optimize-max-2.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@ target datalayout = "e-p:64:64:64-i1:8:8
define void @foo(double* nocapture %p, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: foo:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: testq %rdx, %rdx
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: cmovneq %rdx, %rax
@@ -23,7 +23,7 @@ define void @foo(double* nocapture %p, i
; CHECK-NEXT: addq $8, %rdi
; CHECK-NEXT: decq %rax
; CHECK-NEXT: jne .LBB0_1
-; CHECK-NEXT: # BB#2: # %return
+; CHECK-NEXT: # %bb.2: # %return
; CHECK-NEXT: retq
entry:
%tmp = icmp eq i64 %y, 0 ; <i1> [#uses=1]
Modified: llvm/trunk/test/CodeGen/X86/or-branch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/or-branch.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/or-branch.ll (original)
+++ llvm/trunk/test/CodeGen/X86/or-branch.ll Mon Dec 4 09:18:51 2017
@@ -4,20 +4,20 @@
define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind {
; JUMP2-LABEL: foo:
-; JUMP2: # BB#0: # %entry
+; JUMP2: # %bb.0: # %entry
; JUMP2-NEXT: cmpl $5, {{[0-9]+}}(%esp)
; JUMP2-NEXT: jl .LBB0_3
-; JUMP2-NEXT: # BB#1: # %entry
+; JUMP2-NEXT: # %bb.1: # %entry
; JUMP2-NEXT: movl {{[0-9]+}}(%esp), %eax
; JUMP2-NEXT: testl %eax, %eax
; JUMP2-NEXT: je .LBB0_3
-; JUMP2-NEXT: # BB#2: # %UnifiedReturnBlock
+; JUMP2-NEXT: # %bb.2: # %UnifiedReturnBlock
; JUMP2-NEXT: retl
; JUMP2-NEXT: .LBB0_3: # %cond_true
; JUMP2-NEXT: jmp bar # TAILCALL
;
; JUMP1-LABEL: foo:
-; JUMP1: # BB#0: # %entry
+; JUMP1: # %bb.0: # %entry
; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP1-NEXT: sete %al
; JUMP1-NEXT: cmpl $5, {{[0-9]+}}(%esp)
@@ -25,7 +25,7 @@ define void @foo(i32 %X, i32 %Y, i32 %Z)
; JUMP1-NEXT: orb %al, %cl
; JUMP1-NEXT: cmpb $1, %cl
; JUMP1-NEXT: jne .LBB0_1
-; JUMP1-NEXT: # BB#2: # %cond_true
+; JUMP1-NEXT: # %bb.2: # %cond_true
; JUMP1-NEXT: jmp bar # TAILCALL
; JUMP1-NEXT: .LBB0_1: # %UnifiedReturnBlock
; JUMP1-NEXT: retl
@@ -48,7 +48,7 @@ UnifiedReturnBlock:
define void @unpredictable(i32 %X, i32 %Y, i32 %Z) nounwind {
; JUMP2-LABEL: unpredictable:
-; JUMP2: # BB#0: # %entry
+; JUMP2: # %bb.0: # %entry
; JUMP2-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP2-NEXT: sete %al
; JUMP2-NEXT: cmpl $5, {{[0-9]+}}(%esp)
@@ -56,13 +56,13 @@ define void @unpredictable(i32 %X, i32 %
; JUMP2-NEXT: orb %al, %cl
; JUMP2-NEXT: cmpb $1, %cl
; JUMP2-NEXT: jne .LBB1_1
-; JUMP2-NEXT: # BB#2: # %cond_true
+; JUMP2-NEXT: # %bb.2: # %cond_true
; JUMP2-NEXT: jmp bar # TAILCALL
; JUMP2-NEXT: .LBB1_1: # %UnifiedReturnBlock
; JUMP2-NEXT: retl
;
; JUMP1-LABEL: unpredictable:
-; JUMP1: # BB#0: # %entry
+; JUMP1: # %bb.0: # %entry
; JUMP1-NEXT: cmpl $0, {{[0-9]+}}(%esp)
; JUMP1-NEXT: sete %al
; JUMP1-NEXT: cmpl $5, {{[0-9]+}}(%esp)
@@ -70,7 +70,7 @@ define void @unpredictable(i32 %X, i32 %
; JUMP1-NEXT: orb %al, %cl
; JUMP1-NEXT: cmpb $1, %cl
; JUMP1-NEXT: jne .LBB1_1
-; JUMP1-NEXT: # BB#2: # %cond_true
+; JUMP1-NEXT: # %bb.2: # %cond_true
; JUMP1-NEXT: jmp bar # TAILCALL
; JUMP1-NEXT: .LBB1_1: # %UnifiedReturnBlock
; JUMP1-NEXT: retl
Modified: llvm/trunk/test/CodeGen/X86/or-lea.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/or-lea.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/or-lea.ll (original)
+++ llvm/trunk/test/CodeGen/X86/or-lea.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define i32 @or_shift1_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift1_and1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
@@ -23,7 +23,7 @@ define i32 @or_shift1_and1(i32 %x, i32 %
define i32 @or_shift1_and1_swapped(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift1_and1_swapped:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
@@ -38,7 +38,7 @@ define i32 @or_shift1_and1_swapped(i32 %
define i32 @or_shift2_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift2_and1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
@@ -53,7 +53,7 @@ define i32 @or_shift2_and1(i32 %x, i32 %
define i32 @or_shift3_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift3_and1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $1, %esi
@@ -68,7 +68,7 @@ define i32 @or_shift3_and1(i32 %x, i32 %
define i32 @or_shift3_and7(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift3_and7:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: andl $7, %esi
@@ -85,7 +85,7 @@ define i32 @or_shift3_and7(i32 %x, i32 %
define i32 @or_shift4_and1(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift4_and1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: shll $4, %edi
@@ -103,7 +103,7 @@ define i32 @or_shift4_and1(i32 %x, i32 %
define i32 @or_shift3_and8(i32 %x, i32 %y) {
; CHECK-LABEL: or_shift3_and8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal (,%rdi,8), %eax
; CHECK-NEXT: andl $8, %esi
@@ -120,7 +120,7 @@ define i32 @or_shift3_and8(i32 %x, i32 %
define i64 @or_shift1_and1_64(i64 %x, i64 %y) {
; CHECK-LABEL: or_shift1_and1_64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl $1, %esi
; CHECK-NEXT: leaq (%rsi,%rdi,2), %rax
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll (original)
+++ llvm/trunk/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i1 @saddo_not_i32(i32 %v1, i32 %v2) {
; CHECK-LABEL: saddo_not_i32:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: addl %esi, %edi
; CHECK-NEXT: setno %al
; CHECK-NEXT: retq
@@ -16,7 +16,7 @@ entry:
define i1 @saddo_not_i64(i64 %v1, i64 %v2) {
; CHECK-LABEL: saddo_not_i64:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: addq %rsi, %rdi
; CHECK-NEXT: setno %al
; CHECK-NEXT: retq
@@ -29,7 +29,7 @@ entry:
define i1 @uaddo_not_i32(i32 %v1, i32 %v2) {
; CHECK-LABEL: uaddo_not_i32:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: addl %esi, %edi
; CHECK-NEXT: setae %al
; CHECK-NEXT: retq
@@ -42,7 +42,7 @@ entry:
define i1 @uaddo_not_i64(i64 %v1, i64 %v2) {
; CHECK-LABEL: uaddo_not_i64:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: addq %rsi, %rdi
; CHECK-NEXT: setae %al
; CHECK-NEXT: retq
@@ -55,7 +55,7 @@ entry:
define i1 @ssubo_not_i32(i32 %v1, i32 %v2) {
; CHECK-LABEL: ssubo_not_i32:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: setno %al
; CHECK-NEXT: retq
@@ -68,7 +68,7 @@ entry:
define i1 @ssub_not_i64(i64 %v1, i64 %v2) {
; CHECK-LABEL: ssub_not_i64:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: cmpq %rsi, %rdi
; CHECK-NEXT: setno %al
; CHECK-NEXT: retq
@@ -81,7 +81,7 @@ entry:
define i1 @usubo_not_i32(i32 %v1, i32 %v2) {
; CHECK-LABEL: usubo_not_i32:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: setae %al
; CHECK-NEXT: retq
@@ -94,7 +94,7 @@ entry:
define i1 @usubo_not_i64(i64 %v1, i64 %v2) {
; CHECK-LABEL: usubo_not_i64:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: cmpq %rsi, %rdi
; CHECK-NEXT: setae %al
; CHECK-NEXT: retq
@@ -107,7 +107,7 @@ entry:
define i1 @smulo_not_i32(i32 %v1, i32 %v2) {
; CHECK-LABEL: smulo_not_i32:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: imull %esi, %edi
; CHECK-NEXT: setno %al
; CHECK-NEXT: retq
@@ -120,7 +120,7 @@ entry:
define i1 @smulo_not_i64(i64 %v1, i64 %v2) {
; CHECK-LABEL: smulo_not_i64:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: imulq %rsi, %rdi
; CHECK-NEXT: setno %al
; CHECK-NEXT: retq
@@ -133,7 +133,7 @@ entry:
define i1 @umulo_not_i32(i32 %v1, i32 %v2) {
; CHECK-LABEL: umulo_not_i32:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: mull %esi
; CHECK-NEXT: setno %al
@@ -147,7 +147,7 @@ entry:
define i1 @umulo_not_i64(i64 %v1, i64 %v2) {
; CHECK-LABEL: umulo_not_i64:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: mulq %rsi
; CHECK-NEXT: setno %al
Modified: llvm/trunk/test/CodeGen/X86/overflow.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/overflow.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/overflow.ll (original)
+++ llvm/trunk/test/CodeGen/X86/overflow.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i128 @mulhioverflow(i64 %a, i64 %b, i64 %c) nounwind {
; X32-LABEL: mulhioverflow:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pushl %ebp
; X32-NEXT: pushl %ebx
; X32-NEXT: pushl %edi
@@ -64,7 +64,7 @@ define i128 @mulhioverflow(i64 %a, i64 %
; X32-NEXT: retl $4
;
; X64-LABEL: mulhioverflow:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdx, %rcx
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: mulq %rsi
Modified: llvm/trunk/test/CodeGen/X86/packss.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/packss.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/packss.ll (original)
+++ llvm/trunk/test/CodeGen/X86/packss.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define <4 x i32> @trunc_ashr_v4i64(<4 x i64> %a) nounwind {
; SSE-LABEL: trunc_ashr_v4i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: psrad $31, %xmm1
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE-NEXT: psrad $31, %xmm0
@@ -17,7 +17,7 @@ define <4 x i32> @trunc_ashr_v4i64(<4 x
; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: trunc_ashr_v4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtq %xmm1, %xmm2, %xmm1
@@ -27,7 +27,7 @@ define <4 x i32> @trunc_ashr_v4i64(<4 x
; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: trunc_ashr_v4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
@@ -41,14 +41,14 @@ define <4 x i32> @trunc_ashr_v4i64(<4 x
define <8 x i16> @trunc_ashr_v8i32(<8 x i32> %a) nounwind {
; SSE-LABEL: trunc_ashr_v8i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: psrad $31, %xmm1
; SSE-NEXT: psrad $31, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: ret{{[l|q]}}
;
; AVX1-LABEL: trunc_ashr_v8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpsrad $31, %xmm1, %xmm1
; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0
@@ -57,7 +57,7 @@ define <8 x i16> @trunc_ashr_v8i32(<8 x
; AVX1-NEXT: ret{{[l|q]}}
;
; AVX2-LABEL: trunc_ashr_v8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpsrad $31, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
@@ -70,28 +70,28 @@ define <8 x i16> @trunc_ashr_v8i32(<8 x
define <8 x i16> @trunc_ashr_v4i32_icmp_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
; X86-SSE-LABEL: trunc_ashr_v4i32_icmp_v4i32:
-; X86-SSE: # BB#0:
+; X86-SSE: # %bb.0:
; X86-SSE-NEXT: psrad $31, %xmm0
; X86-SSE-NEXT: pcmpgtd {{\.LCPI.*}}, %xmm1
; X86-SSE-NEXT: packssdw %xmm1, %xmm0
; X86-SSE-NEXT: ret{{[l|q]}}
;
; X86-AVX-LABEL: trunc_ashr_v4i32_icmp_v4i32:
-; X86-AVX: # BB#0:
+; X86-AVX: # %bb.0:
; X86-AVX-NEXT: vpsrad $31, %xmm0, %xmm0
; X86-AVX-NEXT: vpcmpgtd {{\.LCPI.*}}, %xmm1, %xmm1
; X86-AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; X86-AVX-NEXT: ret{{[l|q]}}
;
; X64-SSE-LABEL: trunc_ashr_v4i32_icmp_v4i32:
-; X64-SSE: # BB#0:
+; X64-SSE: # %bb.0:
; X64-SSE-NEXT: psrad $31, %xmm0
; X64-SSE-NEXT: pcmpgtd {{.*}}(%rip), %xmm1
; X64-SSE-NEXT: packssdw %xmm1, %xmm0
; X64-SSE-NEXT: ret{{[l|q]}}
;
; X64-AVX-LABEL: trunc_ashr_v4i32_icmp_v4i32:
-; X64-AVX: # BB#0:
+; X64-AVX: # %bb.0:
; X64-AVX-NEXT: vpsrad $31, %xmm0, %xmm0
; X64-AVX-NEXT: vpcmpgtd {{.*}}(%rip), %xmm1, %xmm1
; X64-AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/palignr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/palignr.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/palignr.ll (original)
+++ llvm/trunk/test/CodeGen/X86/palignr.ll Mon Dec 4 09:18:51 2017
@@ -5,12 +5,12 @@
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
; CHECK-SSE-LABEL: test1:
-; CHECK-SSE: # BB#0:
+; CHECK-SSE: # %bb.0:
; CHECK-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,2,3,0]
; CHECK-SSE-NEXT: retl
;
; CHECK-AVX-LABEL: test1:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,2,3,0]
; CHECK-AVX-NEXT: retl
%C = shufflevector <4 x i32> %A, <4 x i32> undef, <4 x i32> < i32 1, i32 2, i32 3, i32 0 >
@@ -19,19 +19,19 @@ define <4 x i32> @test1(<4 x i32> %A, <4
define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) nounwind {
; CHECK-SSE2-LABEL: test2:
-; CHECK-SSE2: # BB#0:
+; CHECK-SSE2: # %bb.0:
; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
; CHECK-SSE2-NEXT: retl
;
; CHECK-SSSE3-LABEL: test2:
-; CHECK-SSSE3: # BB#0:
+; CHECK-SSSE3: # %bb.0:
; CHECK-SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
; CHECK-SSSE3-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSSE3-NEXT: retl
;
; CHECK-AVX-LABEL: test2:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
; CHECK-AVX-NEXT: retl
%C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 1, i32 2, i32 3, i32 4 >
@@ -40,18 +40,18 @@ define <4 x i32> @test2(<4 x i32> %A, <4
define <4 x i32> @test3(<4 x i32> %A, <4 x i32> %B) nounwind {
; CHECK-SSE2-LABEL: test3:
-; CHECK-SSE2: # BB#0:
+; CHECK-SSE2: # %bb.0:
; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
; CHECK-SSE2-NEXT: retl
;
; CHECK-SSSE3-LABEL: test3:
-; CHECK-SSSE3: # BB#0:
+; CHECK-SSSE3: # %bb.0:
; CHECK-SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
; CHECK-SSSE3-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSSE3-NEXT: retl
;
; CHECK-AVX-LABEL: test3:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
; CHECK-AVX-NEXT: retl
%C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 1, i32 2, i32 undef, i32 4 >
@@ -60,18 +60,18 @@ define <4 x i32> @test3(<4 x i32> %A, <4
define <4 x i32> @test4(<4 x i32> %A, <4 x i32> %B) nounwind {
; CHECK-SSE2-LABEL: test4:
-; CHECK-SSE2: # BB#0:
+; CHECK-SSE2: # %bb.0:
; CHECK-SSE2-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
; CHECK-SSE2-NEXT: movapd %xmm1, %xmm0
; CHECK-SSE2-NEXT: retl
;
; CHECK-SSSE3-LABEL: test4:
-; CHECK-SSSE3: # BB#0:
+; CHECK-SSSE3: # %bb.0:
; CHECK-SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
; CHECK-SSSE3-NEXT: retl
;
; CHECK-AVX-LABEL: test4:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
; CHECK-AVX-NEXT: retl
%C = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> < i32 6, i32 7, i32 undef, i32 1 >
@@ -80,13 +80,13 @@ define <4 x i32> @test4(<4 x i32> %A, <4
define <4 x float> @test5(<4 x float> %A, <4 x float> %B) nounwind {
; CHECK-SSE-LABEL: test5:
-; CHECK-SSE: # BB#0:
+; CHECK-SSE: # %bb.0:
; CHECK-SSE-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1],xmm0[0]
; CHECK-SSE-NEXT: movapd %xmm1, %xmm0
; CHECK-SSE-NEXT: retl
;
; CHECK-AVX-LABEL: test5:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vshufpd {{.*#+}} xmm0 = xmm1[1],xmm0[0]
; CHECK-AVX-NEXT: retl
%C = shufflevector <4 x float> %A, <4 x float> %B, <4 x i32> < i32 6, i32 7, i32 undef, i32 1 >
@@ -95,20 +95,20 @@ define <4 x float> @test5(<4 x float> %A
define <8 x i16> @test6(<8 x i16> %A, <8 x i16> %B) nounwind {
; CHECK-SSE2-LABEL: test6:
-; CHECK-SSE2: # BB#0:
+; CHECK-SSE2: # %bb.0:
; CHECK-SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
; CHECK-SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5]
; CHECK-SSE2-NEXT: por %xmm1, %xmm0
; CHECK-SSE2-NEXT: retl
;
; CHECK-SSSE3-LABEL: test6:
-; CHECK-SSSE3: # BB#0:
+; CHECK-SSSE3: # %bb.0:
; CHECK-SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5]
; CHECK-SSSE3-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSSE3-NEXT: retl
;
; CHECK-AVX-LABEL: test6:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5]
; CHECK-AVX-NEXT: retl
%C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 3, i32 4, i32 undef, i32 6, i32 7, i32 8, i32 9, i32 10 >
@@ -117,20 +117,20 @@ define <8 x i16> @test6(<8 x i16> %A, <8
define <8 x i16> @test7(<8 x i16> %A, <8 x i16> %B) nounwind {
; CHECK-SSE2-LABEL: test7:
-; CHECK-SSE2: # BB#0:
+; CHECK-SSE2: # %bb.0:
; CHECK-SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
; CHECK-SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7,8,9]
; CHECK-SSE2-NEXT: por %xmm1, %xmm0
; CHECK-SSE2-NEXT: retl
;
; CHECK-SSSE3-LABEL: test7:
-; CHECK-SSSE3: # BB#0:
+; CHECK-SSSE3: # %bb.0:
; CHECK-SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9]
; CHECK-SSSE3-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSSE3-NEXT: retl
;
; CHECK-AVX-LABEL: test7:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9]
; CHECK-AVX-NEXT: retl
%C = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 undef, i32 6, i32 undef, i32 8, i32 9, i32 10, i32 11, i32 12 >
@@ -139,20 +139,20 @@ define <8 x i16> @test7(<8 x i16> %A, <8
define <16 x i8> @test8(<16 x i8> %A, <16 x i8> %B) nounwind {
; CHECK-SSE2-LABEL: test8:
-; CHECK-SSE2: # BB#0:
+; CHECK-SSE2: # %bb.0:
; CHECK-SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[5,6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero
; CHECK-SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4]
; CHECK-SSE2-NEXT: por %xmm1, %xmm0
; CHECK-SSE2-NEXT: retl
;
; CHECK-SSSE3-LABEL: test8:
-; CHECK-SSSE3: # BB#0:
+; CHECK-SSSE3: # %bb.0:
; CHECK-SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4]
; CHECK-SSSE3-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSSE3-NEXT: retl
;
; CHECK-AVX-LABEL: test8:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4]
; CHECK-AVX-NEXT: retl
%C = shufflevector <16 x i8> %A, <16 x i8> %B, <16 x i32> < i32 5, i32 6, i32 7, i32 undef, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20 >
@@ -165,7 +165,7 @@ define <16 x i8> @test8(<16 x i8> %A, <1
; was an UNDEF.)
define <8 x i16> @test9(<8 x i16> %A, <8 x i16> %B) nounwind {
; CHECK-SSE2-LABEL: test9:
-; CHECK-SSE2: # BB#0:
+; CHECK-SSE2: # %bb.0:
; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSE2-NEXT: psrldq {{.*#+}} xmm0 = xmm0[2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero,zero
; CHECK-SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
@@ -174,13 +174,13 @@ define <8 x i16> @test9(<8 x i16> %A, <8
; CHECK-SSE2-NEXT: retl
;
; CHECK-SSSE3-LABEL: test9:
-; CHECK-SSSE3: # BB#0:
+; CHECK-SSSE3: # %bb.0:
; CHECK-SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm1[2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1]
; CHECK-SSSE3-NEXT: movdqa %xmm1, %xmm0
; CHECK-SSSE3-NEXT: retl
;
; CHECK-AVX-LABEL: test9:
-; CHECK-AVX: # BB#0:
+; CHECK-AVX: # %bb.0:
; CHECK-AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1]
; CHECK-AVX-NEXT: retl
%C = shufflevector <8 x i16> %B, <8 x i16> %A, <8 x i32> < i32 undef, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0 >
Modified: llvm/trunk/test/CodeGen/X86/pause.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pause.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pause.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pause.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define void @test_x86_sse2_pause() {
; CHECK-LABEL: test_x86_sse2_pause:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: pause ## encoding: [0xf3,0x90]
; CHECK-NEXT: retl ## encoding: [0xc3]
tail call void @llvm.x86.sse2.pause()
Modified: llvm/trunk/test/CodeGen/X86/peep-setb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-setb.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-setb.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-setb.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define i8 @test1(i8 %a, i8 %b) nounwind {
; CHECK-LABEL: test1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpb %sil, %dil
; CHECK-NEXT: adcb $0, %sil
; CHECK-NEXT: movl %esi, %eax
@@ -19,7 +19,7 @@ define i8 @test1(i8 %a, i8 %b) nounwind
define i32 @test2(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: test2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: adcl $0, %esi
; CHECK-NEXT: movl %esi, %eax
@@ -32,7 +32,7 @@ define i32 @test2(i32 %a, i32 %b) nounwi
define i64 @test3(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: test3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpq %rsi, %rdi
; CHECK-NEXT: adcq $0, %rsi
; CHECK-NEXT: movq %rsi, %rax
@@ -45,7 +45,7 @@ define i64 @test3(i64 %a, i64 %b) nounwi
define i8 @test4(i8 %a, i8 %b) nounwind {
; CHECK-LABEL: test4:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpb %sil, %dil
; CHECK-NEXT: sbbb $0, %sil
; CHECK-NEXT: movl %esi, %eax
@@ -58,7 +58,7 @@ define i8 @test4(i8 %a, i8 %b) nounwind
define i32 @test5(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: test5:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: sbbl $0, %esi
; CHECK-NEXT: movl %esi, %eax
@@ -71,7 +71,7 @@ define i32 @test5(i32 %a, i32 %b) nounwi
define i64 @test6(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: test6:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpq %rsi, %rdi
; CHECK-NEXT: sbbq $0, %rsi
; CHECK-NEXT: movq %rsi, %rax
@@ -84,7 +84,7 @@ define i64 @test6(i64 %a, i64 %b) nounwi
define i8 @test7(i8 %a, i8 %b) nounwind {
; CHECK-LABEL: test7:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpb %sil, %dil
; CHECK-NEXT: adcb $0, %sil
; CHECK-NEXT: movl %esi, %eax
@@ -97,7 +97,7 @@ define i8 @test7(i8 %a, i8 %b) nounwind
define i32 @test8(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: test8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: adcl $0, %esi
; CHECK-NEXT: movl %esi, %eax
@@ -110,7 +110,7 @@ define i32 @test8(i32 %a, i32 %b) nounwi
define i64 @test9(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: test9:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpq %rsi, %rdi
; CHECK-NEXT: adcq $0, %rsi
; CHECK-NEXT: movq %rsi, %rax
Modified: llvm/trunk/test/CodeGen/X86/peep-test-4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peep-test-4.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peep-test-4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peep-test-4.ll Mon Dec 4 09:18:51 2017
@@ -6,10 +6,10 @@ declare void @foo64(i64)
define void @neg(i32 %x) nounwind {
; CHECK-LABEL: neg:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: negl %edi
; CHECK-NEXT: je .LBB0_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB0_1: # %return
; CHECK-NEXT: retq
@@ -27,10 +27,10 @@ return:
define void @sar(i32 %x) nounwind {
; CHECK-LABEL: sar:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: sarl %edi
; CHECK-NEXT: je .LBB1_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB1_1: # %return
; CHECK-NEXT: retq
@@ -48,10 +48,10 @@ return:
define void @shr(i32 %x) nounwind {
; CHECK-LABEL: shr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: shrl %edi
; CHECK-NEXT: je .LBB2_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB2_1: # %return
; CHECK-NEXT: retq
@@ -69,10 +69,10 @@ return:
define void @shri(i32 %x) nounwind {
; CHECK-LABEL: shri:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: shrl $3, %edi
; CHECK-NEXT: je .LBB3_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB3_1: # %return
; CHECK-NEXT: retq
@@ -90,10 +90,10 @@ return:
define void @shl(i32 %x) nounwind {
; CHECK-LABEL: shl:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: addl %edi, %edi
; CHECK-NEXT: je .LBB4_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB4_1: # %return
; CHECK-NEXT: retq
@@ -111,10 +111,10 @@ return:
define void @shli(i32 %x) nounwind {
; CHECK-LABEL: shli:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: shll $4, %edi
; CHECK-NEXT: je .LBB5_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB5_1: # %return
; CHECK-NEXT: retq
@@ -132,7 +132,7 @@ return:
define zeroext i1 @adc(i128 %x) nounwind {
; CHECK-LABEL: adc:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
; CHECK-NEXT: addq %rdi, %rax
; CHECK-NEXT: adcq $0, %rsi
@@ -145,7 +145,7 @@ define zeroext i1 @adc(i128 %x) nounwind
define zeroext i1 @sbb(i128 %x, i128 %y) nounwind {
; CHECK-LABEL: sbb:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpq %rdx, %rdi
; CHECK-NEXT: sbbq %rcx, %rsi
; CHECK-NEXT: setns %al
@@ -157,10 +157,10 @@ define zeroext i1 @sbb(i128 %x, i128 %y)
define void @andn(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: andn:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl %esi, %edi, %edi
; CHECK-NEXT: je .LBB8_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB8_1: # %return
; CHECK-NEXT: retq
@@ -180,10 +180,10 @@ return:
declare i32 @llvm.x86.bmi.bextr.32(i32, i32) nounwind readnone
define void @bextr(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: bextr:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: bextrl %esi, %edi, %edi
; CHECK-NEXT: je .LBB9_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB9_1: # %return
; CHECK-NEXT: retq
@@ -202,10 +202,10 @@ return:
declare i32 @llvm.ctpop.i32(i32) nounwind readnone
define void @popcnt(i32 %x) nounwind {
; CHECK-LABEL: popcnt:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: popcntl %edi, %edi
; CHECK-NEXT: je .LBB10_1
-; CHECK-NEXT: # BB#2: # %bb
+; CHECK-NEXT: # %bb.2: # %bb
; CHECK-NEXT: jmp foo # TAILCALL
; CHECK-NEXT: .LBB10_1: # %return
; CHECK-NEXT: retq
@@ -222,7 +222,7 @@ return:
declare i64 @llvm.cttz.i64(i64, i1)
define i64 @testCTZ(i64 %v) nounwind {
; CHECK-LABEL: testCTZ:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntq %rdi, %rcx
; CHECK-NEXT: movl $255, %eax
; CHECK-NEXT: cmovaeq %rcx, %rax
@@ -236,11 +236,11 @@ define i64 @testCTZ(i64 %v) nounwind {
declare i32 @llvm.cttz.i32(i32, i1)
define void @testCTZ2(i32 %v) nounwind {
; CHECK-LABEL: testCTZ2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: tzcntl %edi, %ebx
; CHECK-NEXT: jb .LBB12_2
-; CHECK-NEXT: # BB#1: # %bb
+; CHECK-NEXT: # %bb.1: # %bb
; CHECK-NEXT: movl %ebx, %edi
; CHECK-NEXT: callq foo
; CHECK-NEXT: .LBB12_2: # %return
@@ -262,11 +262,11 @@ return:
define void @testCTZ3(i32 %v) nounwind {
; CHECK-LABEL: testCTZ3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rbx
; CHECK-NEXT: tzcntl %edi, %ebx
; CHECK-NEXT: jae .LBB13_2
-; CHECK-NEXT: # BB#1: # %bb
+; CHECK-NEXT: # %bb.1: # %bb
; CHECK-NEXT: movl %ebx, %edi
; CHECK-NEXT: callq foo
; CHECK-NEXT: .LBB13_2: # %return
@@ -289,7 +289,7 @@ return:
declare i64 @llvm.ctlz.i64(i64, i1)
define i64 @testCLZ(i64 %v) nounwind {
; CHECK-LABEL: testCLZ:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: lzcntq %rdi, %rcx
; CHECK-NEXT: movl $255, %eax
; CHECK-NEXT: cmovaeq %rcx, %rax
@@ -303,7 +303,7 @@ define i64 @testCLZ(i64 %v) nounwind {
declare i64 @llvm.ctpop.i64(i64)
define i64 @testPOPCNT(i64 %v) nounwind {
; CHECK-LABEL: testPOPCNT:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: popcntq %rdi, %rcx
; CHECK-NEXT: movl $255, %eax
; CHECK-NEXT: cmovneq %rcx, %rax
Modified: llvm/trunk/test/CodeGen/X86/peephole-cvt-sse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peephole-cvt-sse.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peephole-cvt-sse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peephole-cvt-sse.ll Mon Dec 4 09:18:51 2017
@@ -6,12 +6,12 @@
define <2 x double> @peephole_cvtps2pd(<4 x float>* %a0) {
; X86-64-LABEL: peephole_cvtps2pd:
-; X86-64: # BB#0:
+; X86-64: # %bb.0:
; X86-64-NEXT: cvtps2pd (%rdi), %xmm0
; X86-64-NEXT: retq
;
; I386-LABEL: peephole_cvtps2pd:
-; I386: # BB#0:
+; I386: # %bb.0:
; I386-NEXT: movl {{[0-9]+}}(%esp), %eax
; I386-NEXT: cvtps2pd (%eax), %xmm0
; I386-NEXT: retl
@@ -23,12 +23,12 @@ define <2 x double> @peephole_cvtps2pd(<
define <2 x double> @peephole_cvtdq2pd(<4 x i32>* %a0) {
; X86-64-LABEL: peephole_cvtdq2pd:
-; X86-64: # BB#0:
+; X86-64: # %bb.0:
; X86-64-NEXT: cvtdq2pd (%rdi), %xmm0
; X86-64-NEXT: retq
;
; I386-LABEL: peephole_cvtdq2pd:
-; I386: # BB#0:
+; I386: # %bb.0:
; I386-NEXT: movl {{[0-9]+}}(%esp), %eax
; I386-NEXT: cvtdq2pd (%eax), %xmm0
; I386-NEXT: retl
Modified: llvm/trunk/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peephole-na-phys-copy-folding.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peephole-na-phys-copy-folding.ll (original)
+++ llvm/trunk/test/CodeGen/X86/peephole-na-phys-copy-folding.ll Mon Dec 4 09:18:51 2017
@@ -16,14 +16,14 @@ declare i32 @bar(i64)
define i1 @plus_one() nounwind {
; CHECK32-LABEL: plus_one:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: incl L
; CHECK32-NEXT: jne .LBB0_2
-; CHECK32-NEXT: # BB#1: # %entry
+; CHECK32-NEXT: # %bb.1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB0_2
-; CHECK32-NEXT: # BB#3: # %exit2
+; CHECK32-NEXT: # %bb.3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB0_2: # %exit
@@ -31,14 +31,14 @@ define i1 @plus_one() nounwind {
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: plus_one:
-; CHECK64: # BB#0: # %entry
+; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: incl {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB0_2
-; CHECK64-NEXT: # BB#1: # %entry
+; CHECK64-NEXT: # %bb.1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB0_2
-; CHECK64-NEXT: # BB#3: # %exit2
+; CHECK64-NEXT: # %bb.3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB0_2: # %exit
@@ -64,14 +64,14 @@ exit2:
define i1 @plus_forty_two() nounwind {
; CHECK32-LABEL: plus_forty_two:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: addl $42, L
; CHECK32-NEXT: jne .LBB1_2
-; CHECK32-NEXT: # BB#1: # %entry
+; CHECK32-NEXT: # %bb.1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB1_2
-; CHECK32-NEXT: # BB#3: # %exit2
+; CHECK32-NEXT: # %bb.3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB1_2: # %exit
@@ -79,14 +79,14 @@ define i1 @plus_forty_two() nounwind {
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: plus_forty_two:
-; CHECK64: # BB#0: # %entry
+; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: addl $42, {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB1_2
-; CHECK64-NEXT: # BB#1: # %entry
+; CHECK64-NEXT: # %bb.1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB1_2
-; CHECK64-NEXT: # BB#3: # %exit2
+; CHECK64-NEXT: # %bb.3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB1_2: # %exit
@@ -112,14 +112,14 @@ exit2:
define i1 @minus_one() nounwind {
; CHECK32-LABEL: minus_one:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: decl L
; CHECK32-NEXT: jne .LBB2_2
-; CHECK32-NEXT: # BB#1: # %entry
+; CHECK32-NEXT: # %bb.1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB2_2
-; CHECK32-NEXT: # BB#3: # %exit2
+; CHECK32-NEXT: # %bb.3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB2_2: # %exit
@@ -127,14 +127,14 @@ define i1 @minus_one() nounwind {
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: minus_one:
-; CHECK64: # BB#0: # %entry
+; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: decl {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB2_2
-; CHECK64-NEXT: # BB#1: # %entry
+; CHECK64-NEXT: # %bb.1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB2_2
-; CHECK64-NEXT: # BB#3: # %exit2
+; CHECK64-NEXT: # %bb.3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB2_2: # %exit
@@ -160,14 +160,14 @@ exit2:
define i1 @minus_forty_two() nounwind {
; CHECK32-LABEL: minus_forty_two:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movb M, %al
; CHECK32-NEXT: addl $-42, L
; CHECK32-NEXT: jne .LBB3_2
-; CHECK32-NEXT: # BB#1: # %entry
+; CHECK32-NEXT: # %bb.1: # %entry
; CHECK32-NEXT: andb $8, %al
; CHECK32-NEXT: je .LBB3_2
-; CHECK32-NEXT: # BB#3: # %exit2
+; CHECK32-NEXT: # %bb.3: # %exit2
; CHECK32-NEXT: xorl %eax, %eax
; CHECK32-NEXT: retl
; CHECK32-NEXT: .LBB3_2: # %exit
@@ -175,14 +175,14 @@ define i1 @minus_forty_two() nounwind {
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: minus_forty_two:
-; CHECK64: # BB#0: # %entry
+; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: movb {{.*}}(%rip), %al
; CHECK64-NEXT: addl $-42, {{.*}}(%rip)
; CHECK64-NEXT: jne .LBB3_2
-; CHECK64-NEXT: # BB#1: # %entry
+; CHECK64-NEXT: # %bb.1: # %entry
; CHECK64-NEXT: andb $8, %al
; CHECK64-NEXT: je .LBB3_2
-; CHECK64-NEXT: # BB#3: # %exit2
+; CHECK64-NEXT: # %bb.3: # %exit2
; CHECK64-NEXT: xorl %eax, %eax
; CHECK64-NEXT: retq
; CHECK64-NEXT: .LBB3_2: # %exit
@@ -208,7 +208,7 @@ exit2:
define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) nounwind {
; CHECK32-LABEL: test_intervening_call:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: pushl %ebp
; CHECK32-NEXT: movl %esp, %ebp
; CHECK32-NEXT: pushl %ebx
@@ -233,7 +233,7 @@ define i64 @test_intervening_call(i64* %
; CHECK32-NEXT: addb $127, %al
; CHECK32-NEXT: sahf
; CHECK32-NEXT: jne .LBB4_3
-; CHECK32-NEXT: # BB#1: # %t
+; CHECK32-NEXT: # %bb.1: # %t
; CHECK32-NEXT: movl $42, %eax
; CHECK32-NEXT: jmp .LBB4_2
; CHECK32-NEXT: .LBB4_3: # %f
@@ -246,7 +246,7 @@ define i64 @test_intervening_call(i64* %
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: test_intervening_call:
-; CHECK64: # BB#0: # %entry
+; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: pushq %rbp
; CHECK64-NEXT: movq %rsp, %rbp
; CHECK64-NEXT: pushq %rbx
@@ -264,7 +264,7 @@ define i64 @test_intervening_call(i64* %
; CHECK64-NEXT: addb $127, %al
; CHECK64-NEXT: sahf
; CHECK64-NEXT: jne .LBB4_3
-; CHECK64-NEXT: # BB#1: # %t
+; CHECK64-NEXT: # %bb.1: # %t
; CHECK64-NEXT: movl $42, %eax
; CHECK64-NEXT: jmp .LBB4_2
; CHECK64-NEXT: .LBB4_3: # %f
@@ -291,7 +291,7 @@ f:
define i64 @test_two_live_flags(i64* %foo0, i64 %bar0, i64 %baz0, i64* %foo1, i64 %bar1, i64 %baz1) nounwind {
; CHECK32-LABEL: test_two_live_flags:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: pushl %ebp
; CHECK32-NEXT: movl %esp, %ebp
; CHECK32-NEXT: pushl %ebx
@@ -320,10 +320,10 @@ define i64 @test_two_live_flags(i64* %fo
; CHECK32-NEXT: sahf
; CHECK32-NEXT: popl %eax
; CHECK32-NEXT: jne .LBB5_4
-; CHECK32-NEXT: # BB#1: # %entry
+; CHECK32-NEXT: # %bb.1: # %entry
; CHECK32-NEXT: testb %al, %al
; CHECK32-NEXT: je .LBB5_4
-; CHECK32-NEXT: # BB#2: # %t
+; CHECK32-NEXT: # %bb.2: # %t
; CHECK32-NEXT: movl $42, %eax
; CHECK32-NEXT: jmp .LBB5_3
; CHECK32-NEXT: .LBB5_4: # %f
@@ -337,7 +337,7 @@ define i64 @test_two_live_flags(i64* %fo
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: test_two_live_flags:
-; CHECK64: # BB#0: # %entry
+; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: pushq %rbp
; CHECK64-NEXT: movq %rsp, %rbp
; CHECK64-NEXT: movq %rsi, %rax
@@ -354,10 +354,10 @@ define i64 @test_two_live_flags(i64* %fo
; CHECK64-NEXT: sahf
; CHECK64-NEXT: popq %rax
; CHECK64-NEXT: jne .LBB5_3
-; CHECK64-NEXT: # BB#1: # %entry
+; CHECK64-NEXT: # %bb.1: # %entry
; CHECK64-NEXT: testb %al, %al
; CHECK64-NEXT: je .LBB5_3
-; CHECK64-NEXT: # BB#2: # %t
+; CHECK64-NEXT: # %bb.2: # %t
; CHECK64-NEXT: movl $42, %eax
; CHECK64-NEXT: popq %rbp
; CHECK64-NEXT: retq
@@ -382,7 +382,7 @@ f:
define i1 @asm_clobbering_flags(i32* %mem) nounwind {
; CHECK32-LABEL: asm_clobbering_flags:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK32-NEXT: movl (%ecx), %edx
; CHECK32-NEXT: testl %edx, %edx
@@ -394,7 +394,7 @@ define i1 @asm_clobbering_flags(i32* %me
; CHECK32-NEXT: retl
;
; CHECK64-LABEL: asm_clobbering_flags:
-; CHECK64: # BB#0: # %entry
+; CHECK64: # %bb.0: # %entry
; CHECK64-NEXT: movl (%rdi), %ecx
; CHECK64-NEXT: testl %ecx, %ecx
; CHECK64-NEXT: setg %al
Modified: llvm/trunk/test/CodeGen/X86/peephole-recurrence.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/peephole-recurrence.mir?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/peephole-recurrence.mir (original)
+++ llvm/trunk/test/CodeGen/X86/peephole-recurrence.mir Mon Dec 4 09:18:51 2017
@@ -89,44 +89,44 @@ liveins:
- { reg: '%edi', virtual-reg: '%4' }
body: |
bb.0.bb0:
- successors: %bb.1.bb1(0x80000000)
+ successors: %bb.1(0x80000000)
liveins: %edi
%4 = COPY %edi
%5 = MOV32r0 implicit-def dead %eflags
bb.1.bb1:
- successors: %bb.3.bb4(0x30000000), %bb.2.bb3(0x50000000)
+ successors: %bb.3(0x30000000), %bb.2(0x50000000)
- ; CHECK: %0:gr32 = PHI %5, %bb.0.bb0, %3, %bb.5.bb7
- %0 = PHI %5, %bb.0.bb0, %3, %bb.5.bb7
+ ; CHECK: %0:gr32 = PHI %5, %bb.0, %3, %bb.5
+ %0 = PHI %5, %bb.0, %3, %bb.5
%6 = MOV32ri 1
TEST32rr %4, %4, implicit-def %eflags
- JE_1 %bb.3.bb4, implicit %eflags
- JMP_1 %bb.2.bb3
+ JE_1 %bb.3, implicit %eflags
+ JMP_1 %bb.2
bb.2.bb3:
- successors: %bb.3.bb4(0x80000000)
+ successors: %bb.3(0x80000000)
%7 = MOV32ri 2
bb.3.bb4:
- successors: %bb.5.bb7(0x30000000), %bb.4.bb6(0x50000000)
+ successors: %bb.5(0x30000000), %bb.4(0x50000000)
- %1 = PHI %6, %bb.1.bb1, %7, %bb.2.bb3
+ %1 = PHI %6, %bb.1, %7, %bb.2
TEST32rr %1, %1, implicit-def %eflags
- JE_1 %bb.5.bb7, implicit %eflags
- JMP_1 %bb.4.bb6
+ JE_1 %bb.5, implicit %eflags
+ JMP_1 %bb.4
bb.4.bb6:
- successors: %bb.5.bb7(0x80000000)
+ successors: %bb.5(0x80000000)
%9 = MOV32ri 2
bb.5.bb7:
- successors: %bb.1.bb1(0x7c000000), %bb.6.bb8(0x04000000)
+ successors: %bb.1(0x7c000000), %bb.6(0x04000000)
- %2 = PHI %6, %bb.3.bb4, %9, %bb.4.bb6
+ %2 = PHI %6, %bb.3, %9, %bb.4
%10 = ADD32rr %1, %0, implicit-def dead %eflags
; CHECK: %10:gr32 = ADD32rr
; CHECK-SAME: %0,
@@ -136,8 +136,8 @@ body: |
; CHECK-SAME: %10,
; CHECK-SAME: %2,
%11 = SUB32ri8 %3, 10, implicit-def %eflags
- JL_1 %bb.1.bb1, implicit %eflags
- JMP_1 %bb.6.bb8
+ JL_1 %bb.1, implicit %eflags
+ JMP_1 %bb.6
bb.6.bb8:
%12 = MOV32r0 implicit-def dead %eflags
@@ -172,7 +172,7 @@ liveins:
- { reg: '%rsi', virtual-reg: '%5' }
body: |
bb.0.bb0:
- successors: %bb.1.bb1(0x80000000)
+ successors: %bb.1(0x80000000)
liveins: %edi, %rsi
%5 = COPY %rsi
@@ -180,37 +180,37 @@ body: |
%6 = MOV32r0 implicit-def dead %eflags
bb.1.bb1:
- successors: %bb.3.bb4(0x30000000), %bb.2.bb3(0x50000000)
+ successors: %bb.3(0x30000000), %bb.2(0x50000000)
- %0 = PHI %6, %bb.0.bb0, %3, %bb.5.bb7
- ; CHECK: %0:gr32 = PHI %6, %bb.0.bb0, %3, %bb.5.bb7
+ %0 = PHI %6, %bb.0, %3, %bb.5
+ ; CHECK: %0:gr32 = PHI %6, %bb.0, %3, %bb.5
%7 = MOV32ri 1
TEST32rr %4, %4, implicit-def %eflags
- JE_1 %bb.3.bb4, implicit %eflags
- JMP_1 %bb.2.bb3
+ JE_1 %bb.3, implicit %eflags
+ JMP_1 %bb.2
bb.2.bb3:
- successors: %bb.3.bb4(0x80000000)
+ successors: %bb.3(0x80000000)
%8 = MOV32ri 2
bb.3.bb4:
- successors: %bb.5.bb7(0x30000000), %bb.4.bb6(0x50000000)
+ successors: %bb.5(0x30000000), %bb.4(0x50000000)
- %1 = PHI %7, %bb.1.bb1, %8, %bb.2.bb3
+ %1 = PHI %7, %bb.1, %8, %bb.2
TEST32rr %1, %1, implicit-def %eflags
- JE_1 %bb.5.bb7, implicit %eflags
- JMP_1 %bb.4.bb6
+ JE_1 %bb.5, implicit %eflags
+ JMP_1 %bb.4
bb.4.bb6:
- successors: %bb.5.bb7(0x80000000)
+ successors: %bb.5(0x80000000)
%10 = MOV32ri 2
bb.5.bb7:
- successors: %bb.1.bb1(0x7c000000), %bb.6.bb8(0x04000000)
+ successors: %bb.1(0x7c000000), %bb.6(0x04000000)
- %2 = PHI %7, %bb.3.bb4, %10, %bb.4.bb6
+ %2 = PHI %7, %bb.3, %10, %bb.4
%11 = ADD32rr %1, %0, implicit-def dead %eflags
; CHECK: %11:gr32 = ADD32rr
; CHECK-SAME: %1,
@@ -221,8 +221,8 @@ body: |
; CHECK-SAME: %2,
; CHECK-SAME: %11,
%12 = SUB32ri8 %3, 10, implicit-def %eflags
- JL_1 %bb.1.bb1, implicit %eflags
- JMP_1 %bb.6.bb8
+ JL_1 %bb.1, implicit %eflags
+ JMP_1 %bb.6
bb.6.bb8:
%13 = MOV32r0 implicit-def dead %eflags
Modified: llvm/trunk/test/CodeGen/X86/phaddsub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/phaddsub.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/phaddsub.ll (original)
+++ llvm/trunk/test/CodeGen/X86/phaddsub.ll Mon Dec 4 09:18:51 2017
@@ -4,12 +4,12 @@
define <8 x i16> @phaddw1(<8 x i16> %x, <8 x i16> %y) {
; SSSE3-LABEL: phaddw1:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddw %xmm1, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddw1:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddw %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
@@ -20,12 +20,12 @@ define <8 x i16> @phaddw1(<8 x i16> %x,
define <8 x i16> @phaddw2(<8 x i16> %x, <8 x i16> %y) {
; SSSE3-LABEL: phaddw2:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddw %xmm1, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddw2:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddw %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 1, i32 2, i32 5, i32 6, i32 9, i32 10, i32 13, i32 14>
@@ -36,12 +36,12 @@ define <8 x i16> @phaddw2(<8 x i16> %x,
define <4 x i32> @phaddd1(<4 x i32> %x, <4 x i32> %y) {
; SSSE3-LABEL: phaddd1:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddd %xmm1, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddd1:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddd %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
@@ -52,12 +52,12 @@ define <4 x i32> @phaddd1(<4 x i32> %x,
define <4 x i32> @phaddd2(<4 x i32> %x, <4 x i32> %y) {
; SSSE3-LABEL: phaddd2:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddd %xmm1, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddd2:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddd %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 1, i32 2, i32 5, i32 6>
@@ -68,12 +68,12 @@ define <4 x i32> @phaddd2(<4 x i32> %x,
define <4 x i32> @phaddd3(<4 x i32> %x) {
; SSSE3-LABEL: phaddd3:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddd3:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6>
@@ -84,12 +84,12 @@ define <4 x i32> @phaddd3(<4 x i32> %x)
define <4 x i32> @phaddd4(<4 x i32> %x) {
; SSSE3-LABEL: phaddd4:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddd4:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
@@ -100,12 +100,12 @@ define <4 x i32> @phaddd4(<4 x i32> %x)
define <4 x i32> @phaddd5(<4 x i32> %x) {
; SSSE3-LABEL: phaddd5:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddd5:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 3, i32 undef, i32 undef>
@@ -116,12 +116,12 @@ define <4 x i32> @phaddd5(<4 x i32> %x)
define <4 x i32> @phaddd6(<4 x i32> %x) {
; SSSE3-LABEL: phaddd6:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddd6:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
@@ -132,12 +132,12 @@ define <4 x i32> @phaddd6(<4 x i32> %x)
define <4 x i32> @phaddd7(<4 x i32> %x) {
; SSSE3-LABEL: phaddd7:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phaddd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phaddd7:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphaddd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 3, i32 undef, i32 undef>
@@ -148,12 +148,12 @@ define <4 x i32> @phaddd7(<4 x i32> %x)
define <8 x i16> @phsubw1(<8 x i16> %x, <8 x i16> %y) {
; SSSE3-LABEL: phsubw1:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phsubw %xmm1, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phsubw1:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphsubw %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
@@ -164,12 +164,12 @@ define <8 x i16> @phsubw1(<8 x i16> %x,
define <4 x i32> @phsubd1(<4 x i32> %x, <4 x i32> %y) {
; SSSE3-LABEL: phsubd1:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phsubd %xmm1, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phsubd1:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphsubd %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
@@ -180,12 +180,12 @@ define <4 x i32> @phsubd1(<4 x i32> %x,
define <4 x i32> @phsubd2(<4 x i32> %x) {
; SSSE3-LABEL: phsubd2:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phsubd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phsubd2:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphsubd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 undef, i32 2, i32 4, i32 6>
@@ -196,12 +196,12 @@ define <4 x i32> @phsubd2(<4 x i32> %x)
define <4 x i32> @phsubd3(<4 x i32> %x) {
; SSSE3-LABEL: phsubd3:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phsubd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phsubd3:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphsubd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 undef, i32 undef>
@@ -212,12 +212,12 @@ define <4 x i32> @phsubd3(<4 x i32> %x)
define <4 x i32> @phsubd4(<4 x i32> %x) {
; SSSE3-LABEL: phsubd4:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: phsubd %xmm0, %xmm0
; SSSE3-NEXT: retq
;
; AVX-LABEL: phsubd4:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vphsubd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq
%a = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
@@ -228,7 +228,7 @@ define <4 x i32> @phsubd4(<4 x i32> %x)
define <8 x i16> @phsubw1_reverse(<8 x i16> %x, <8 x i16> %y) {
; SSSE3-LABEL: phsubw1_reverse:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [2,3,6,7,10,11,14,15,14,15,10,11,12,13,14,15]
; SSSE3-NEXT: movdqa %xmm1, %xmm4
; SSSE3-NEXT: pshufb %xmm3, %xmm4
@@ -244,7 +244,7 @@ define <8 x i16> @phsubw1_reverse(<8 x i
; SSSE3-NEXT: retq
;
; AVX-LABEL: phsubw1_reverse:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [2,3,6,7,10,11,14,15,14,15,10,11,12,13,14,15]
; AVX-NEXT: vpshufb %xmm2, %xmm1, %xmm3
; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm2
@@ -263,7 +263,7 @@ define <8 x i16> @phsubw1_reverse(<8 x i
define <4 x i32> @phsubd1_reverse(<4 x i32> %x, <4 x i32> %y) {
; SSSE3-LABEL: phsubd1_reverse:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: movaps %xmm0, %xmm2
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm1[1,3]
; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
@@ -272,7 +272,7 @@ define <4 x i32> @phsubd1_reverse(<4 x i
; SSSE3-NEXT: retq
;
; AVX-LABEL: phsubd1_reverse:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vshufps {{.*#+}} xmm2 = xmm0[1,3],xmm1[1,3]
; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; AVX-NEXT: vpsubd %xmm0, %xmm2, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/pku.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pku.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pku.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pku.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@ declare void @llvm.x86.wrpkru(i32)
define void @test_x86_wrpkru(i32 %src) {
; CHECK-LABEL: test_x86_wrpkru:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: movl %edi, %eax
@@ -16,7 +16,7 @@ define void @test_x86_wrpkru(i32 %src) {
define i32 @test_x86_rdpkru() {
; CHECK-LABEL: test_x86_rdpkru:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: xorl %ecx, %ecx
; CHECK-NEXT: rdpkru
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pmovsx-inreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pmovsx-inreg.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pmovsx-inreg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pmovsx-inreg.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@
define void @test1(<2 x i8>* %in, <2 x i64>* %out) nounwind {
; SSE41-LABEL: test1:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxbq (%rdi), %xmm0
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: movups %xmm1, (%rax)
@@ -17,7 +17,7 @@ define void @test1(<2 x i8>* %in, <2 x i
; SSE41-NEXT: retq
;
; AVX-LABEL: test1:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmovsxbq (%rdi), %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovups %xmm1, (%rax)
@@ -25,7 +25,7 @@ define void @test1(<2 x i8>* %in, <2 x i
; AVX-NEXT: retq
;
; X32-AVX2-LABEL: test1:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxbq (%ecx), %xmm0
@@ -42,7 +42,7 @@ define void @test1(<2 x i8>* %in, <2 x i
define void @test2(<4 x i8>* %in, <4 x i64>* %out) nounwind {
; SSE41-LABEL: test2:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxbq (%rdi), %xmm0
; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1
; SSE41-NEXT: xorps %xmm2, %xmm2
@@ -52,7 +52,7 @@ define void @test2(<4 x i8>* %in, <4 x i
; SSE41-NEXT: retq
;
; AVX1-LABEL: test2:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0
; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
@@ -65,7 +65,7 @@ define void @test2(<4 x i8>* %in, <4 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: test2:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vmovups %ymm1, (%rax)
@@ -74,7 +74,7 @@ define void @test2(<4 x i8>* %in, <4 x i
; AVX2-NEXT: retq
;
; X32-AVX2-LABEL: test2:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxbq (%ecx), %ymm0
@@ -92,7 +92,7 @@ define void @test2(<4 x i8>* %in, <4 x i
define void @test3(<4 x i8>* %in, <4 x i32>* %out) nounwind {
; SSE41-LABEL: test3:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxbd (%rdi), %xmm0
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: movups %xmm1, (%rax)
@@ -100,7 +100,7 @@ define void @test3(<4 x i8>* %in, <4 x i
; SSE41-NEXT: retq
;
; AVX-LABEL: test3:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmovsxbd (%rdi), %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovups %xmm1, (%rax)
@@ -108,7 +108,7 @@ define void @test3(<4 x i8>* %in, <4 x i
; AVX-NEXT: retq
;
; X32-AVX2-LABEL: test3:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxbd (%ecx), %xmm0
@@ -125,7 +125,7 @@ define void @test3(<4 x i8>* %in, <4 x i
define void @test4(<8 x i8>* %in, <8 x i32>* %out) nounwind {
; SSE41-LABEL: test4:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxbd (%rdi), %xmm0
; SSE41-NEXT: pmovsxbd 4(%rdi), %xmm1
; SSE41-NEXT: xorps %xmm2, %xmm2
@@ -135,7 +135,7 @@ define void @test4(<8 x i8>* %in, <8 x i
; SSE41-NEXT: retq
;
; AVX1-LABEL: test4:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0
; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
@@ -148,7 +148,7 @@ define void @test4(<8 x i8>* %in, <8 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: test4:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmovsxbd (%rdi), %ymm0
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vmovups %ymm1, (%rax)
@@ -157,7 +157,7 @@ define void @test4(<8 x i8>* %in, <8 x i
; AVX2-NEXT: retq
;
; X32-AVX2-LABEL: test4:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxbd (%ecx), %ymm0
@@ -175,7 +175,7 @@ define void @test4(<8 x i8>* %in, <8 x i
define void @test5(<8 x i8>* %in, <8 x i16>* %out) nounwind {
; SSE41-LABEL: test5:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxbw (%rdi), %xmm0
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: movups %xmm1, (%rax)
@@ -183,7 +183,7 @@ define void @test5(<8 x i8>* %in, <8 x i
; SSE41-NEXT: retq
;
; AVX-LABEL: test5:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmovsxbw (%rdi), %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovups %xmm1, (%rax)
@@ -191,7 +191,7 @@ define void @test5(<8 x i8>* %in, <8 x i
; AVX-NEXT: retq
;
; X32-AVX2-LABEL: test5:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxbw (%ecx), %xmm0
@@ -208,7 +208,7 @@ define void @test5(<8 x i8>* %in, <8 x i
define void @test6(<16 x i8>* %in, <16 x i16>* %out) nounwind {
; SSE41-LABEL: test6:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxbw (%rdi), %xmm0
; SSE41-NEXT: pmovsxbw 8(%rdi), %xmm1
; SSE41-NEXT: xorps %xmm2, %xmm2
@@ -218,7 +218,7 @@ define void @test6(<16 x i8>* %in, <16 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test6:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0
; AVX1-NEXT: vpmovsxbw 8(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -229,7 +229,7 @@ define void @test6(<16 x i8>* %in, <16 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test6:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmovsxbw (%rdi), %ymm0
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vmovups %ymm1, (%rax)
@@ -238,7 +238,7 @@ define void @test6(<16 x i8>* %in, <16 x
; AVX2-NEXT: retq
;
; X32-AVX2-LABEL: test6:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxbw (%ecx), %ymm0
@@ -256,7 +256,7 @@ define void @test6(<16 x i8>* %in, <16 x
define void @test7(<2 x i16>* %in, <2 x i64>* %out) nounwind {
; SSE41-LABEL: test7:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxwq (%rdi), %xmm0
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: movups %xmm1, (%rax)
@@ -264,7 +264,7 @@ define void @test7(<2 x i16>* %in, <2 x
; SSE41-NEXT: retq
;
; AVX-LABEL: test7:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmovsxwq (%rdi), %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovups %xmm1, (%rax)
@@ -272,7 +272,7 @@ define void @test7(<2 x i16>* %in, <2 x
; AVX-NEXT: retq
;
; X32-AVX2-LABEL: test7:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxwq (%ecx), %xmm0
@@ -289,7 +289,7 @@ define void @test7(<2 x i16>* %in, <2 x
define void @test8(<4 x i16>* %in, <4 x i64>* %out) nounwind {
; SSE41-LABEL: test8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxwq (%rdi), %xmm0
; SSE41-NEXT: pmovsxwq 4(%rdi), %xmm1
; SSE41-NEXT: xorps %xmm2, %xmm2
@@ -299,7 +299,7 @@ define void @test8(<4 x i16>* %in, <4 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0
; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
@@ -312,7 +312,7 @@ define void @test8(<4 x i16>* %in, <4 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmovsxwq (%rdi), %ymm0
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vmovups %ymm1, (%rax)
@@ -321,7 +321,7 @@ define void @test8(<4 x i16>* %in, <4 x
; AVX2-NEXT: retq
;
; X32-AVX2-LABEL: test8:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxwq (%ecx), %ymm0
@@ -339,7 +339,7 @@ define void @test8(<4 x i16>* %in, <4 x
define void @test9(<4 x i16>* %in, <4 x i32>* %out) nounwind {
; SSE41-LABEL: test9:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxwd (%rdi), %xmm0
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: movups %xmm1, (%rax)
@@ -347,7 +347,7 @@ define void @test9(<4 x i16>* %in, <4 x
; SSE41-NEXT: retq
;
; AVX-LABEL: test9:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmovsxwd (%rdi), %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovups %xmm1, (%rax)
@@ -355,7 +355,7 @@ define void @test9(<4 x i16>* %in, <4 x
; AVX-NEXT: retq
;
; X32-AVX2-LABEL: test9:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxwd (%ecx), %xmm0
@@ -372,7 +372,7 @@ define void @test9(<4 x i16>* %in, <4 x
define void @test10(<8 x i16>* %in, <8 x i32>* %out) nounwind {
; SSE41-LABEL: test10:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxwd (%rdi), %xmm0
; SSE41-NEXT: pmovsxwd 8(%rdi), %xmm1
; SSE41-NEXT: xorps %xmm2, %xmm2
@@ -382,7 +382,7 @@ define void @test10(<8 x i16>* %in, <8 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test10:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0
; AVX1-NEXT: vpmovsxwd 8(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -393,7 +393,7 @@ define void @test10(<8 x i16>* %in, <8 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test10:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmovsxwd (%rdi), %ymm0
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vmovups %ymm1, (%rax)
@@ -402,7 +402,7 @@ define void @test10(<8 x i16>* %in, <8 x
; AVX2-NEXT: retq
;
; X32-AVX2-LABEL: test10:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxwd (%ecx), %ymm0
@@ -420,7 +420,7 @@ define void @test10(<8 x i16>* %in, <8 x
define void @test11(<2 x i32>* %in, <2 x i64>* %out) nounwind {
; SSE41-LABEL: test11:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxdq (%rdi), %xmm0
; SSE41-NEXT: xorps %xmm1, %xmm1
; SSE41-NEXT: movups %xmm1, (%rax)
@@ -428,7 +428,7 @@ define void @test11(<2 x i32>* %in, <2 x
; SSE41-NEXT: retq
;
; AVX-LABEL: test11:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vpmovsxdq (%rdi), %xmm0
; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovups %xmm1, (%rax)
@@ -436,7 +436,7 @@ define void @test11(<2 x i32>* %in, <2 x
; AVX-NEXT: retq
;
; X32-AVX2-LABEL: test11:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxdq (%ecx), %xmm0
@@ -453,7 +453,7 @@ define void @test11(<2 x i32>* %in, <2 x
define void @test12(<4 x i32>* %in, <4 x i64>* %out) nounwind {
; SSE41-LABEL: test12:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pmovsxdq (%rdi), %xmm0
; SSE41-NEXT: pmovsxdq 8(%rdi), %xmm1
; SSE41-NEXT: xorps %xmm2, %xmm2
@@ -463,7 +463,7 @@ define void @test12(<4 x i32>* %in, <4 x
; SSE41-NEXT: retq
;
; AVX1-LABEL: test12:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpmovsxdq (%rdi), %xmm0
; AVX1-NEXT: vpmovsxdq 8(%rdi), %xmm1
; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
@@ -474,7 +474,7 @@ define void @test12(<4 x i32>* %in, <4 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: test12:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpmovsxdq (%rdi), %ymm0
; AVX2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vmovups %ymm1, (%rax)
@@ -483,7 +483,7 @@ define void @test12(<4 x i32>* %in, <4 x
; AVX2-NEXT: retq
;
; X32-AVX2-LABEL: test12:
-; X32-AVX2: # BB#0:
+; X32-AVX2: # %bb.0:
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-AVX2-NEXT: vpmovsxdq (%ecx), %ymm0
Modified: llvm/trunk/test/CodeGen/X86/pmul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pmul.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pmul.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pmul.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define <16 x i8> @mul_v16i8c(<16 x i8> %i) nounwind {
; SSE2-LABEL: mul_v16i8c:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; SSE2-NEXT: psraw $8, %xmm1
@@ -23,7 +23,7 @@ define <16 x i8> @mul_v16i8c(<16 x i8> %
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v16i8c:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pmovsxbw %xmm0, %xmm1
; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [117,117,117,117,117,117,117,117]
; SSE41-NEXT: pmullw %xmm2, %xmm1
@@ -38,7 +38,7 @@ define <16 x i8> @mul_v16i8c(<16 x i8> %
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v16i8c:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
@@ -50,7 +50,7 @@ define <16 x i8> @mul_v16i8c(<16 x i8> %
; AVX2-NEXT: retq
;
; AVX512F-LABEL: mul_v16i8c:
-; AVX512F: # BB#0: # %entry
+; AVX512F: # %bb.0: # %entry
; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX512F-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0
@@ -59,7 +59,7 @@ define <16 x i8> @mul_v16i8c(<16 x i8> %
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: mul_v16i8c:
-; AVX512BW: # BB#0: # %entry
+; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
@@ -73,12 +73,12 @@ entry:
define <8 x i16> @mul_v8i16c(<8 x i16> %i) nounwind {
; SSE-LABEL: mul_v8i16c:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v8i16c:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
entry:
@@ -88,7 +88,7 @@ entry:
define <4 x i32> @mul_v4i32c(<4 x i32> %i) nounwind {
; SSE2-LABEL: mul_v4i32c:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [117,117,117,117]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE2-NEXT: pmuludq %xmm1, %xmm0
@@ -99,12 +99,12 @@ define <4 x i32> @mul_v4i32c(<4 x i32> %
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v4i32c:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pmulld {{.*}}(%rip), %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v4i32c:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [117,117,117,117]
; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
@@ -115,7 +115,7 @@ entry:
define <2 x i64> @mul_v2i64c(<2 x i64> %i) nounwind {
; SSE-LABEL: mul_v2i64c:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: movdqa {{.*#+}} xmm1 = [117,117]
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: pmuludq %xmm1, %xmm2
@@ -126,7 +126,7 @@ define <2 x i64> @mul_v2i64c(<2 x i64> %
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v2i64c:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [117,117]
; AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2
; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
@@ -141,7 +141,7 @@ entry:
define <16 x i8> @mul_v16i8(<16 x i8> %i, <16 x i8> %j) nounwind {
; SSE2-LABEL: mul_v16i8:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa %xmm1, %xmm2
; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; SSE2-NEXT: psraw $8, %xmm2
@@ -161,7 +161,7 @@ define <16 x i8> @mul_v16i8(<16 x i8> %i
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v16i8:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pmovsxbw %xmm1, %xmm3
; SSE41-NEXT: pmovsxbw %xmm0, %xmm2
; SSE41-NEXT: pmullw %xmm3, %xmm2
@@ -178,7 +178,7 @@ define <16 x i8> @mul_v16i8(<16 x i8> %i
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v16i8:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vpmovsxbw %xmm1, %ymm1
; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0
@@ -191,7 +191,7 @@ define <16 x i8> @mul_v16i8(<16 x i8> %i
; AVX2-NEXT: retq
;
; AVX512F-LABEL: mul_v16i8:
-; AVX512F: # BB#0: # %entry
+; AVX512F: # %bb.0: # %entry
; AVX512F-NEXT: vpmovsxbw %xmm1, %ymm1
; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX512F-NEXT: vpmullw %ymm1, %ymm0, %ymm0
@@ -201,7 +201,7 @@ define <16 x i8> @mul_v16i8(<16 x i8> %i
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: mul_v16i8:
-; AVX512BW: # BB#0: # %entry
+; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmovsxbw %xmm1, %ymm1
; AVX512BW-NEXT: vpmovsxbw %xmm0, %ymm0
; AVX512BW-NEXT: vpmullw %ymm1, %ymm0, %ymm0
@@ -216,12 +216,12 @@ entry:
define <8 x i16> @mul_v8i16(<8 x i16> %i, <8 x i16> %j) nounwind {
; SSE-LABEL: mul_v8i16:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: pmullw %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v8i16:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
entry:
@@ -231,7 +231,7 @@ entry:
define <4 x i32> @mul_v4i32(<4 x i32> %i, <4 x i32> %j) nounwind {
; SSE2-LABEL: mul_v4i32:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSE2-NEXT: pmuludq %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -242,12 +242,12 @@ define <4 x i32> @mul_v4i32(<4 x i32> %i
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v4i32:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pmulld %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v4i32:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
entry:
@@ -257,7 +257,7 @@ entry:
define <2 x i64> @mul_v2i64(<2 x i64> %i, <2 x i64> %j) nounwind {
; SSE-LABEL: mul_v2i64:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: movdqa %xmm0, %xmm2
; SSE-NEXT: psrlq $32, %xmm2
; SSE-NEXT: pmuludq %xmm1, %xmm2
@@ -271,7 +271,7 @@ define <2 x i64> @mul_v2i64(<2 x i64> %i
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v2i64:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpsrlq $32, %xmm0, %xmm2
; AVX-NEXT: vpmuludq %xmm1, %xmm2, %xmm2
; AVX-NEXT: vpsrlq $32, %xmm1, %xmm3
@@ -290,7 +290,7 @@ declare void @foo()
define <4 x i32> @mul_v4i32spill(<4 x i32> %i, <4 x i32> %j) nounwind {
; SSE2-LABEL: mul_v4i32spill:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: subq $40, %rsp
; SSE2-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
; SSE2-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
@@ -308,7 +308,7 @@ define <4 x i32> @mul_v4i32spill(<4 x i3
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v4i32spill:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: subq $40, %rsp
; SSE41-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
; SSE41-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
@@ -319,7 +319,7 @@ define <4 x i32> @mul_v4i32spill(<4 x i3
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v4i32spill:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $40, %rsp
; AVX-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
@@ -337,7 +337,7 @@ entry:
define <2 x i64> @mul_v2i64spill(<2 x i64> %i, <2 x i64> %j) nounwind {
; SSE-LABEL: mul_v2i64spill:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: subq $40, %rsp
; SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
; SSE-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
@@ -358,7 +358,7 @@ define <2 x i64> @mul_v2i64spill(<2 x i6
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v2i64spill:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: subq $40, %rsp
; AVX-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
; AVX-NEXT: vmovaps %xmm0, (%rsp) # 16-byte Spill
@@ -384,7 +384,7 @@ entry:
define <32 x i8> @mul_v32i8c(<32 x i8> %i) nounwind {
; SSE2-LABEL: mul_v32i8c:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa %xmm0, %xmm2
; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; SSE2-NEXT: psraw $8, %xmm2
@@ -410,7 +410,7 @@ define <32 x i8> @mul_v32i8c(<32 x i8> %
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v32i8c:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pmovsxbw %xmm0, %xmm2
; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [117,117,117,117,117,117,117,117]
; SSE41-NEXT: pmullw %xmm4, %xmm2
@@ -434,7 +434,7 @@ define <32 x i8> @mul_v32i8c(<32 x i8> %
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v32i8c:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpmovsxbw %xmm1, %ymm1
; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117]
@@ -454,7 +454,7 @@ define <32 x i8> @mul_v32i8c(<32 x i8> %
; AVX2-NEXT: retq
;
; AVX512F-LABEL: mul_v32i8c:
-; AVX512F: # BB#0: # %entry
+; AVX512F: # %bb.0: # %entry
; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm1
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117]
; AVX512F-NEXT: vpmullw %ymm2, %ymm1, %ymm1
@@ -469,7 +469,7 @@ define <32 x i8> @mul_v32i8c(<32 x i8> %
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: mul_v32i8c:
-; AVX512BW: # BB#0: # %entry
+; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0
; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm0, %zmm0
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
@@ -481,14 +481,14 @@ entry:
define <16 x i16> @mul_v16i16c(<16 x i16> %i) nounwind {
; SSE-LABEL: mul_v16i16c:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: movdqa {{.*#+}} xmm2 = [117,117,117,117,117,117,117,117]
; SSE-NEXT: pmullw %xmm2, %xmm0
; SSE-NEXT: pmullw %xmm2, %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v16i16c:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
; AVX-NEXT: retq
entry:
@@ -498,7 +498,7 @@ entry:
define <8 x i32> @mul_v8i32c(<8 x i32> %i) nounwind {
; SSE2-LABEL: mul_v8i32c:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [117,117,117,117]
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
; SSE2-NEXT: pmuludq %xmm2, %xmm0
@@ -515,14 +515,14 @@ define <8 x i32> @mul_v8i32c(<8 x i32> %
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v8i32c:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [117,117,117,117]
; SSE41-NEXT: pmulld %xmm2, %xmm0
; SSE41-NEXT: pmulld %xmm2, %xmm1
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v8i32c:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpbroadcastd {{.*#+}} ymm1 = [117,117,117,117,117,117,117,117]
; AVX-NEXT: vpmulld %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
@@ -533,7 +533,7 @@ entry:
define <4 x i64> @mul_v4i64c(<4 x i64> %i) nounwind {
; SSE-LABEL: mul_v4i64c:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: movdqa {{.*#+}} xmm2 = [117,117]
; SSE-NEXT: movdqa %xmm0, %xmm3
; SSE-NEXT: pmuludq %xmm2, %xmm3
@@ -550,7 +550,7 @@ define <4 x i64> @mul_v4i64c(<4 x i64> %
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v4i64c:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpbroadcastq {{.*#+}} ymm1 = [117,117,117,117]
; AVX-NEXT: vpmuludq %ymm1, %ymm0, %ymm2
; AVX-NEXT: vpsrlq $32, %ymm0, %ymm0
@@ -565,7 +565,7 @@ entry:
define <32 x i8> @mul_v32i8(<32 x i8> %i, <32 x i8> %j) nounwind {
; SSE2-LABEL: mul_v32i8:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa %xmm2, %xmm4
; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; SSE2-NEXT: psraw $8, %xmm4
@@ -600,7 +600,7 @@ define <32 x i8> @mul_v32i8(<32 x i8> %i
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v32i8:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pmovsxbw %xmm2, %xmm5
; SSE41-NEXT: pmovsxbw %xmm0, %xmm4
; SSE41-NEXT: pmullw %xmm5, %xmm4
@@ -629,7 +629,7 @@ define <32 x i8> @mul_v32i8(<32 x i8> %i
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v32i8:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
; AVX2-NEXT: vpmovsxbw %xmm2, %ymm2
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
@@ -651,7 +651,7 @@ define <32 x i8> @mul_v32i8(<32 x i8> %i
; AVX2-NEXT: retq
;
; AVX512F-LABEL: mul_v32i8:
-; AVX512F: # BB#0: # %entry
+; AVX512F: # %bb.0: # %entry
; AVX512F-NEXT: vpmovsxbw %xmm1, %ymm2
; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm3
; AVX512F-NEXT: vpmullw %ymm2, %ymm3, %ymm2
@@ -668,7 +668,7 @@ define <32 x i8> @mul_v32i8(<32 x i8> %i
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: mul_v32i8:
-; AVX512BW: # BB#0: # %entry
+; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmovsxbw %ymm1, %zmm1
; AVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0
; AVX512BW-NEXT: vpmullw %zmm1, %zmm0, %zmm0
@@ -681,13 +681,13 @@ entry:
define <16 x i16> @mul_v16i16(<16 x i16> %i, <16 x i16> %j) nounwind {
; SSE-LABEL: mul_v16i16:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: pmullw %xmm2, %xmm0
; SSE-NEXT: pmullw %xmm3, %xmm1
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v16i16:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmullw %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
entry:
@@ -697,7 +697,7 @@ entry:
define <8 x i32> @mul_v8i32(<8 x i32> %i, <8 x i32> %j) nounwind {
; SSE2-LABEL: mul_v8i32:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3]
; SSE2-NEXT: pmuludq %xmm2, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -715,13 +715,13 @@ define <8 x i32> @mul_v8i32(<8 x i32> %i
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v8i32:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pmulld %xmm2, %xmm0
; SSE41-NEXT: pmulld %xmm3, %xmm1
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v8i32:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmulld %ymm1, %ymm0, %ymm0
; AVX-NEXT: retq
entry:
@@ -731,7 +731,7 @@ entry:
define <4 x i64> @mul_v4i64(<4 x i64> %i, <4 x i64> %j) nounwind {
; SSE-LABEL: mul_v4i64:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: movdqa %xmm0, %xmm4
; SSE-NEXT: psrlq $32, %xmm4
; SSE-NEXT: pmuludq %xmm2, %xmm4
@@ -755,7 +755,7 @@ define <4 x i64> @mul_v4i64(<4 x i64> %i
; SSE-NEXT: retq
;
; AVX-LABEL: mul_v4i64:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpsrlq $32, %ymm0, %ymm2
; AVX-NEXT: vpmuludq %ymm1, %ymm2, %ymm2
; AVX-NEXT: vpsrlq $32, %ymm1, %ymm3
@@ -772,7 +772,7 @@ entry:
define <64 x i8> @mul_v64i8c(<64 x i8> %i) nounwind {
; SSE2-LABEL: mul_v64i8c:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa %xmm0, %xmm6
; SSE2-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; SSE2-NEXT: psraw $8, %xmm6
@@ -818,7 +818,7 @@ define <64 x i8> @mul_v64i8c(<64 x i8> %
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v64i8c:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: movdqa %xmm1, %xmm4
; SSE41-NEXT: movdqa %xmm0, %xmm1
; SSE41-NEXT: pmovsxbw %xmm1, %xmm0
@@ -860,7 +860,7 @@ define <64 x i8> @mul_v64i8c(<64 x i8> %
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v64i8c:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
; AVX2-NEXT: vpmovsxbw %xmm2, %ymm2
; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117]
@@ -894,7 +894,7 @@ define <64 x i8> @mul_v64i8c(<64 x i8> %
; AVX2-NEXT: retq
;
; AVX512F-LABEL: mul_v64i8c:
-; AVX512F: # BB#0: # %entry
+; AVX512F: # %bb.0: # %entry
; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm2
; AVX512F-NEXT: vmovdqa {{.*#+}} ymm3 = [117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117]
; AVX512F-NEXT: vpmullw %ymm3, %ymm2, %ymm2
@@ -919,7 +919,7 @@ define <64 x i8> @mul_v64i8c(<64 x i8> %
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: mul_v64i8c:
-; AVX512BW: # BB#0: # %entry
+; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmovsxbw %ymm0, %zmm1
; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm2 = [117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117,117]
; AVX512BW-NEXT: vpmullw %zmm2, %zmm1, %zmm1
@@ -937,7 +937,7 @@ entry:
define <64 x i8> @mul_v64i8(<64 x i8> %i, <64 x i8> %j) nounwind {
; SSE2-LABEL: mul_v64i8:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movdqa %xmm4, %xmm8
; SSE2-NEXT: punpckhbw {{.*#+}} xmm8 = xmm8[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
; SSE2-NEXT: psraw $8, %xmm8
@@ -1002,7 +1002,7 @@ define <64 x i8> @mul_v64i8(<64 x i8> %i
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v64i8:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: movdqa %xmm1, %xmm8
; SSE41-NEXT: movdqa %xmm0, %xmm1
; SSE41-NEXT: pmovsxbw %xmm4, %xmm9
@@ -1055,7 +1055,7 @@ define <64 x i8> @mul_v64i8(<64 x i8> %i
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v64i8:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm4
; AVX2-NEXT: vpmovsxbw %xmm4, %ymm4
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm5
@@ -1094,7 +1094,7 @@ define <64 x i8> @mul_v64i8(<64 x i8> %i
; AVX2-NEXT: retq
;
; AVX512F-LABEL: mul_v64i8:
-; AVX512F: # BB#0: # %entry
+; AVX512F: # %bb.0: # %entry
; AVX512F-NEXT: vpmovsxbw %xmm2, %ymm4
; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm5
; AVX512F-NEXT: vpmullw %ymm4, %ymm5, %ymm4
@@ -1124,7 +1124,7 @@ define <64 x i8> @mul_v64i8(<64 x i8> %i
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: mul_v64i8:
-; AVX512BW: # BB#0: # %entry
+; AVX512BW: # %bb.0: # %entry
; AVX512BW-NEXT: vpmovsxbw %ymm1, %zmm2
; AVX512BW-NEXT: vpmovsxbw %ymm0, %zmm3
; AVX512BW-NEXT: vpmullw %zmm2, %zmm3, %zmm2
@@ -1145,7 +1145,7 @@ entry:
; PR30845
define <4 x i32> @mul_v4i64_zero_upper(<4 x i32> %val1, <4 x i32> %val2) {
; SSE2-LABEL: mul_v4i64_zero_upper:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pxor %xmm3, %xmm3
; SSE2-NEXT: movdqa %xmm0, %xmm2
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
@@ -1160,7 +1160,7 @@ define <4 x i32> @mul_v4i64_zero_upper(<
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v4i64_zero_upper:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero
@@ -1173,7 +1173,7 @@ define <4 x i32> @mul_v4i64_zero_upper(<
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v4i64_zero_upper:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
; AVX-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
; AVX-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
@@ -1192,7 +1192,7 @@ entry:
define <4 x i32> @mul_v4i64_zero_upper_left(<4 x i32> %val1, <4 x i64> %val2) {
; SSE2-LABEL: mul_v4i64_zero_upper_left:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pxor %xmm3, %xmm3
; SSE2-NEXT: movdqa %xmm0, %xmm4
; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
@@ -1213,7 +1213,7 @@ define <4 x i32> @mul_v4i64_zero_upper_l
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v4i64_zero_upper_left:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero
@@ -1233,7 +1233,7 @@ define <4 x i32> @mul_v4i64_zero_upper_l
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v4i64_zero_upper_left:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
; AVX-NEXT: vpmuludq %ymm1, %ymm0, %ymm2
; AVX-NEXT: vpsrlq $32, %ymm1, %ymm1
@@ -1254,7 +1254,7 @@ entry:
define <4 x i32> @mul_v4i64_zero_lower(<4 x i32> %val1, <4 x i64> %val2) {
; SSE2-LABEL: mul_v4i64_zero_lower:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1]
@@ -1270,7 +1270,7 @@ define <4 x i32> @mul_v4i64_zero_lower(<
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v4i64_zero_lower:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
@@ -1284,7 +1284,7 @@ define <4 x i32> @mul_v4i64_zero_lower(<
; SSE41-NEXT: retq
;
; AVX-LABEL: mul_v4i64_zero_lower:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
; AVX-NEXT: vpsrlq $32, %ymm1, %ymm1
; AVX-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
@@ -1304,7 +1304,7 @@ entry:
define <8 x i32> @mul_v8i64_zero_upper(<8 x i32> %val1, <8 x i32> %val2) {
; SSE2-LABEL: mul_v8i64_zero_upper:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pxor %xmm6, %xmm6
; SSE2-NEXT: movdqa %xmm0, %xmm4
; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1]
@@ -1329,7 +1329,7 @@ define <8 x i32> @mul_v8i64_zero_upper(<
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v8i64_zero_upper:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1]
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero
; SSE41-NEXT: pmovzxdq {{.*#+}} xmm5 = xmm0[0],zero,xmm0[1],zero
@@ -1351,7 +1351,7 @@ define <8 x i32> @mul_v8i64_zero_upper(<
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v8i64_zero_upper:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
@@ -1365,7 +1365,7 @@ define <8 x i32> @mul_v8i64_zero_upper(<
; AVX2-NEXT: retq
;
; AVX512-LABEL: mul_v8i64_zero_upper:
-; AVX512: # BB#0: # %entry
+; AVX512: # %bb.0: # %entry
; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero
; AVX512-NEXT: vpmovzxdq {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero
; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm0
@@ -1384,7 +1384,7 @@ entry:
define <8 x i64> @mul_v8i64_sext(<8 x i16> %val1, <8 x i32> %val2) {
; SSE2-LABEL: mul_v8i64_sext:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movdqa %xmm1, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3]
; SSE2-NEXT: punpcklwd {{.*#+}} xmm8 = xmm8[0],xmm1[0],xmm8[1],xmm1[1],xmm8[2],xmm1[2],xmm8[3],xmm1[3]
@@ -1465,7 +1465,7 @@ define <8 x i64> @mul_v8i64_sext(<8 x i1
; SSE2-NEXT: retq
;
; SSE41-LABEL: mul_v8i64_sext:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[3,1,2,3]
; SSE41-NEXT: pmovsxwq %xmm3, %xmm4
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
@@ -1487,7 +1487,7 @@ define <8 x i64> @mul_v8i64_sext(<8 x i1
; SSE41-NEXT: retq
;
; AVX2-LABEL: mul_v8i64_sext:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
; AVX2-NEXT: vpmovsxwq %xmm2, %ymm2
; AVX2-NEXT: vpmovsxwq %xmm0, %ymm0
@@ -1500,7 +1500,7 @@ define <8 x i64> @mul_v8i64_sext(<8 x i1
; AVX2-NEXT: retq
;
; AVX512-LABEL: mul_v8i64_sext:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpmovsxwq %xmm0, %zmm0
; AVX512-NEXT: vpmovsxdq %ymm1, %zmm1
; AVX512-NEXT: vpmuldq %zmm1, %zmm0, %zmm0
Modified: llvm/trunk/test/CodeGen/X86/pointer-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pointer-vector.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pointer-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pointer-vector.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define <8 x i32*> @SHUFF0(<4 x i32*> %ptrv) nounwind {
; CHECK-LABEL: SHUFF0:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,1,2]
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,1,1]
; CHECK-NEXT: movdqa %xmm2, %xmm0
@@ -16,7 +16,7 @@ entry:
define <4 x i32*> @SHUFF1(<4 x i32*> %ptrv) nounwind {
; CHECK-LABEL: SHUFF1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,3,2]
; CHECK-NEXT: retl
entry:
@@ -26,7 +26,7 @@ entry:
define <4 x i8*> @SHUFF3(<4 x i8*> %ptrv) nounwind {
; CHECK-LABEL: SHUFF3:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,1,2]
; CHECK-NEXT: retl
entry:
@@ -36,7 +36,7 @@ entry:
define <4 x i8*> @LOAD0(<4 x i8*>* %p) nounwind {
; CHECK-LABEL: LOAD0:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movaps (%eax), %xmm0
; CHECK-NEXT: retl
@@ -47,7 +47,7 @@ entry:
define <4 x i8*> @LOAD1(<4 x i8*>* %p) nounwind {
; CHECK-LABEL: LOAD1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movdqa (%eax), %xmm0
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,0,3]
@@ -62,7 +62,7 @@ entry:
define <4 x i8*> @LOAD2(<4 x i8*>* %p) nounwind {
; CHECK-LABEL: LOAD2:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movaps (%eax), %xmm0
@@ -79,7 +79,7 @@ entry:
define <4 x i32> @INT2PTR0(<4 x i8*>* %p) nounwind {
; CHECK-LABEL: INT2PTR0:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movaps (%eax), %xmm0
; CHECK-NEXT: retl
@@ -91,7 +91,7 @@ entry:
define <4 x i32*> @INT2PTR1(<4 x i8>* %p) nounwind {
; CHECK-LABEL: INT2PTR1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
; CHECK-NEXT: retl
@@ -103,7 +103,7 @@ entry:
define <4 x i32*> @BITCAST0(<4 x i8*>* %p) nounwind {
; CHECK-LABEL: BITCAST0:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movaps (%eax), %xmm0
; CHECK-NEXT: retl
@@ -115,7 +115,7 @@ entry:
define <2 x i32*> @BITCAST1(<2 x i8*>* %p) nounwind {
; CHECK-LABEL: BITCAST1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
; CHECK-NEXT: retl
@@ -127,7 +127,7 @@ entry:
define <4 x i32> @ICMP0(<4 x i8*>* %p0, <4 x i8*>* %p1) nounwind {
; CHECK-LABEL: ICMP0:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movdqa (%ecx), %xmm0
@@ -146,7 +146,7 @@ entry:
define <4 x i32> @ICMP1(<4 x i8*>* %p0, <4 x i8*>* %p1) nounwind {
; CHECK-LABEL: ICMP1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movdqa (%ecx), %xmm0
Modified: llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll Mon Dec 4 09:18:51 2017
@@ -13,7 +13,7 @@
define i16 @test_ctpop_i16(i16 zeroext %a0, i16 *%a1) {
; GENERIC-LABEL: test_ctpop_i16:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: popcntw (%rsi), %cx # sched: [9:1.00]
; GENERIC-NEXT: popcntw %di, %ax # sched: [3:1.00]
; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
@@ -21,7 +21,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; SLM-LABEL: test_ctpop_i16:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: popcntw (%rsi), %cx # sched: [6:1.00]
; SLM-NEXT: popcntw %di, %ax # sched: [3:1.00]
; SLM-NEXT: orl %ecx, %eax # sched: [1:0.50]
@@ -29,7 +29,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_ctpop_i16:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: popcntw (%rsi), %cx # sched: [9:1.00]
; SANDY-NEXT: popcntw %di, %ax # sched: [3:1.00]
; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
@@ -37,7 +37,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_ctpop_i16:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: popcntw (%rsi), %cx # sched: [3:1.00]
; HASWELL-NEXT: popcntw %di, %ax # sched: [3:1.00]
; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -45,7 +45,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_ctpop_i16:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: popcntw (%rsi), %cx # sched: [8:1.00]
; BROADWELL-NEXT: popcntw %di, %ax # sched: [3:1.00]
; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -53,7 +53,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_ctpop_i16:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: popcntw (%rsi), %cx # sched: [8:1.00]
; SKYLAKE-NEXT: popcntw %di, %ax # sched: [3:1.00]
; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -61,7 +61,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_ctpop_i16:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: popcntw (%rsi), %cx # sched: [8:1.00]
; BTVER2-NEXT: popcntw %di, %ax # sched: [3:1.00]
; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
@@ -69,7 +69,7 @@ define i16 @test_ctpop_i16(i16 zeroext %
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_ctpop_i16:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: popcntw (%rsi), %cx # sched: [10:1.00]
; ZNVER1-NEXT: popcntw %di, %ax # sched: [3:1.00]
; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -85,56 +85,56 @@ declare i16 @llvm.ctpop.i16(i16)
define i32 @test_ctpop_i32(i32 %a0, i32 *%a1) {
; GENERIC-LABEL: test_ctpop_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: popcntl (%rsi), %ecx # sched: [9:1.00]
; GENERIC-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; SLM-LABEL: test_ctpop_i32:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: popcntl (%rsi), %ecx # sched: [6:1.00]
; SLM-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; SLM-NEXT: orl %ecx, %eax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_ctpop_i32:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: popcntl (%rsi), %ecx # sched: [9:1.00]
; SANDY-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; SANDY-NEXT: orl %ecx, %eax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_ctpop_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: popcntl (%rsi), %ecx # sched: [3:1.00]
; HASWELL-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_ctpop_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: popcntl (%rsi), %ecx # sched: [8:1.00]
; BROADWELL-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_ctpop_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: popcntl (%rsi), %ecx # sched: [8:1.00]
; SKYLAKE-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_ctpop_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: popcntl (%rsi), %ecx # sched: [8:1.00]
; BTVER2-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_ctpop_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: popcntl (%rsi), %ecx # sched: [10:1.00]
; ZNVER1-NEXT: popcntl %edi, %eax # sched: [3:1.00]
; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -149,56 +149,56 @@ declare i32 @llvm.ctpop.i32(i32)
define i64 @test_ctpop_i64(i64 %a0, i64 *%a1) {
; GENERIC-LABEL: test_ctpop_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: popcntq (%rsi), %rcx # sched: [9:1.00]
; GENERIC-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; GENERIC-NEXT: orq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; SLM-LABEL: test_ctpop_i64:
-; SLM: # BB#0:
+; SLM: # %bb.0:
; SLM-NEXT: popcntq (%rsi), %rcx # sched: [6:1.00]
; SLM-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; SLM-NEXT: orq %rcx, %rax # sched: [1:0.50]
; SLM-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: test_ctpop_i64:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: popcntq (%rsi), %rcx # sched: [9:1.00]
; SANDY-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; SANDY-NEXT: orq %rcx, %rax # sched: [1:0.33]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_ctpop_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: popcntq (%rsi), %rcx # sched: [3:1.00]
; HASWELL-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; HASWELL-NEXT: orq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_ctpop_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: popcntq (%rsi), %rcx # sched: [8:1.00]
; BROADWELL-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; BROADWELL-NEXT: orq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_ctpop_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: popcntq (%rsi), %rcx # sched: [8:1.00]
; SKYLAKE-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; SKYLAKE-NEXT: orq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_ctpop_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: popcntq (%rsi), %rcx # sched: [8:1.00]
; BTVER2-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; BTVER2-NEXT: orq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_ctpop_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: popcntq (%rsi), %rcx # sched: [10:1.00]
; ZNVER1-NEXT: popcntq %rdi, %rax # sched: [3:1.00]
; ZNVER1-NEXT: orq %rcx, %rax # sched: [1:0.25]
Modified: llvm/trunk/test/CodeGen/X86/popcnt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/popcnt.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/popcnt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/popcnt.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define i8 @cnt8(i8 %x) nounwind readnone {
; X32-LABEL: cnt8:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: shrb %al
@@ -24,7 +24,7 @@ define i8 @cnt8(i8 %x) nounwind readnone
; X32-NEXT: retl
;
; X64-LABEL: cnt8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shrb %al
; X64-NEXT: andb $85, %al
@@ -41,14 +41,14 @@ define i8 @cnt8(i8 %x) nounwind readnone
; X64-NEXT: retq
;
; X32-POPCNT-LABEL: cnt8:
-; X32-POPCNT: # BB#0:
+; X32-POPCNT: # %bb.0:
; X32-POPCNT-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-POPCNT-NEXT: popcntl %eax, %eax
; X32-POPCNT-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X32-POPCNT-NEXT: retl
;
; X64-POPCNT-LABEL: cnt8:
-; X64-POPCNT: # BB#0:
+; X64-POPCNT: # %bb.0:
; X64-POPCNT-NEXT: movzbl %dil, %eax
; X64-POPCNT-NEXT: popcntl %eax, %eax
; X64-POPCNT-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -59,7 +59,7 @@ define i8 @cnt8(i8 %x) nounwind readnone
define i16 @cnt16(i16 %x) nounwind readnone {
; X32-LABEL: cnt16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: shrl %ecx
@@ -83,7 +83,7 @@ define i16 @cnt16(i16 %x) nounwind readn
; X32-NEXT: retl
;
; X64-LABEL: cnt16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shrl %eax
; X64-NEXT: andl $21845, %eax # imm = 0x5555
@@ -106,12 +106,12 @@ define i16 @cnt16(i16 %x) nounwind readn
; X64-NEXT: retq
;
; X32-POPCNT-LABEL: cnt16:
-; X32-POPCNT: # BB#0:
+; X32-POPCNT: # %bb.0:
; X32-POPCNT-NEXT: popcntw {{[0-9]+}}(%esp), %ax
; X32-POPCNT-NEXT: retl
;
; X64-POPCNT-LABEL: cnt16:
-; X64-POPCNT: # BB#0:
+; X64-POPCNT: # %bb.0:
; X64-POPCNT-NEXT: popcntw %di, %ax
; X64-POPCNT-NEXT: retq
%cnt = tail call i16 @llvm.ctpop.i16(i16 %x)
@@ -120,7 +120,7 @@ define i16 @cnt16(i16 %x) nounwind readn
define i32 @cnt32(i32 %x) nounwind readnone {
; X32-LABEL: cnt32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl %eax, %ecx
; X32-NEXT: shrl %ecx
@@ -140,7 +140,7 @@ define i32 @cnt32(i32 %x) nounwind readn
; X32-NEXT: retl
;
; X64-LABEL: cnt32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: shrl %eax
; X64-NEXT: andl $1431655765, %eax # imm = 0x55555555
@@ -159,12 +159,12 @@ define i32 @cnt32(i32 %x) nounwind readn
; X64-NEXT: retq
;
; X32-POPCNT-LABEL: cnt32:
-; X32-POPCNT: # BB#0:
+; X32-POPCNT: # %bb.0:
; X32-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %eax
; X32-POPCNT-NEXT: retl
;
; X64-POPCNT-LABEL: cnt32:
-; X64-POPCNT: # BB#0:
+; X64-POPCNT: # %bb.0:
; X64-POPCNT-NEXT: popcntl %edi, %eax
; X64-POPCNT-NEXT: retq
%cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -173,7 +173,7 @@ define i32 @cnt32(i32 %x) nounwind readn
define i64 @cnt64(i64 %x) nounwind readnone {
; X32-LABEL: cnt64:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %edx
@@ -211,7 +211,7 @@ define i64 @cnt64(i64 %x) nounwind readn
; X32-NEXT: retl
;
; X64-LABEL: cnt64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: shrq %rax
; X64-NEXT: movabsq $6148914691236517205, %rcx # imm = 0x5555555555555555
@@ -234,7 +234,7 @@ define i64 @cnt64(i64 %x) nounwind readn
; X64-NEXT: retq
;
; X32-POPCNT-LABEL: cnt64:
-; X32-POPCNT: # BB#0:
+; X32-POPCNT: # %bb.0:
; X32-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %ecx
; X32-POPCNT-NEXT: popcntl {{[0-9]+}}(%esp), %eax
; X32-POPCNT-NEXT: addl %ecx, %eax
@@ -242,7 +242,7 @@ define i64 @cnt64(i64 %x) nounwind readn
; X32-POPCNT-NEXT: retl
;
; X64-POPCNT-LABEL: cnt64:
-; X64-POPCNT: # BB#0:
+; X64-POPCNT: # %bb.0:
; X64-POPCNT-NEXT: popcntq %rdi, %rax
; X64-POPCNT-NEXT: retq
%cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
Modified: llvm/trunk/test/CodeGen/X86/post-ra-sched.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/post-ra-sched.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/post-ra-sched.ll (original)
+++ llvm/trunk/test/CodeGen/X86/post-ra-sched.ll Mon Dec 4 09:18:51 2017
@@ -16,7 +16,7 @@
define void @addindirect() {
; CHECK-LABEL: addindirect:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl idxb, %ecx
; CHECK-NEXT: movl idxa, %eax
; CHECK-NEXT: movl ptrs(,%ecx,4), %ecx
Modified: llvm/trunk/test/CodeGen/X86/powi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/powi.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/powi.ll (original)
+++ llvm/trunk/test/CodeGen/X86/powi.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define double @pow_wrapper(double %a) nounwind readonly ssp noredzone {
; CHECK-LABEL: pow_wrapper:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movapd %xmm0, %xmm1
; CHECK-NEXT: mulsd %xmm1, %xmm1
; CHECK-NEXT: mulsd %xmm1, %xmm0
@@ -19,7 +19,7 @@ define double @pow_wrapper(double %a) no
define double @pow_wrapper_optsize(double %a) optsize {
; CHECK-LABEL: pow_wrapper_optsize:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $15, %edi
; CHECK-NEXT: jmp
%ret = tail call double @llvm.powi.f64(double %a, i32 15) nounwind ; <double> [#uses=1]
@@ -28,7 +28,7 @@ define double @pow_wrapper_optsize(doubl
define double @pow_wrapper_minsize(double %a) minsize {
; CHECK-LABEL: pow_wrapper_minsize:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushq $15
; CHECK: popq %rdi
; CHECK: jmp
Modified: llvm/trunk/test/CodeGen/X86/pr11334.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr11334.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr11334.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr11334.ll Mon Dec 4 09:18:51 2017
@@ -4,12 +4,12 @@
define <2 x double> @v2f2d_ext_vec(<2 x float> %v1) nounwind {
; SSE-LABEL: v2f2d_ext_vec:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: cvtps2pd %xmm0, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: v2f2d_ext_vec:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvtps2pd %xmm0, %xmm0
; AVX-NEXT: retq
entry:
@@ -19,7 +19,7 @@ entry:
define <3 x double> @v3f2d_ext_vec(<3 x float> %v1) nounwind {
; SSE-LABEL: v3f2d_ext_vec:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: cvtps2pd %xmm0, %xmm2
; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE-NEXT: cvtps2pd %xmm0, %xmm0
@@ -31,7 +31,7 @@ define <3 x double> @v3f2d_ext_vec(<3 x
; SSE-NEXT: retq
;
; AVX-LABEL: v3f2d_ext_vec:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvtps2pd %xmm0, %ymm0
; AVX-NEXT: retq
entry:
@@ -41,7 +41,7 @@ entry:
define <4 x double> @v4f2d_ext_vec(<4 x float> %v1) nounwind {
; SSE-LABEL: v4f2d_ext_vec:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: cvtps2pd %xmm0, %xmm2
; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE-NEXT: cvtps2pd %xmm0, %xmm1
@@ -49,7 +49,7 @@ define <4 x double> @v4f2d_ext_vec(<4 x
; SSE-NEXT: retq
;
; AVX-LABEL: v4f2d_ext_vec:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvtps2pd %xmm0, %ymm0
; AVX-NEXT: retq
entry:
@@ -59,7 +59,7 @@ entry:
define <8 x double> @v8f2d_ext_vec(<8 x float> %v1) nounwind {
; SSE-LABEL: v8f2d_ext_vec:
-; SSE: # BB#0: # %entry
+; SSE: # %bb.0: # %entry
; SSE-NEXT: cvtps2pd %xmm0, %xmm5
; SSE-NEXT: cvtps2pd %xmm1, %xmm2
; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
@@ -71,7 +71,7 @@ define <8 x double> @v8f2d_ext_vec(<8 x
; SSE-NEXT: retq
;
; AVX-LABEL: v8f2d_ext_vec:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvtps2pd %xmm0, %ymm2
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX-NEXT: vcvtps2pd %xmm0, %ymm1
@@ -84,14 +84,14 @@ entry:
define void @test_vector_creation() nounwind {
; SSE-LABEL: test_vector_creation:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: xorpd %xmm0, %xmm0
; SSE-NEXT: movhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
; SSE-NEXT: movapd %xmm0, (%rax)
; SSE-NEXT: retq
;
; AVX-LABEL: test_vector_creation:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vxorpd %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
Modified: llvm/trunk/test/CodeGen/X86/pr11985.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr11985.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr11985.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr11985.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define float @foo(i8* nocapture %buf, float %a, float %b) nounwind uwtable {
; PRESCOTT-LABEL: foo:
-; PRESCOTT: # BB#0: # %entry
+; PRESCOTT: # %bb.0: # %entry
; PRESCOTT-NEXT: movq .Ltmp0+14(%rip), %rax
; PRESCOTT-NEXT: movq %rax, 14(%rdi)
; PRESCOTT-NEXT: movq .Ltmp0+8(%rip), %rax
@@ -17,7 +17,7 @@ define float @foo(i8* nocapture %buf, fl
; PRESCOTT-NEXT: movq %rax, (%rdi)
;
; NEHALEM-LABEL: foo:
-; NEHALEM: # BB#0: # %entry
+; NEHALEM: # %bb.0: # %entry
; NEHALEM-NEXT: movq .Ltmp0+14(%rip), %rax
; NEHALEM-NEXT: movq %rax, 14(%rdi)
; NEHALEM-NEXT: movups .Ltmp0(%rip), %xmm2
Modified: llvm/trunk/test/CodeGen/X86/pr12312.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr12312.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr12312.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr12312.ll Mon Dec 4 09:18:51 2017
@@ -4,10 +4,10 @@
define i32 @veccond128(<4 x i32> %input) {
; SSE41-LABEL: veccond128:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: ptest %xmm0, %xmm0
; SSE41-NEXT: je .LBB0_2
-; SSE41-NEXT: # BB#1: # %if-true-block
+; SSE41-NEXT: # %bb.1: # %if-true-block
; SSE41-NEXT: xorl %eax, %eax
; SSE41-NEXT: retq
; SSE41-NEXT: .LBB0_2: # %endif-block
@@ -15,10 +15,10 @@ define i32 @veccond128(<4 x i32> %input)
; SSE41-NEXT: retq
;
; AVX-LABEL: veccond128:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vptest %xmm0, %xmm0
; AVX-NEXT: je .LBB0_2
-; AVX-NEXT: # BB#1: # %if-true-block
+; AVX-NEXT: # %bb.1: # %if-true-block
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: retq
; AVX-NEXT: .LBB0_2: # %endif-block
@@ -36,11 +36,11 @@ endif-block:
define i32 @veccond256(<8 x i32> %input) {
; SSE41-LABEL: veccond256:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: por %xmm1, %xmm0
; SSE41-NEXT: ptest %xmm0, %xmm0
; SSE41-NEXT: je .LBB1_2
-; SSE41-NEXT: # BB#1: # %if-true-block
+; SSE41-NEXT: # %bb.1: # %if-true-block
; SSE41-NEXT: xorl %eax, %eax
; SSE41-NEXT: retq
; SSE41-NEXT: .LBB1_2: # %endif-block
@@ -48,10 +48,10 @@ define i32 @veccond256(<8 x i32> %input)
; SSE41-NEXT: retq
;
; AVX-LABEL: veccond256:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: je .LBB1_2
-; AVX-NEXT: # BB#1: # %if-true-block
+; AVX-NEXT: # %bb.1: # %if-true-block
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@@ -71,13 +71,13 @@ endif-block:
define i32 @veccond512(<16 x i32> %input) {
; SSE41-LABEL: veccond512:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: por %xmm3, %xmm1
; SSE41-NEXT: por %xmm2, %xmm1
; SSE41-NEXT: por %xmm0, %xmm1
; SSE41-NEXT: ptest %xmm1, %xmm1
; SSE41-NEXT: je .LBB2_2
-; SSE41-NEXT: # BB#1: # %if-true-block
+; SSE41-NEXT: # %bb.1: # %if-true-block
; SSE41-NEXT: xorl %eax, %eax
; SSE41-NEXT: retq
; SSE41-NEXT: .LBB2_2: # %endif-block
@@ -85,11 +85,11 @@ define i32 @veccond512(<16 x i32> %input
; SSE41-NEXT: retq
;
; AVX-LABEL: veccond512:
-; AVX: # BB#0: # %entry
+; AVX: # %bb.0: # %entry
; AVX-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: je .LBB2_2
-; AVX-NEXT: # BB#1: # %if-true-block
+; AVX-NEXT: # %bb.1: # %if-true-block
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
@@ -109,14 +109,14 @@ endif-block:
define i32 @vectest128(<4 x i32> %input) {
; SSE41-LABEL: vectest128:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: xorl %eax, %eax
; SSE41-NEXT: ptest %xmm0, %xmm0
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
; AVX-LABEL: vectest128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: vptest %xmm0, %xmm0
; AVX-NEXT: setne %al
@@ -129,7 +129,7 @@ define i32 @vectest128(<4 x i32> %input)
define i32 @vectest256(<8 x i32> %input) {
; SSE41-LABEL: vectest256:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: por %xmm1, %xmm0
; SSE41-NEXT: xorl %eax, %eax
; SSE41-NEXT: ptest %xmm0, %xmm0
@@ -137,7 +137,7 @@ define i32 @vectest256(<8 x i32> %input)
; SSE41-NEXT: retq
;
; AVX-LABEL: vectest256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: setne %al
@@ -151,7 +151,7 @@ define i32 @vectest256(<8 x i32> %input)
define i32 @vectest512(<16 x i32> %input) {
; SSE41-LABEL: vectest512:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: por %xmm3, %xmm1
; SSE41-NEXT: por %xmm2, %xmm1
; SSE41-NEXT: por %xmm0, %xmm1
@@ -161,7 +161,7 @@ define i32 @vectest512(<16 x i32> %input
; SSE41-NEXT: retq
;
; AVX-LABEL: vectest512:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX-NEXT: xorl %eax, %eax
; AVX-NEXT: vptest %ymm0, %ymm0
@@ -176,14 +176,14 @@ define i32 @vectest512(<16 x i32> %input
define i32 @vecsel128(<4 x i32> %input, i32 %a, i32 %b) {
; SSE41-LABEL: vecsel128:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: ptest %xmm0, %xmm0
; SSE41-NEXT: cmovel %esi, %edi
; SSE41-NEXT: movl %edi, %eax
; SSE41-NEXT: retq
;
; AVX-LABEL: vecsel128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vptest %xmm0, %xmm0
; AVX-NEXT: cmovel %esi, %edi
; AVX-NEXT: movl %edi, %eax
@@ -196,7 +196,7 @@ define i32 @vecsel128(<4 x i32> %input,
define i32 @vecsel256(<8 x i32> %input, i32 %a, i32 %b) {
; SSE41-LABEL: vecsel256:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: por %xmm1, %xmm0
; SSE41-NEXT: ptest %xmm0, %xmm0
; SSE41-NEXT: cmovel %esi, %edi
@@ -204,7 +204,7 @@ define i32 @vecsel256(<8 x i32> %input,
; SSE41-NEXT: retq
;
; AVX-LABEL: vecsel256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: cmovel %esi, %edi
; AVX-NEXT: movl %edi, %eax
@@ -218,7 +218,7 @@ define i32 @vecsel256(<8 x i32> %input,
define i32 @vecsel512(<16 x i32> %input, i32 %a, i32 %b) {
; SSE41-LABEL: vecsel512:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: por %xmm3, %xmm1
; SSE41-NEXT: por %xmm2, %xmm1
; SSE41-NEXT: por %xmm0, %xmm1
@@ -228,7 +228,7 @@ define i32 @vecsel512(<16 x i32> %input,
; SSE41-NEXT: retq
;
; AVX-LABEL: vecsel512:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vorps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vptest %ymm0, %ymm0
; AVX-NEXT: cmovel %esi, %edi
Modified: llvm/trunk/test/CodeGen/X86/pr13577.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr13577.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr13577.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr13577.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define x86_fp80 @foo(x86_fp80 %a) {
; CHECK-LABEL: foo:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: fstpt -{{[0-9]+}}(%rsp)
; CHECK-NEXT: testb $-128, -{{[0-9]+}}(%rsp)
@@ -28,7 +28,7 @@ declare x86_fp80 @copysignl(x86_fp80, x8
define float @pr26070() {
; CHECK-LABEL: pr26070:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
; CHECK-NEXT: orps {{.*}}(%rip), %xmm0
Modified: llvm/trunk/test/CodeGen/X86/pr14161.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr14161.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr14161.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr14161.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@ declare <4 x i32> @llvm.x86.sse41.pminud
define <2 x i16> @good(<4 x i32>*, <4 x i8>*) {
; CHECK-LABEL: good:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movdqa (%rdi), %xmm0
; CHECK-NEXT: pminud {{.*}}(%rip), %xmm0
; CHECK-NEXT: pmovzxwq %xmm0, %xmm0
@@ -23,7 +23,7 @@ entry:
define <2 x i16> @bad(<4 x i32>*, <4 x i8>*) {
; CHECK-LABEL: bad:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movdqa (%rdi), %xmm0
; CHECK-NEXT: pminud {{.*}}(%rip), %xmm0
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
Modified: llvm/trunk/test/CodeGen/X86/pr14204.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr14204.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr14204.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr14204.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <8 x i32> @foo(<8 x i1> %bar) nounwind readnone {
; CHECK-LABEL: foo:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; CHECK-NEXT: vpslld $31, %ymm0, %ymm0
; CHECK-NEXT: vpsrad $31, %ymm0, %ymm0
Modified: llvm/trunk/test/CodeGen/X86/pr14314.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr14314.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr14314.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr14314.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i64 @atomicSub(i64* %a, i64 %b) nounwind {
; CHECK-LABEL: atomicSub:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi
@@ -22,7 +22,7 @@ define i64 @atomicSub(i64* %a, i64 %b) n
; CHECK-NEXT: sbbl %esi, %ecx
; CHECK-NEXT: lock cmpxchg8b (%ebp)
; CHECK-NEXT: jne .LBB0_1
-; CHECK-NEXT: # BB#2: # %atomicrmw.end
+; CHECK-NEXT: # %bb.2: # %atomicrmw.end
; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %edi
; CHECK-NEXT: popl %ebx
Modified: llvm/trunk/test/CodeGen/X86/pr15267.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr15267.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr15267.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr15267.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <4 x i3> @test1(<4 x i3>* %in) nounwind {
; CHECK-LABEL: test1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzwl (%rdi), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shrl $3, %ecx
@@ -22,7 +22,7 @@ define <4 x i3> @test1(<4 x i3>* %in) no
define <4 x i1> @test2(<4 x i1>* %in) nounwind {
; CHECK-LABEL: test2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl (%rdi), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shrl %ecx
@@ -41,7 +41,7 @@ define <4 x i1> @test2(<4 x i1>* %in) no
define <4 x i64> @test3(<4 x i1>* %in) nounwind {
; CHECK-LABEL: test3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl (%rdi), %eax
; CHECK-NEXT: movq %rax, %rcx
; CHECK-NEXT: shlq $62, %rcx
@@ -70,7 +70,7 @@ define <4 x i64> @test3(<4 x i1>* %in) n
define <16 x i4> @test4(<16 x i4>* %in) nounwind {
; CHECK-LABEL: test4:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shrl $4, %ecx
Modified: llvm/trunk/test/CodeGen/X86/pr15309.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr15309.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr15309.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr15309.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define void @test_convert_float2_ulong2(<2 x i64>* nocapture %src, <2 x float>* nocapture %dest) nounwind {
; CHECK-LABEL: test_convert_float2_ulong2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: subl $20, %esp
Modified: llvm/trunk/test/CodeGen/X86/pr15705.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr15705.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr15705.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr15705.ll Mon Dec 4 09:18:51 2017
@@ -4,16 +4,16 @@
define i32 @PR15705(i32 %x, i32 %a, i32 %b, i32 %c) #0 {
; X86-LABEL: PR15705:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: cmpl %ecx, %edx
; X86-NEXT: je .LBB0_4
-; X86-NEXT: # BB#1: # %if.end
+; X86-NEXT: # %bb.1: # %if.end
; X86-NEXT: cmpl %eax, %edx
; X86-NEXT: jne .LBB0_3
-; X86-NEXT: # BB#2:
+; X86-NEXT: # %bb.2:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: .LBB0_3: # %if.end
; X86-NEXT: movl %ecx, %eax
@@ -21,10 +21,10 @@ define i32 @PR15705(i32 %x, i32 %a, i32
; X86-NEXT: retl
;
; X64-LABEL: PR15705:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: cmpl %esi, %edi
; X64-NEXT: je .LBB0_2
-; X64-NEXT: # BB#1: # %if.end
+; X64-NEXT: # %bb.1: # %if.end
; X64-NEXT: cmpl %edx, %edi
; X64-NEXT: cmovel %ecx, %esi
; X64-NEXT: movl %esi, %edx
Modified: llvm/trunk/test/CodeGen/X86/pr15981.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr15981.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr15981.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr15981.ll Mon Dec 4 09:18:51 2017
@@ -8,17 +8,17 @@
define i32 @fn1(i32, i32) {
; X86-LABEL: fn1:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: testl %eax, %eax
; X86-NEXT: je .LBB0_2
-; X86-NEXT: # BB#1:
+; X86-NEXT: # %bb.1:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: .LBB0_2:
; X86-NEXT: retl
;
; X64-LABEL: fn1:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: testl %esi, %esi
; X64-NEXT: cmovel %esi, %edi
; X64-NEXT: movl %edi, %eax
@@ -30,22 +30,22 @@ define i32 @fn1(i32, i32) {
define void @fn2() {
; X86-LABEL: fn2:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl b, %eax
; X86-NEXT: decl a
; X86-NEXT: jne .LBB1_2
-; X86-NEXT: # BB#1:
+; X86-NEXT: # %bb.1:
; X86-NEXT: xorl %eax, %eax
; X86-NEXT: .LBB1_2:
; X86-NEXT: movl %eax, c
; X86-NEXT: retl
;
; X64-LABEL: fn2:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: decl {{.*}}(%rip)
; X64-NEXT: je .LBB1_2
-; X64-NEXT: # BB#1:
+; X64-NEXT: # %bb.1:
; X64-NEXT: movl {{.*}}(%rip), %eax
; X64-NEXT: .LBB1_2:
; X64-NEXT: movl %eax, {{.*}}(%rip)
Modified: llvm/trunk/test/CodeGen/X86/pr16031.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr16031.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr16031.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr16031.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i64 @main(i1 %tobool1) nounwind {
; CHECK-LABEL: main:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl $-12, %eax
Modified: llvm/trunk/test/CodeGen/X86/pr16360.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr16360.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr16360.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr16360.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i64 @foo(i32 %sum) {
; CHECK-LABEL: foo:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: shrl $2, %eax
; CHECK-NEXT: orl $-67108864, %eax # imm = 0xFC000000
Modified: llvm/trunk/test/CodeGen/X86/pr17764.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr17764.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr17764.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr17764.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <16 x i16> @foo(<16 x i1> %mask, <16 x i16> %x, <16 x i16> %y) {
; CHECK-LABEL: foo:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
; CHECK-NEXT: vpsllw $15, %ymm0, %ymm0
; CHECK-NEXT: vpsraw $15, %ymm0, %ymm0
Modified: llvm/trunk/test/CodeGen/X86/pr18014.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr18014.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr18014.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr18014.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define <4 x i32> @foo(<4 x i32>* %p, <4 x i1> %cond, <4 x i32> %v1, <4 x i32> %v2, <4 x i32> %v3) {
; CHECK-LABEL: foo:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pslld $31, %xmm0
; CHECK-NEXT: psrad $31, %xmm0
; CHECK-NEXT: blendvps %xmm0, %xmm1, %xmm2
Modified: llvm/trunk/test/CodeGen/X86/pr18344.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr18344.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr18344.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr18344.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define void @FFT(%v4_varying_complex* noalias nocapture %destination, float* noalias %re, <4 x i32>* noalias nocapture %ptr_cast_for_load) nounwind {
; X86-LABEL: FFT:
-; X86: # BB#0: # %begin
+; X86: # %bb.0: # %begin
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
@@ -33,7 +33,7 @@ define void @FFT(%v4_varying_complex* no
; X86-NEXT: retl
;
; X64-LABEL: FFT:
-; X64: # BB#0: # %begin
+; X64: # %bb.0: # %begin
; X64-NEXT: movdqu (%rdx), %xmm0
; X64-NEXT: pslld $4, %xmm0
; X64-NEXT: movq %xmm0, %rax
Modified: llvm/trunk/test/CodeGen/X86/pr20011.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr20011.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr20011.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr20011.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define void @crash(i64 %x0, i64 %y0, %destTy* nocapture %dest) nounwind {
; X86-LABEL: crash:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movb {{[0-9]+}}(%esp), %dl
@@ -17,7 +17,7 @@ define void @crash(i64 %x0, i64 %y0, %de
; X86-NEXT: retl
;
; X64-LABEL: crash:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: andl $3, %esi
; X64-NEXT: movb %sil, (%rdx)
; X64-NEXT: andl $3, %edi
Modified: llvm/trunk/test/CodeGen/X86/pr20012.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr20012.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr20012.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr20012.ll Mon Dec 4 09:18:51 2017
@@ -4,12 +4,12 @@
define void @test () {
; X86-LABEL: test:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movb $0, (%eax)
; X86-NEXT: retl
;
; X64-LABEL: test:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movb $0, (%rax)
; X64-NEXT: retq
store <2 x i4> zeroinitializer, <2 x i4>* undef, align 1
Modified: llvm/trunk/test/CodeGen/X86/pr21792.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr21792.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr21792.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr21792.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define void @func(<4 x float> %vx) {
; CHECK-LABEL: func:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: pand {{.*}}(%rip), %xmm0
Modified: llvm/trunk/test/CodeGen/X86/pr22338.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr22338.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr22338.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr22338.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i32 @fn() {
; X86-LABEL: fn:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: xorl %eax, %eax
; X86-NEXT: cmpl $1, %eax
; X86-NEXT: setne %al
@@ -17,11 +17,11 @@ define i32 @fn() {
; X86-NEXT: # =>This Inner Loop Header: Depth=1
; X86-NEXT: testl %eax, %eax
; X86-NEXT: je .LBB0_1
-; X86-NEXT: # BB#2: # %bb2
+; X86-NEXT: # %bb.2: # %bb2
; X86-NEXT: retl
;
; X64-LABEL: fn:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: cmpl $1, %eax
; X64-NEXT: setne %al
@@ -34,7 +34,7 @@ define i32 @fn() {
; X64-NEXT: # =>This Inner Loop Header: Depth=1
; X64-NEXT: testl %eax, %eax
; X64-NEXT: je .LBB0_1
-; X64-NEXT: # BB#2: # %bb2
+; X64-NEXT: # %bb.2: # %bb2
; X64-NEXT: retq
entry:
%cmp1 = icmp ne i32 undef, 1
Modified: llvm/trunk/test/CodeGen/X86/pr22774.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr22774.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr22774.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr22774.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define i32 @_Z3foov() {
; CHECK-LABEL: _Z3foov:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovdqa {{.*}}(%rip), %ymm0
; CHECK-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; CHECK-NEXT: vmovdqa %xmm0, {{.*}}(%rip)
Modified: llvm/trunk/test/CodeGen/X86/pr22970.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr22970.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr22970.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr22970.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i32 @PR22970_i32(i32* nocapture readonly, i32) {
; X86-LABEL: PR22970_i32:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl $4095, %ecx # imm = 0xFFF
; X86-NEXT: andl {{[0-9]+}}(%esp), %ecx
@@ -12,7 +12,7 @@ define i32 @PR22970_i32(i32* nocapture r
; X86-NEXT: retl
;
; X64-LABEL: PR22970_i32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; X64-NEXT: andl $4095, %esi # imm = 0xFFF
; X64-NEXT: movl 32(%rdi,%rsi,4), %eax
@@ -27,7 +27,7 @@ define i32 @PR22970_i32(i32* nocapture r
define i32 @PR22970_i64(i32* nocapture readonly, i64) {
; X86-LABEL: PR22970_i64:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl $4095, %ecx # imm = 0xFFF
; X86-NEXT: andl {{[0-9]+}}(%esp), %ecx
@@ -35,7 +35,7 @@ define i32 @PR22970_i64(i32* nocapture r
; X86-NEXT: retl
;
; X64-LABEL: PR22970_i64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: andl $4095, %esi # imm = 0xFFF
; X64-NEXT: movl 32(%rdi,%rsi,4), %eax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pr23603.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr23603.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr23603.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr23603.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@ declare void @free_v()
define void @f(i32* %x, i32 %c32, i32* %y) nounwind {
; CHECK-LABEL: f:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: pushq %r14
; CHECK-NEXT: pushq %rbx
@@ -15,7 +15,7 @@ define void @f(i32* %x, i32 %c32, i32* %
; CHECK-NEXT: callq free_v
; CHECK-NEXT: testl %ebp, %ebp
; CHECK-NEXT: je .LBB0_2
-; CHECK-NEXT: # BB#1: # %left
+; CHECK-NEXT: # %bb.1: # %left
; CHECK-NEXT: movl %ebx, (%r14)
; CHECK-NEXT: .LBB0_2: # %merge
; CHECK-NEXT: popq %rbx
Modified: llvm/trunk/test/CodeGen/X86/pr24602.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr24602.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr24602.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr24602.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
; PR24602: Make sure we don't barf on non-foldable code (with opaque constants).
; CHECK-LABEL: pr24602:
-; CHECK-NEXT: # BB#0
+; CHECK-NEXT: # %bb.0
; CHECK-NEXT: movabsq $-10000000000, [[CST:%[a-z0-9]+]]
; CHECK-NEXT: imulq [[CST]], %rsi
; CHECK-NEXT: leaq (%rdi,%rsi,8), %rax
Modified: llvm/trunk/test/CodeGen/X86/pr2585.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2585.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2585.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr2585.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define internal void @PR2585() {
; X32-LABEL: PR2585:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
; X32-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
@@ -15,7 +15,7 @@ define internal void @PR2585() {
; X32-NEXT: retl
;
; X64-LABEL: PR2585:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
Modified: llvm/trunk/test/CodeGen/X86/pr26350.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr26350.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr26350.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr26350.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ target triple = "i386-unknown-linux-gnu"
define i32 @main() {
; CHECK-LABEL: main:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl d, %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shrl $31, %ecx
Modified: llvm/trunk/test/CodeGen/X86/pr2656.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr2656.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr2656.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr2656.ll Mon Dec 4 09:18:51 2017
@@ -15,7 +15,7 @@ target triple = "i686-apple-darwin9.4.0"
define void @foo(%struct.anon* byval %p) nounwind {
; CHECK-LABEL: foo:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: subl $28, %esp
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
@@ -51,7 +51,7 @@ declare i32 @printf(...)
define double @PR22371(double %x) {
; CHECK-LABEL: PR22371:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: subl $12, %esp
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Modified: llvm/trunk/test/CodeGen/X86/pr27591.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr27591.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr27591.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr27591.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@ target triple = "x86_64-unknown-linux-gn
define void @test1(i32 %x) #0 {
; CHECK-LABEL: test1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: cmpl $0, %edi
; CHECK-NEXT: setne %al
@@ -22,7 +22,7 @@ entry:
define void @test2(i32 %x) #0 {
; CHECK-LABEL: test2:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: cmpl $0, %edi
; CHECK-NEXT: setne %al
Modified: llvm/trunk/test/CodeGen/X86/pr28129.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr28129.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr28129.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr28129.ll Mon Dec 4 09:18:51 2017
@@ -4,14 +4,14 @@
define <4 x double> @cmp4f64_domain(<4 x double> %a) {
; X86-LABEL: cmp4f64_domain:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X86-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; X86-NEXT: retl
;
; X64-LABEL: cmp4f64_domain:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0
@@ -25,14 +25,14 @@ define <4 x double> @cmp4f64_domain(<4 x
define <4 x double> @cmp4f64_domain_optsize(<4 x double> %a) optsize {
; X86-LABEL: cmp4f64_domain_optsize:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X86-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X86-NEXT: vaddpd %ymm1, %ymm0, %ymm0
; X86-NEXT: retl
;
; X64-LABEL: cmp4f64_domain_optsize:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X64-NEXT: vaddpd %ymm1, %ymm0, %ymm0
@@ -46,14 +46,14 @@ define <4 x double> @cmp4f64_domain_opts
define <8 x float> @cmp8f32_domain(<8 x float> %a) {
; X86-LABEL: cmp8f32_domain:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X86-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X86-NEXT: vaddps %ymm1, %ymm0, %ymm0
; X86-NEXT: retl
;
; X64-LABEL: cmp8f32_domain:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X64-NEXT: vaddps %ymm1, %ymm0, %ymm0
@@ -67,14 +67,14 @@ define <8 x float> @cmp8f32_domain(<8 x
define <8 x float> @cmp8f32_domain_optsize(<8 x float> %a) optsize {
; X86-LABEL: cmp8f32_domain_optsize:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X86-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X86-NEXT: vaddps %ymm1, %ymm0, %ymm0
; X86-NEXT: retl
;
; X64-LABEL: cmp8f32_domain_optsize:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
; X64-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1
; X64-NEXT: vaddps %ymm1, %ymm0, %ymm0
Modified: llvm/trunk/test/CodeGen/X86/pr28173.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr28173.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr28173.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr28173.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gn
define i64 @foo64(i1 zeroext %i) #0 {
; CHECK-LABEL: foo64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orq $-2, %rax
; CHECK-NEXT: retq
@@ -24,7 +24,7 @@ end:
define i16 @foo16(i1 zeroext %i) #0 {
; CHECK-LABEL: foo16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orl $65534, %eax # imm = 0xFFFE
; CHECK-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -42,7 +42,7 @@ end:
define i16 @foo16_1(i1 zeroext %i, i32 %j) #0 {
; CHECK-LABEL: foo16_1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orl $2, %eax
; CHECK-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -60,7 +60,7 @@ end:
define i32 @foo32(i1 zeroext %i) #0 {
; CHECK-LABEL: foo32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orl $-2, %eax
; CHECK-NEXT: retq
@@ -77,7 +77,7 @@ end:
define i8 @foo8(i1 zeroext %i) #0 {
; CHECK-LABEL: foo8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: orb $-2, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pr28472.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr28472.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr28472.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr28472.ll Mon Dec 4 09:18:51 2017
@@ -1,7 +1,7 @@
; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; CHECK-LABEL: {{^}}same_dynamic_index_fp_vector_type:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: retq
define float @same_dynamic_index_fp_vector_type(float %val, i32 %idx) {
bb:
Modified: llvm/trunk/test/CodeGen/X86/pr29061.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr29061.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr29061.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr29061.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define void @t1(i8 signext %c) {
; CHECK-LABEL: t1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .cfi_offset %edi, -8
@@ -23,7 +23,7 @@ entry:
define void @t2(i8 signext %c) {
; CHECK-LABEL: t2:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .cfi_offset %esi, -8
Modified: llvm/trunk/test/CodeGen/X86/pr29112.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr29112.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr29112.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr29112.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ declare <4 x float> @foo(<4 x float>, <4
define <4 x float> @bar(<4 x float>* %a1p, <4 x float>* %a2p, <4 x float> %a3, <4 x float> %a4, <16 x float>%c1, <16 x float>%c2) {
; CHECK-LABEL: bar:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: subq $88, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 96
; CHECK-NEXT: vmovaps %xmm1, {{[0-9]+}}(%rsp) # 16-byte Spill
Modified: llvm/trunk/test/CodeGen/X86/pr29170.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr29170.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr29170.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr29170.ll Mon Dec 4 09:18:51 2017
@@ -8,11 +8,11 @@ target triple = "i386-unknown-linux-gnu"
define i32 @main() {
; CHECK-LABEL: main:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: jne .LBB0_3
-; CHECK-NEXT: # BB#1: # %go
+; CHECK-NEXT: # %bb.1: # %go
; CHECK-NEXT: movl $-1, %ecx
; CHECK-NEXT: movsbl b, %edx
; CHECK-NEXT: notl %ecx
@@ -20,7 +20,7 @@ define i32 @main() {
; CHECK-NEXT: cmpl $-1, %edx
; CHECK-NEXT: sbbl %ecx, %eax
; CHECK-NEXT: jge .LBB0_3
-; CHECK-NEXT: # BB#2: # %if.then
+; CHECK-NEXT: # %bb.2: # %if.then
; CHECK-NEXT: movl $42, %eax
; CHECK-NEXT: retl
; CHECK-NEXT: .LBB0_3: # %if.else
Modified: llvm/trunk/test/CodeGen/X86/pr30284.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr30284.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr30284.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr30284.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define void @f_f___un_3C_unf_3E_un_3C_unf_3E_() {
; CHECK-LABEL: f_f___un_3C_unf_3E_un_3C_unf_3E_:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vmovapd 0, %zmm0
; CHECK-NEXT: vmovapd 64, %zmm1
; CHECK-NEXT: vmovapd {{.*#+}} zmm2 = [0,16,0,16,0,16,0,16,0,16,0,16,0,16,0,16]
Modified: llvm/trunk/test/CodeGen/X86/pr30430.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr30430.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr30430.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr30430.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <16 x float> @makefloat(float %f1, float %f2, float %f3, float %f4, float %f5, float %f6, float %f7, float %f8, float %f9, float %f10, float %f11, float %f12, float %f13, float %f14, float %f15, float %f16) #0 {
; CHECK-LABEL: makefloat:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbp, -16
Modified: llvm/trunk/test/CodeGen/X86/pr30511.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr30511.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr30511.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr30511.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@ target triple = "x86_64-pc-linux-gnu"
define i64 @PR30511(<2 x double> %a) {
; CHECK-LABEL: PR30511:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: addpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,2,3]
; CHECK-NEXT: cvtdq2pd %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/pr31045.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr31045.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr31045.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr31045.ll Mon Dec 4 09:18:51 2017
@@ -17,7 +17,7 @@
; Function Attrs: norecurse nounwind uwtable
define void @_Z1av() local_unnamed_addr #0 {
; CHECK-LABEL: _Z1av:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl struct_obj_3+{{.*}}(%rip), %eax
; CHECK-NEXT: movsbl {{.*}}(%rip), %ecx
; CHECK-NEXT: movzbl {{.*}}(%rip), %edx
Modified: llvm/trunk/test/CodeGen/X86/pr31088.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr31088.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr31088.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr31088.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define <1 x half> @ir_fadd_v1f16(<1 x half> %arg0, <1 x half> %arg1) nounwind {
; X86-LABEL: ir_fadd_v1f16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: subl $28, %esp
; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-NEXT: movss %xmm0, (%esp)
@@ -31,7 +31,7 @@ define <1 x half> @ir_fadd_v1f16(<1 x ha
; X86-NEXT: retl
;
; X64-LABEL: ir_fadd_v1f16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: movss %xmm0, {{[0-9]+}}(%rsp) # 4-byte Spill
; X64-NEXT: movaps %xmm1, %xmm0
@@ -49,7 +49,7 @@ define <1 x half> @ir_fadd_v1f16(<1 x ha
; X64-NEXT: retq
;
; F16C-LABEL: ir_fadd_v1f16:
-; F16C: # BB#0:
+; F16C: # %bb.0:
; F16C-NEXT: vcvtps2ph $4, %xmm1, %xmm1
; F16C-NEXT: vcvtph2ps %xmm1, %xmm1
; F16C-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -62,7 +62,7 @@ define <1 x half> @ir_fadd_v1f16(<1 x ha
define <2 x half> @ir_fadd_v2f16(<2 x half> %arg0, <2 x half> %arg1) nounwind {
; X86-LABEL: ir_fadd_v2f16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: subl $64, %esp
; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-NEXT: movss %xmm0, (%esp)
@@ -110,7 +110,7 @@ define <2 x half> @ir_fadd_v2f16(<2 x ha
; X86-NEXT: retl
;
; X64-LABEL: ir_fadd_v2f16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: subq $24, %rsp
; X64-NEXT: movss %xmm2, {{[0-9]+}}(%rsp) # 4-byte Spill
; X64-NEXT: movss %xmm1, {{[0-9]+}}(%rsp) # 4-byte Spill
@@ -145,7 +145,7 @@ define <2 x half> @ir_fadd_v2f16(<2 x ha
; X64-NEXT: retq
;
; F16C-LABEL: ir_fadd_v2f16:
-; F16C: # BB#0:
+; F16C: # %bb.0:
; F16C-NEXT: vcvtps2ph $4, %xmm3, %xmm3
; F16C-NEXT: vcvtph2ps %xmm3, %xmm3
; F16C-NEXT: vcvtps2ph $4, %xmm1, %xmm1
Modified: llvm/trunk/test/CodeGen/X86/pr31323.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr31323.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr31323.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr31323.ll Mon Dec 4 09:18:51 2017
@@ -6,12 +6,12 @@
define i32 @pr31323(i32) {
; X32-LABEL: pr31323:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: retl
;
; X64-LABEL: pr31323:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: retq
entry:
Modified: llvm/trunk/test/CodeGen/X86/pr31773.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr31773.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr31773.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr31773.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define <16 x i8> @usat_trunc_wb_256(<16 x i16> %i) {
; AVX-LABEL: usat_trunc_wb_256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
; AVX-NEXT: vpminuw %xmm2, %xmm1, %xmm1
@@ -16,7 +16,7 @@ define <16 x i8> @usat_trunc_wb_256(<16
; AVX-NEXT: retq
;
; AVX512-LABEL: usat_trunc_wb_256:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpmovuswb %ymm0, %xmm0
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
@@ -28,7 +28,7 @@ define <16 x i8> @usat_trunc_wb_256(<16
define <8 x i16> @usat_trunc_dw_256(<8 x i32> %i) {
; AVX-LABEL: usat_trunc_dw_256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [65535,65535,65535,65535]
; AVX-NEXT: vpminud %xmm2, %xmm1, %xmm1
@@ -38,7 +38,7 @@ define <8 x i16> @usat_trunc_dw_256(<8 x
; AVX-NEXT: retq
;
; AVX512-LABEL: usat_trunc_dw_256:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpmovusdw %ymm0, %xmm0
; AVX512-NEXT: vzeroupper
; AVX512-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pr31956.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr31956.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr31956.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr31956.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@ target triple = "x86_64-scei-ps4"
define <4 x float> @foo() {
; CHECK-LABEL: foo:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],mem[1,2,3]
; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm1
Modified: llvm/trunk/test/CodeGen/X86/pr32108.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32108.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32108.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32108.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define void @pr32108() {
; CHECK-LABEL: pr32108:
-; CHECK: # BB#0: # %CF257
+; CHECK: # %bb.0: # %CF257
; CHECK-NEXT: movb $0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: .p2align 4, 0x90
; CHECK-NEXT: .LBB0_1: # %CF244
Modified: llvm/trunk/test/CodeGen/X86/pr32241.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32241.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32241.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32241.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i32 @_Z3foov() {
; CHECK-LABEL: _Z3foov:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %esi
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: subl $16, %esp
@@ -18,7 +18,7 @@ define i32 @_Z3foov() {
; CHECK-NEXT: movl %ecx, {{[0-9]+}}(%esp) # 4-byte Spill
; CHECK-NEXT: movb %al, {{[0-9]+}}(%esp) # 1-byte Spill
; CHECK-NEXT: jne .LBB0_2
-; CHECK-NEXT: # BB#1: # %lor.rhs
+; CHECK-NEXT: # %bb.1: # %lor.rhs
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: movb %al, %cl
; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill
@@ -37,7 +37,7 @@ define i32 @_Z3foov() {
; CHECK-NEXT: cmpl $0, %edx
; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill
; CHECK-NEXT: jne .LBB0_4
-; CHECK-NEXT: # BB#3: # %lor.rhs4
+; CHECK-NEXT: # %bb.3: # %lor.rhs4
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: movb %al, %cl
; CHECK-NEXT: movb %cl, {{[0-9]+}}(%esp) # 1-byte Spill
Modified: llvm/trunk/test/CodeGen/X86/pr32256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32256.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32256.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
; Function Attrs: noinline nounwind
define void @_Z1av() {
; CHECK-LABEL: _Z1av:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subl $2, %esp
; CHECK-NEXT: .cfi_def_cfa_offset 6
; CHECK-NEXT: xorl %eax, %eax
Modified: llvm/trunk/test/CodeGen/X86/pr32282.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32282.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32282.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32282.ll Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
define void @foo() {
; X86-LABEL: foo:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: pushl %eax
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: movl d, %eax
@@ -46,7 +46,7 @@ define void @foo() {
; X86-NEXT: retl
;
; X64-LABEL: foo:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq {{.*}}(%rip), %rax
; X64-NEXT: movabsq $3013716102212485120, %rcx # imm = 0x29D2DED3DE400000
; X64-NEXT: andnq %rcx, %rax, %rcx
@@ -55,7 +55,7 @@ define void @foo() {
; X64-NEXT: movabsq $4393751543808, %rax # imm = 0x3FF00000000
; X64-NEXT: testq %rax, %rcx
; X64-NEXT: je .LBB0_1
-; X64-NEXT: # BB#2:
+; X64-NEXT: # %bb.2:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: xorl %edx, %edx
; X64-NEXT: idivq %rcx
Modified: llvm/trunk/test/CodeGen/X86/pr32284.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32284.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32284.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32284.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define void @foo() {
; X86-O0-LABEL: foo:
-; X86-O0: # BB#0: # %entry
+; X86-O0: # %bb.0: # %entry
; X86-O0-NEXT: xorl %eax, %eax
; X86-O0-NEXT: movl %eax, %ecx
; X86-O0-NEXT: xorl %eax, %eax
@@ -36,7 +36,7 @@ define void @foo() {
; X86-O0-NEXT: retq
;
; X64-LABEL: foo:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movzbl {{.*}}(%rip), %eax
; X64-NEXT: testb %al, %al
; X64-NEXT: setne -{{[0-9]+}}(%rsp)
@@ -50,7 +50,7 @@ define void @foo() {
; X64-NEXT: retq
;
; 686-O0-LABEL: foo:
-; 686-O0: # BB#0: # %entry
+; 686-O0: # %bb.0: # %entry
; 686-O0-NEXT: subl $8, %esp
; 686-O0-NEXT: .cfi_def_cfa_offset 12
; 686-O0-NEXT: movb c, %al
@@ -74,7 +74,7 @@ define void @foo() {
; 686-O0-NEXT: retl
;
; 686-LABEL: foo:
-; 686: # BB#0: # %entry
+; 686: # %bb.0: # %entry
; 686-NEXT: subl $8, %esp
; 686-NEXT: .cfi_def_cfa_offset 12
; 686-NEXT: movzbl c, %eax
@@ -120,7 +120,7 @@ entry:
define void @f1() {
; X86-O0-LABEL: f1:
-; X86-O0: # BB#0: # %entry
+; X86-O0: # %bb.0: # %entry
; X86-O0-NEXT: movabsq $8381627093, %rax # imm = 0x1F3957AD5
; X86-O0-NEXT: movslq var_5, %rcx
; X86-O0-NEXT: addq %rax, %rcx
@@ -156,7 +156,7 @@ define void @f1() {
; X86-O0-NEXT: retq
;
; X64-LABEL: f1:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movslq {{.*}}(%rip), %rax
; X64-NEXT: xorl %ecx, %ecx
; X64-NEXT: cmpq $-1, %rax
@@ -176,7 +176,7 @@ define void @f1() {
; X64-NEXT: retq
;
; 686-O0-LABEL: f1:
-; 686-O0: # BB#0: # %entry
+; 686-O0: # %bb.0: # %entry
; 686-O0-NEXT: pushl %ebp
; 686-O0-NEXT: .cfi_def_cfa_offset 8
; 686-O0-NEXT: pushl %ebx
@@ -233,7 +233,7 @@ define void @f1() {
; 686-O0-NEXT: retl
;
; 686-LABEL: f1:
-; 686: # BB#0: # %entry
+; 686: # %bb.0: # %entry
; 686-NEXT: pushl %edi
; 686-NEXT: .cfi_def_cfa_offset 8
; 686-NEXT: pushl %esi
@@ -307,7 +307,7 @@ entry:
define void @f2() {
; X86-O0-LABEL: f2:
-; X86-O0: # BB#0: # %entry
+; X86-O0: # %bb.0: # %entry
; X86-O0-NEXT: # implicit-def: %rax
; X86-O0-NEXT: movzbl var_7, %ecx
; X86-O0-NEXT: cmpb $0, var_7
@@ -335,7 +335,7 @@ define void @f2() {
; X86-O0-NEXT: retq
;
; X64-LABEL: f2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movzbl {{.*}}(%rip), %eax
; X64-NEXT: xorl %ecx, %ecx
; X64-NEXT: testl %eax, %eax
@@ -352,7 +352,7 @@ define void @f2() {
; X64-NEXT: retq
;
; 686-O0-LABEL: f2:
-; 686-O0: # BB#0: # %entry
+; 686-O0: # %bb.0: # %entry
; 686-O0-NEXT: pushl %edi
; 686-O0-NEXT: .cfi_def_cfa_offset 8
; 686-O0-NEXT: pushl %esi
@@ -391,7 +391,7 @@ define void @f2() {
; 686-O0-NEXT: retl
;
; 686-LABEL: f2:
-; 686: # BB#0: # %entry
+; 686: # %bb.0: # %entry
; 686-NEXT: subl $2, %esp
; 686-NEXT: .cfi_def_cfa_offset 6
; 686-NEXT: movzbl var_7, %eax
@@ -441,7 +441,7 @@ entry:
define void @f3() #0 {
; X86-O0-LABEL: f3:
-; X86-O0: # BB#0: # %entry
+; X86-O0: # %bb.0: # %entry
; X86-O0-NEXT: movl var_13, %eax
; X86-O0-NEXT: xorl $-1, %eax
; X86-O0-NEXT: movl %eax, %eax
@@ -477,7 +477,7 @@ define void @f3() #0 {
; X86-O0-NEXT: retq
;
; X64-LABEL: f3:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movl {{.*}}(%rip), %eax
; X64-NEXT: movl $4294967295, %ecx # imm = 0xFFFFFFFF
; X64-NEXT: xorq %rax, %rcx
@@ -493,7 +493,7 @@ define void @f3() #0 {
; X64-NEXT: retq
;
; 686-O0-LABEL: f3:
-; 686-O0: # BB#0: # %entry
+; 686-O0: # %bb.0: # %entry
; 686-O0-NEXT: pushl %ebp
; 686-O0-NEXT: .cfi_def_cfa_offset 8
; 686-O0-NEXT: .cfi_offset %ebp, -8
@@ -530,7 +530,7 @@ define void @f3() #0 {
; 686-O0-NEXT: retl
;
; 686-LABEL: f3:
-; 686: # BB#0: # %entry
+; 686: # %bb.0: # %entry
; 686-NEXT: pushl %ebp
; 686-NEXT: .cfi_def_cfa_offset 8
; 686-NEXT: .cfi_offset %ebp, -8
Modified: llvm/trunk/test/CodeGen/X86/pr32329.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32329.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32329.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32329.ll Mon Dec 4 09:18:51 2017
@@ -16,7 +16,7 @@
define void @foo() local_unnamed_addr {
; X86-LABEL: foo:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: pushl %ebx
@@ -63,7 +63,7 @@ define void @foo() local_unnamed_addr {
; X86-NEXT: retl
;
; X64-LABEL: foo:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movl {{.*}}(%rip), %eax
; X64-NEXT: movsbl {{.*}}(%rip), %r9d
; X64-NEXT: movzwl {{.*}}(%rip), %r8d
Modified: llvm/trunk/test/CodeGen/X86/pr32340.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32340.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32340.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32340.ll Mon Dec 4 09:18:51 2017
@@ -12,7 +12,7 @@
define void @foo() {
; X64-LABEL: foo:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: movl %eax, %ecx
; X64-NEXT: movabsq $-1142377792914660288, %rdx # imm = 0xF02575732E06E440
Modified: llvm/trunk/test/CodeGen/X86/pr32345.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32345.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32345.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32345.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@
define void @foo() {
; X640-LABEL: foo:
-; X640: # BB#0: # %bb
+; X640: # %bb.0: # %bb
; X640-NEXT: # implicit-def: %rax
; X640-NEXT: movzwl var_22, %ecx
; X640-NEXT: movzwl var_27, %edx
@@ -35,7 +35,7 @@ define void @foo() {
; X640-NEXT: retq
;
; 6860-LABEL: foo:
-; 6860: # BB#0: # %bb
+; 6860: # %bb.0: # %bb
; 6860-NEXT: pushl %ebp
; 6860-NEXT: .cfi_def_cfa_offset 8
; 6860-NEXT: .cfi_offset %ebp, -8
@@ -80,7 +80,7 @@ define void @foo() {
; 6860-NEXT: movl %edi, {{[0-9]+}}(%esp) # 4-byte Spill
; 6860-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
; 6860-NEXT: jne .LBB0_2
-; 6860-NEXT: # BB#1: # %bb
+; 6860-NEXT: # %bb.1: # %bb
; 6860-NEXT: movl {{[0-9]+}}(%esp), %eax # 4-byte Reload
; 6860-NEXT: movl %eax, {{[0-9]+}}(%esp) # 4-byte Spill
; 6860-NEXT: .LBB0_2: # %bb
@@ -96,7 +96,7 @@ define void @foo() {
; 6860-NEXT: retl
;
; X64-LABEL: foo:
-; X64: # BB#0: # %bb
+; X64: # %bb.0: # %bb
; X64-NEXT: movzwl {{.*}}(%rip), %ecx
; X64-NEXT: movzwl {{.*}}(%rip), %eax
; X64-NEXT: xorw %cx, %ax
@@ -110,7 +110,7 @@ define void @foo() {
; X64-NEXT: retq
;
; 686-LABEL: foo:
-; 686: # BB#0: # %bb
+; 686: # %bb.0: # %bb
; 686-NEXT: pushl %ebp
; 686-NEXT: .cfi_def_cfa_offset 8
; 686-NEXT: .cfi_offset %ebp, -8
@@ -130,7 +130,7 @@ define void @foo() {
; 686-NEXT: shrdl %cl, %edx, %eax
; 686-NEXT: testb $32, %cl
; 686-NEXT: jne .LBB0_2
-; 686-NEXT: # BB#1: # %bb
+; 686-NEXT: # %bb.1: # %bb
; 686-NEXT: movl %eax, %edx
; 686-NEXT: .LBB0_2: # %bb
; 686-NEXT: movb %dl, (%eax)
Modified: llvm/trunk/test/CodeGen/X86/pr32368.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32368.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32368.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32368.ll Mon Dec 4 09:18:51 2017
@@ -6,21 +6,21 @@
define <4 x float> @PR32368_128(<4 x float>) {
; SSE-LABEL: PR32368_128:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: andps {{.*}}(%rip), %xmm0
; SSE-NEXT: addps %xmm0, %xmm0
; SSE-NEXT: andps {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX1-LABEL: PR32368_128:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: vaddps %xmm0, %xmm0, %xmm0
; AVX1-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: PR32368_128:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
; AVX2-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vaddps %xmm0, %xmm0, %xmm0
@@ -29,7 +29,7 @@ define <4 x float> @PR32368_128(<4 x flo
; AVX2-NEXT: retq
;
; AVX512-LABEL: PR32368_128:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcastss {{.*}}(%rip), %xmm1
; AVX512-NEXT: vandps %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vaddps %xmm0, %xmm0, %xmm0
@@ -48,7 +48,7 @@ define <4 x float> @PR32368_128(<4 x flo
define <8 x float> @PR32368_256(<8 x float>) {
; SSE-LABEL: PR32368_256:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movaps {{.*#+}} xmm2 = [4294967004,4294967004,4294967004,4294967004]
; SSE-NEXT: andps %xmm2, %xmm0
; SSE-NEXT: andps %xmm2, %xmm1
@@ -60,14 +60,14 @@ define <8 x float> @PR32368_256(<8 x flo
; SSE-NEXT: retq
;
; AVX1-LABEL: PR32368_256:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
; AVX1-NEXT: vaddps %ymm0, %ymm0, %ymm0
; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: PR32368_256:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %ymm1
; AVX2-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vaddps %ymm0, %ymm0, %ymm0
@@ -76,7 +76,7 @@ define <8 x float> @PR32368_256(<8 x flo
; AVX2-NEXT: retq
;
; AVX512-LABEL: PR32368_256:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcastss {{.*}}(%rip), %ymm1
; AVX512-NEXT: vandps %ymm1, %ymm0, %ymm0
; AVX512-NEXT: vaddps %ymm0, %ymm0, %ymm0
@@ -95,7 +95,7 @@ define <8 x float> @PR32368_256(<8 x flo
define <16 x float> @PR32368_512(<16 x float>) {
; SSE-LABEL: PR32368_512:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movaps {{.*#+}} xmm4 = [4294967004,4294967004,4294967004,4294967004]
; SSE-NEXT: andps %xmm4, %xmm0
; SSE-NEXT: andps %xmm4, %xmm1
@@ -113,7 +113,7 @@ define <16 x float> @PR32368_512(<16 x f
; SSE-NEXT: retq
;
; AVX1-LABEL: PR32368_512:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [4294967004,4294967004,4294967004,4294967004,4294967004,4294967004,4294967004,4294967004]
; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
@@ -125,7 +125,7 @@ define <16 x float> @PR32368_512(<16 x f
; AVX1-NEXT: retq
;
; AVX2-LABEL: PR32368_512:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %ymm2
; AVX2-NEXT: vandps %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1
@@ -137,7 +137,7 @@ define <16 x float> @PR32368_512(<16 x f
; AVX2-NEXT: retq
;
; AVX512-LABEL: PR32368_512:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0
; AVX512-NEXT: vaddps %zmm0, %zmm0, %zmm0
; AVX512-NEXT: vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0
Modified: llvm/trunk/test/CodeGen/X86/pr32420.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32420.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32420.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32420.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@ target triple = "x86_64-apple-macosx10.1
define i32 @PR32420() {
; CHECK-LABEL: PR32420:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movq _a@{{.*}}(%rip), %rax
; CHECK-NEXT: movzwl (%rax), %eax
; CHECK-NEXT: movl %eax, %ecx
Modified: llvm/trunk/test/CodeGen/X86/pr32451.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32451.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32451.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32451.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@ target triple = "x86_64-unknown-linux-gn
define i8** @japi1_convert_690(i8**, i8***, i32) {
; CHECK-LABEL: japi1_convert_690:
-; CHECK: # BB#0: # %top
+; CHECK: # %bb.0: # %top
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: subl $16, %esp
Modified: llvm/trunk/test/CodeGen/X86/pr32484.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32484.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32484.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32484.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define void @foo() {
; CHECK-LABEL: foo:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: # implicit-def: %rax
; CHECK-NEXT: jmpq *%rax
; CHECK-NEXT: .LBB0_1:
Modified: llvm/trunk/test/CodeGen/X86/pr32659.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32659.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32659.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32659.ll Mon Dec 4 09:18:51 2017
@@ -23,7 +23,7 @@ declare i32 @putchar(i32) nounwind
define void @fn2() nounwind optsize {
; CHECK-LABEL: fn2:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: movl $48, (%esp)
Modified: llvm/trunk/test/CodeGen/X86/pr32907.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr32907.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr32907.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr32907.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define <2 x i64> @PR32907(<2 x i64> %astype.i, <2 x i64> %astype6.i) {
; SSE2-LABEL: PR32907:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: psubq %xmm1, %xmm0
; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: psrad $31, %xmm1
@@ -20,7 +20,7 @@ define <2 x i64> @PR32907(<2 x i64> %ast
; SSE2-NEXT: retq
;
; SSE42-LABEL: PR32907:
-; SSE42: # BB#0: # %entry
+; SSE42: # %bb.0: # %entry
; SSE42-NEXT: psubq %xmm1, %xmm0
; SSE42-NEXT: pxor %xmm1, %xmm1
; SSE42-NEXT: pcmpgtq %xmm0, %xmm1
@@ -29,7 +29,7 @@ define <2 x i64> @PR32907(<2 x i64> %ast
; SSE42-NEXT: retq
;
; AVX2-LABEL: PR32907:
-; AVX2: # BB#0: # %entry
+; AVX2: # %bb.0: # %entry
; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
; AVX2-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm1
@@ -38,7 +38,7 @@ define <2 x i64> @PR32907(<2 x i64> %ast
; AVX2-NEXT: retq
;
; AVX512-LABEL: PR32907:
-; AVX512: # BB#0: # %entry
+; AVX512: # %bb.0: # %entry
; AVX512-NEXT: vpsubq %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vpsraq $63, %zmm0, %zmm1
; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/pr33290.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr33290.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr33290.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr33290.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define void @e() {
; X86-LABEL: e:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl b, %eax
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .LBB0_1: # %for.cond
@@ -20,7 +20,7 @@ define void @e() {
; X86-NEXT: jmp .LBB0_1
;
; X64-LABEL: e:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movq {{.*}}(%rip), %rax
; X64-NEXT: movl $a, %esi
; X64-NEXT: .p2align 4, 0x90
Modified: llvm/trunk/test/CodeGen/X86/pr33349.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr33349.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr33349.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr33349.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gn
define void @test(<4 x i1> %m, <4 x x86_fp80> %v, <4 x x86_fp80>*%p) local_unnamed_addr {
; KNL-LABEL: test:
-; KNL: # BB#0: # %bb
+; KNL: # %bb.0: # %bb
; KNL-NEXT: vpextrb $0, %xmm0, %eax
; KNL-NEXT: testb $1, %al
; KNL-NEXT: fld1
@@ -37,7 +37,7 @@ target triple = "x86_64-unknown-linux-gn
; KNL-NEXT: retq
;
; SKX-LABEL: test:
-; SKX: # BB#0: # %bb
+; SKX: # %bb.0: # %bb
; SKX-NEXT: vpslld $31, %xmm0, %xmm0
; SKX-NEXT: vptestmd %xmm0, %xmm0, %k0
; SKX-NEXT: kshiftrw $2, %k0, %k1
Modified: llvm/trunk/test/CodeGen/X86/pr33828.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr33828.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr33828.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr33828.ll Mon Dec 4 09:18:51 2017
@@ -6,20 +6,20 @@
define void @foo() {
; X86-LABEL: foo:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movsbl var_580, %eax
; X86-NEXT: testl $-536870913, %eax # imm = 0xDFFFFFFF
; X86-NEXT: jne .LBB0_1
-; X86-NEXT: # BB#2: # %if.end13
+; X86-NEXT: # %bb.2: # %if.end13
; X86-NEXT: retl
; X86-NEXT: .LBB0_1: # %if.then11
;
; X64-LABEL: foo:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movsbl {{.*}}(%rip), %eax
; X64-NEXT: testl $-536870913, %eax # imm = 0xDFFFFFFF
; X64-NEXT: jne .LBB0_1
-; X64-NEXT: # BB#2: # %if.end13
+; X64-NEXT: # %bb.2: # %if.end13
; X64-NEXT: retq
; X64-NEXT: .LBB0_1: # %if.then11
entry:
Modified: llvm/trunk/test/CodeGen/X86/pr33844.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr33844.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr33844.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr33844.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@ target triple = "x86_64-unknown-linux-gn
define void @patatino() {
; CHECK-LABEL: patatino:
-; CHECK: # BB#0: # %bb
+; CHECK: # %bb.0: # %bb
; CHECK-NEXT: movl {{.*}}(%rip), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: shrl $31, %ecx
Modified: llvm/trunk/test/CodeGen/X86/pr33960.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr33960.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr33960.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr33960.ll Mon Dec 4 09:18:51 2017
@@ -6,12 +6,12 @@
define void @PR33960() {
; X86-LABEL: PR33960:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl $0, b
; X86-NEXT: retl
;
; X64-LABEL: PR33960:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movl $0, {{.*}}(%rip)
; X64-NEXT: retq
entry:
Modified: llvm/trunk/test/CodeGen/X86/pr34080.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34080.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34080.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34080.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-LABEL: _Z1fe:
-; SSE2: ## BB#0: ## %entry
+; SSE2: ## %bb.0: ## %entry
; SSE2-NEXT: pushq %rbp
; SSE2-NEXT: .cfi_def_cfa_offset 16
; SSE2-NEXT: .cfi_offset %rbp, -16
@@ -47,7 +47,7 @@ define void @_Z1fe(x86_fp80 %z) local_un
; SSE2-NEXT: retq
;
; SSE2-BROKEN-LABEL: _Z1fe:
-; SSE2-BROKEN: ## BB#0: ## %entry
+; SSE2-BROKEN: ## %bb.0: ## %entry
; SSE2-BROKEN-NEXT: pushq %rbp
; SSE2-BROKEN-NEXT: .cfi_def_cfa_offset 16
; SSE2-BROKEN-NEXT: .cfi_offset %rbp, -16
@@ -86,7 +86,7 @@ define void @_Z1fe(x86_fp80 %z) local_un
; SSE2-BROKEN-NEXT: retq
;
; SSE3-LABEL: _Z1fe:
-; SSE3: ## BB#0: ## %entry
+; SSE3: ## %bb.0: ## %entry
; SSE3-NEXT: pushq %rbp
; SSE3-NEXT: .cfi_def_cfa_offset 16
; SSE3-NEXT: .cfi_offset %rbp, -16
@@ -115,7 +115,7 @@ define void @_Z1fe(x86_fp80 %z) local_un
; SSE3-NEXT: retq
;
; AVX-LABEL: _Z1fe:
-; AVX: ## BB#0: ## %entry
+; AVX: ## %bb.0: ## %entry
; AVX-NEXT: pushq %rbp
; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: .cfi_offset %rbp, -16
Modified: llvm/trunk/test/CodeGen/X86/pr34088.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34088.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34088.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34088.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@
;
define i32 @pr34088() local_unnamed_addr {
; CHECK-LABEL: pr34088:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: .cfi_offset %ebp, -8
Modified: llvm/trunk/test/CodeGen/X86/pr34137.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34137.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34137.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34137.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define void @pr34127() {
; CHECK-LABEL: pr34127:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzwl {{.*}}(%rip), %eax
; CHECK-NEXT: movzwl {{.*}}(%rip), %ecx
; CHECK-NEXT: andw %ax, %cx
Modified: llvm/trunk/test/CodeGen/X86/pr34139.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34139.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34139.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34139.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define void @f_f(<16 x double>* %ptr) {
; CHECK-LABEL: f_f:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
; CHECK-NEXT: vmovdqa %xmm0, (%rax)
store <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <16 x i8>* undef
Modified: llvm/trunk/test/CodeGen/X86/pr34149.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34149.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34149.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34149.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ declare <4 x double> @llvm.maxnum.v4f64(
define <4 x double> @via_minnum(<4 x double> %x, <4 x double> %y) {
; CHECK-LABEL: via_minnum:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vminpd %ymm0, %ymm1, %ymm2
; CHECK-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm0
; CHECK-NEXT: vblendvpd %ymm0, %ymm1, %ymm2, %ymm0
@@ -18,7 +18,7 @@ define <4 x double> @via_minnum(<4 x dou
define <4 x double> @via_maxnum(<4 x double> %x, <4 x double> %y) {
; CHECK-LABEL: via_maxnum:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vmaxpd %ymm0, %ymm1, %ymm2
; CHECK-NEXT: vcmpunordpd %ymm0, %ymm0, %ymm0
; CHECK-NEXT: vblendvpd %ymm0, %ymm1, %ymm2, %ymm0
@@ -29,7 +29,7 @@ define <4 x double> @via_maxnum(<4 x dou
define <4 x double> @via_fcmp(<4 x double> %x, <4 x double> %y) {
; CHECK-LABEL: via_fcmp:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vminpd %ymm0, %ymm1, %ymm0
; CHECK-NEXT: retq
%c = fcmp ule <4 x double> %x, %y
Modified: llvm/trunk/test/CodeGen/X86/pr34177.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34177.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34177.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34177.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gn
define void @test() local_unnamed_addr {
; CHECK-LABEL: test:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vmovdqa {{.*#+}} xmm0 = [2,3]
; CHECK-NEXT: vpextrq $1, %xmm0, %rax
; CHECK-NEXT: vmovq %xmm0, %rcx
Modified: llvm/trunk/test/CodeGen/X86/pr34271-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34271-1.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34271-1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34271-1.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <16 x i16> @foo(<16 x i32> %i) {
; CHECK-LABEL: foo:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpminud {{.*}}(%rip){1to16}, %zmm0, %zmm0
; CHECK-NEXT: vpmovdw %zmm0, %ymm0
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pr34271.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34271.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34271.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34271.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define <4 x i32> @f(<4 x i32> %a) {
; CHECK-LABEL: f:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: paddd .LCPI0_0(%rip), %xmm0
; CHECK-NEXT: retq
%v = add nuw nsw <4 x i32> %a, <i32 16843009, i32 16843009, i32 16843009, i32 16843009>
Modified: llvm/trunk/test/CodeGen/X86/pr34381.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34381.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34381.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34381.ll Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@
; Function Attrs: noinline nounwind optnone uwtable
define void @_Z3foov() {
; CHECK-LABEL: _Z3foov:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsbl {{.*}}(%rip), %eax
; CHECK-NEXT: negl %eax
; CHECK-NEXT: cmpl %eax, {{.*}}(%rip)
Modified: llvm/trunk/test/CodeGen/X86/pr34421.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34421.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34421.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34421.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define void @thread_selfcounts() noimplicitfloat noredzone nounwind {
; X86-LABEL: thread_selfcounts:
-; X86: ## BB#0: ## %entry
+; X86: ## %bb.0: ## %entry
; X86-NEXT: subl $44, %esp
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
@@ -17,7 +17,7 @@ define void @thread_selfcounts() noimpli
; X86-NEXT: ## -- End function
;
; X64-LABEL: thread_selfcounts:
-; X64: ## BB#0: ## %entry
+; X64: ## %bb.0: ## %entry
; X64-NEXT: subq $40, %rsp
; X64-NEXT: movq {{[0-9]+}}(%rsp), %rax
; X64-NEXT: movq {{[0-9]+}}(%rsp), %rcx
Modified: llvm/trunk/test/CodeGen/X86/pr34605.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34605.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34605.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34605.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define void @pr34605(i8* nocapture %s, i32 %p) {
; CHECK-LABEL: pr34605:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: vpbroadcastd {{[0-9]+}}(%esp), %zmm0
; CHECK-NEXT: vpcmpeqd {{\.LCPI.*}}, %zmm0, %k0
Modified: llvm/trunk/test/CodeGen/X86/pr34629.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34629.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34629.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34629.ll Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@ target triple = "x86_64-unknown-linux-gn
; Function Attrs: norecurse nounwind uwtable
define void @c() local_unnamed_addr #0 {
; CHECK-LABEL: c:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq {{.*}}(%rip), %rax
; CHECK-NEXT: leaq (%rax,%rax,4), %rcx
; CHECK-NEXT: negq %rcx
@@ -18,7 +18,7 @@ define void @c() local_unnamed_addr #0 {
; CHECK-NEXT: leaq (%rax,%rax,4), %rax
; CHECK-NEXT: testq %rax, %rcx
; CHECK-NEXT: je .LBB0_2
-; CHECK-NEXT: # BB#1: # %if.then
+; CHECK-NEXT: # %bb.1: # %if.then
; CHECK-NEXT: movb $0, {{.*}}(%rip)
; CHECK-NEXT: .LBB0_2: # %if.end
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/pr34634.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34634.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34634.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34634.ll Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@ target triple = "x86_64-unknown-linux-gn
; Function Attrs: norecurse nounwind uwtable
define void @fn1() local_unnamed_addr #0 {
; CHECK-LABEL: fn1:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movslq {{.*}}(%rip), %rax
; CHECK-NEXT: leaq (%rax,%rax,4), %rcx
; CHECK-NEXT: leaq (,%rax,4), %rdx
@@ -33,7 +33,7 @@ entry:
; Function Attrs: norecurse nounwind uwtable
define i32 @main() local_unnamed_addr #0 {
; CHECK-LABEL: main:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movslq {{.*}}(%rip), %rax
; CHECK-NEXT: leaq (%rax,%rax,4), %rcx
; CHECK-NEXT: leaq (,%rax,4), %rdx
Modified: llvm/trunk/test/CodeGen/X86/pr34653.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34653.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34653.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34653.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@ declare fastcc <38 x double> @test()
define void @pr34653() {
; CHECK-LABEL: pr34653:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rbp
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset %rbp, -16
Modified: llvm/trunk/test/CodeGen/X86/pr34657.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34657.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34657.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34657.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <112 x i8> @pr34657() local_unnamed_addr {
; CHECK-LABEL: pr34657
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovups (%rax), %xmm0
; CHECK-NEXT: vmovups (%rax), %ymm1
; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0
Modified: llvm/trunk/test/CodeGen/X86/pr34855.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr34855.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr34855.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr34855.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define void @PR34855(<2 x i32> *%p0, <2 x i32> *%p1, <2 x i32> *%p2) {
; X86-LABEL: PR34855:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
@@ -12,7 +12,7 @@ define void @PR34855(<2 x i32> *%p0, <2
; X86-NEXT: retl
;
; X64-LABEL: PR34855:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movslq 4(%rdi), %rax
; X64-NEXT: movq %rax, %xmm0
; X64-NEXT: movslq (%rdi), %rax
Modified: llvm/trunk/test/CodeGen/X86/pr35272.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr35272.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr35272.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr35272.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <2 x i48> @PR35272(<2 x i64> %a0, <2 x i48> %a1, <2 x i48> %a2) {
; CHECK-LABEL: PR35272:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpxor %xmm3, %xmm3, %xmm3
; CHECK-NEXT: vpcmpeqq %xmm3, %xmm0, %k1
; CHECK-NEXT: vpblendmq %xmm1, %xmm2, %xmm0 {%k1}
Modified: llvm/trunk/test/CodeGen/X86/pr35399.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr35399.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr35399.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr35399.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
; Make sure we emit opoosite setcc instructions.
define i64 @pr35399(i64, i8*, i8*) {
; CHECK-LABEL: pr35399:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: lzcntq %rdi, %rax
; CHECK-NEXT: setae (%rsi)
; CHECK-NEXT: setb (%rdx)
Modified: llvm/trunk/test/CodeGen/X86/pr35443.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pr35443.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pr35443.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pr35443.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
; Function Attrs: norecurse nounwind uwtable
define void @main() {
; CHECK-LABEL: main:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movzbl ac+{{.*}}(%rip), %eax
; CHECK-NEXT: vmovd %eax, %xmm0
; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
Modified: llvm/trunk/test/CodeGen/X86/pre-coalesce.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pre-coalesce.mir?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pre-coalesce.mir (original)
+++ llvm/trunk/test/CodeGen/X86/pre-coalesce.mir Mon Dec 4 09:18:51 2017
@@ -40,7 +40,7 @@
---
# Check A = B and B = A copies will not exist in the loop at the same time.
# CHECK: name: foo
-# CHECK: [[L1:bb.3.while.body]]:
+# CHECK: [[L1:bb.3]].{{[a-zA-Z0-9.]+}}:
# CHECK: %[[REGA:.*]] = COPY %[[REGB:.*]]
# CHECK-NOT: %[[REGB]] = COPY %[[REGA]]
# CHECK: JNE_1 %[[L1]]
@@ -87,11 +87,11 @@ body: |
%12 = MOV8rm %0, 1, %noreg, 0, %noreg :: (load 1 from %ir.t0)
TEST8rr %12, %12, implicit-def %eflags
%11 = MOV32rm %rip, 1, %noreg, @a, %noreg :: (dereferenceable load 4 from @a)
- JNE_1 %bb.1.while.body.preheader, implicit killed %eflags
+ JNE_1 %bb.1, implicit killed %eflags
bb.4:
%10 = COPY %11
- JMP_1 %bb.3.while.end
+ JMP_1 %bb.3
bb.1.while.body.preheader:
@@ -105,8 +105,8 @@ body: |
%12 = MOV8rm %0, 1, %noreg, 0, %noreg :: (load 1 from %ir.t0)
TEST8rr %12, %12, implicit-def %eflags
%11 = COPY %10
- JNE_1 %bb.2.while.body, implicit killed %eflags
- JMP_1 %bb.3.while.end
+ JNE_1 %bb.2, implicit killed %eflags
+ JMP_1 %bb.3
bb.3.while.end:
%eax = COPY %10
Modified: llvm/trunk/test/CodeGen/X86/promote-vec3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/promote-vec3.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/promote-vec3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/promote-vec3.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define <3 x i16> @zext_i8(<3 x i8>) {
; SSE3-LABEL: zext_i8:
-; SSE3: # BB#0:
+; SSE3: # %bb.0:
; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SSE3-NEXT: movd %eax, %xmm0
; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
@@ -25,7 +25,7 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; SSE3-NEXT: retl
;
; SSE41-LABEL: zext_i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm0, %xmm0
; SSE41-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm0
; SSE41-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm0
@@ -39,7 +39,7 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; SSE41-NEXT: retl
;
; AVX-32-LABEL: zext_i8:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vpxor %xmm0, %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -53,7 +53,7 @@ define <3 x i16> @zext_i8(<3 x i8>) {
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: zext_i8:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
@@ -71,7 +71,7 @@ define <3 x i16> @zext_i8(<3 x i8>) {
define <3 x i16> @sext_i8(<3 x i8>) {
; SSE3-LABEL: sext_i8:
-; SSE3: # BB#0:
+; SSE3: # %bb.0:
; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; SSE3-NEXT: movd %eax, %xmm0
; SSE3-NEXT: movzbl {{[0-9]+}}(%esp), %eax
@@ -91,7 +91,7 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; SSE3-NEXT: retl
;
; SSE41-LABEL: sext_i8:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE41-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm0
; SSE41-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm0
@@ -106,7 +106,7 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; SSE41-NEXT: retl
;
; AVX-32-LABEL: sext_i8:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-32-NEXT: vpinsrb $4, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $8, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -121,7 +121,7 @@ define <3 x i16> @sext_i8(<3 x i8>) {
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: sext_i8:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/pseudo_cmov_lower2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pseudo_cmov_lower2.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pseudo_cmov_lower2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pseudo_cmov_lower2.ll Mon Dec 4 09:18:51 2017
@@ -51,7 +51,7 @@ entry:
; CHECK-LABEL: foo3:
; CHECK: js
; CHECK-NOT: js
-; CHECK-LABEL: # BB#1:
+; CHECK-LABEL: # %bb.1:
; CHECK-DAG: movapd %xmm2, %xmm1
; CHECK-DAG: movapd %xmm2, %xmm0
; CHECK-LABEL:.LBB2_2:
@@ -81,7 +81,7 @@ entry:
; CHECK-LABEL: foo4:
; CHECK: js
; CHECK-NOT: js
-; CHECK-LABEL: # BB#1:
+; CHECK-LABEL: # %bb.1:
; CHECK-DAG: movapd %xmm2, %xmm1
; CHECK-DAG: movapd %xmm2, %xmm0
; CHECK-LABEL:.LBB3_2:
Modified: llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll (original)
+++ llvm/trunk/test/CodeGen/X86/pshufb-mask-comments.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define <16 x i8> @test1(<16 x i8> %V) {
; CHECK-LABEL: test1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,0,0,0,0,2,0,0,0,0,3,0,0,0,0,4]
; CHECK-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 0, i8 4>)
@@ -16,7 +16,7 @@ define <16 x i8> @test1(<16 x i8> %V) {
define <16 x i8> @test2(<16 x i8> %V) {
; CHECK-LABEL: test2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[15,0,0,0,0,0,0,0,0,0,1,0,0,0,0,2]
; CHECK-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 15, i8 0, i8 0, i8 0, i8 0, i8 16, i8 0, i8 0, i8 0, i8 0, i8 17, i8 0, i8 0, i8 0, i8 0, i8 50>)
@@ -27,7 +27,7 @@ define <16 x i8> @test2(<16 x i8> %V) {
define <16 x i8> @test3(<16 x i8> %V) {
; CHECK-LABEL: test3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,0,0,15,0,2,0,0],zero,xmm0[0,3,0,0],zero,xmm0[0,4]
; CHECK-NEXT: retq
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 127, i8 0, i8 2, i8 0, i8 0, i8 128, i8 0, i8 3, i8 0, i8 0, i8 255, i8 0, i8 4>)
@@ -38,7 +38,7 @@ define <16 x i8> @test3(<16 x i8> %V) {
define <16 x i8> @test4(<16 x i8> %V, <2 x i64>* %P) {
; CHECK-LABEL: test4:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movaps {{.*#+}} xmm1 = [1084818905618843912,506097522914230528]
; CHECK-NEXT: movaps %xmm1, (%rdi)
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
@@ -53,7 +53,7 @@ define <16 x i8> @test4(<16 x i8> %V, <2
define <16 x i8> @test5(<16 x i8> %V) {
; CHECK-LABEL: test5:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: movdqa %xmm1, (%rax)
@@ -74,7 +74,7 @@ define <16 x i8> @test5(<16 x i8> %V) {
define <16 x i8> @test6(<16 x i8> %V, <2 x i64>* %P) {
; CHECK-LABEL: test6:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movaps {{.*#+}} xmm1 = [217019414673948672,506380106026255364]
; CHECK-NEXT: movaps %xmm1, (%rdi)
; CHECK-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
Modified: llvm/trunk/test/CodeGen/X86/psubus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/psubus.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/psubus.ll (original)
+++ llvm/trunk/test/CodeGen/X86/psubus.ll Mon Dec 4 09:18:51 2017
@@ -8,17 +8,17 @@
define <8 x i16> @test1(<8 x i16> %x) nounwind {
; SSE-LABEL: test1:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: psubusw {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test1:
-; AVX: # BB#0: # %vector.ph
+; AVX: # %bb.0: # %vector.ph
; AVX-NEXT: vpsubusw {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test1:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusw {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: retq
vector.ph:
@@ -30,17 +30,17 @@ vector.ph:
define <8 x i16> @test2(<8 x i16> %x) nounwind {
; SSE-LABEL: test2:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: psubusw {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test2:
-; AVX: # BB#0: # %vector.ph
+; AVX: # %bb.0: # %vector.ph
; AVX-NEXT: vpsubusw {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test2:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusw {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: retq
vector.ph:
@@ -52,7 +52,7 @@ vector.ph:
define <8 x i16> @test3(<8 x i16> %x, i16 zeroext %w) nounwind {
; SSE-LABEL: test3:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: movd %edi, %xmm1
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
@@ -60,7 +60,7 @@ define <8 x i16> @test3(<8 x i16> %x, i1
; SSE-NEXT: retq
;
; AVX1-LABEL: test3:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vmovd %edi, %xmm1
; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
@@ -68,14 +68,14 @@ define <8 x i16> @test3(<8 x i16> %x, i1
; AVX1-NEXT: retq
;
; AVX2-LABEL: test3:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vmovd %edi, %xmm1
; AVX2-NEXT: vpbroadcastw %xmm1, %xmm1
; AVX2-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test3:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpbroadcastw %edi, %xmm1
; AVX512-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -90,17 +90,17 @@ vector.ph:
define <16 x i8> @test4(<16 x i8> %x) nounwind {
; SSE-LABEL: test4:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: psubusb {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test4:
-; AVX: # BB#0: # %vector.ph
+; AVX: # %bb.0: # %vector.ph
; AVX-NEXT: vpsubusb {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test4:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusb {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: retq
vector.ph:
@@ -112,17 +112,17 @@ vector.ph:
define <16 x i8> @test5(<16 x i8> %x) nounwind {
; SSE-LABEL: test5:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: psubusb {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: test5:
-; AVX: # BB#0: # %vector.ph
+; AVX: # %bb.0: # %vector.ph
; AVX-NEXT: vpsubusb {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: test5:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusb {{.*}}(%rip), %xmm0, %xmm0
; AVX512-NEXT: retq
vector.ph:
@@ -134,7 +134,7 @@ vector.ph:
define <16 x i8> @test6(<16 x i8> %x, i8 zeroext %w) nounwind {
; SSE2-LABEL: test6:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movd %edi, %xmm1
; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
@@ -143,7 +143,7 @@ define <16 x i8> @test6(<16 x i8> %x, i8
; SSE2-NEXT: retq
;
; SSSE3-LABEL: test6:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movd %edi, %xmm1
; SSSE3-NEXT: pxor %xmm2, %xmm2
; SSSE3-NEXT: pshufb %xmm2, %xmm1
@@ -151,7 +151,7 @@ define <16 x i8> @test6(<16 x i8> %x, i8
; SSSE3-NEXT: retq
;
; SSE41-LABEL: test6:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movd %edi, %xmm1
; SSE41-NEXT: pxor %xmm2, %xmm2
; SSE41-NEXT: pshufb %xmm2, %xmm1
@@ -159,7 +159,7 @@ define <16 x i8> @test6(<16 x i8> %x, i8
; SSE41-NEXT: retq
;
; AVX1-LABEL: test6:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vmovd %edi, %xmm1
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
@@ -167,14 +167,14 @@ define <16 x i8> @test6(<16 x i8> %x, i8
; AVX1-NEXT: retq
;
; AVX2-LABEL: test6:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vmovd %edi, %xmm1
; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
; AVX2-NEXT: vpsubusb %xmm1, %xmm0, %xmm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test6:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpbroadcastb %edi, %xmm1
; AVX512-NEXT: vpsubusb %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
@@ -189,14 +189,14 @@ vector.ph:
define <16 x i16> @test7(<16 x i16> %x) nounwind {
; SSE-LABEL: test7:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
; SSE-NEXT: psubusw %xmm2, %xmm0
; SSE-NEXT: psubusw %xmm2, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: test7:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtw %xmm1, %xmm2, %xmm1
@@ -207,12 +207,12 @@ define <16 x i16> @test7(<16 x i16> %x)
; AVX1-NEXT: retq
;
; AVX2-LABEL: test7:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusw {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test7:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusw {{.*}}(%rip), %ymm0, %ymm0
; AVX512-NEXT: retq
vector.ph:
@@ -224,14 +224,14 @@ vector.ph:
define <16 x i16> @test8(<16 x i16> %x) nounwind {
; SSE-LABEL: test8:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: movdqa {{.*#+}} xmm2 = [32767,32767,32767,32767,32767,32767,32767,32767]
; SSE-NEXT: psubusw %xmm2, %xmm0
; SSE-NEXT: psubusw %xmm2, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: test8:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm3
@@ -248,12 +248,12 @@ define <16 x i16> @test8(<16 x i16> %x)
; AVX1-NEXT: retq
;
; AVX2-LABEL: test8:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusw {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test8:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusw {{.*}}(%rip), %ymm0, %ymm0
; AVX512-NEXT: retq
vector.ph:
@@ -265,7 +265,7 @@ vector.ph:
define <16 x i16> @test9(<16 x i16> %x, i16 zeroext %w) nounwind {
; SSE-LABEL: test9:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: movd %edi, %xmm2
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,0,0,0,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,1,1]
@@ -274,7 +274,7 @@ define <16 x i16> @test9(<16 x i16> %x,
; SSE-NEXT: retq
;
; AVX1-LABEL: test9:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vmovd %edi, %xmm2
; AVX1-NEXT: vpshuflw {{.*#+}} xmm2 = xmm2[0,0,0,0,4,5,6,7]
@@ -291,14 +291,14 @@ define <16 x i16> @test9(<16 x i16> %x,
; AVX1-NEXT: retq
;
; AVX2-LABEL: test9:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vmovd %edi, %xmm1
; AVX2-NEXT: vpbroadcastw %xmm1, %ymm1
; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test9:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpbroadcastw %edi, %ymm1
; AVX512-NEXT: vpsubusw %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -313,14 +313,14 @@ vector.ph:
define <32 x i8> @test10(<32 x i8> %x) nounwind {
; SSE-LABEL: test10:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
; SSE-NEXT: psubusb %xmm2, %xmm0
; SSE-NEXT: psubusb %xmm2, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: test10:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm2, %xmm1
@@ -331,12 +331,12 @@ define <32 x i8> @test10(<32 x i8> %x) n
; AVX1-NEXT: retq
;
; AVX2-LABEL: test10:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusb {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test10:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusb {{.*}}(%rip), %ymm0, %ymm0
; AVX512-NEXT: retq
vector.ph:
@@ -348,14 +348,14 @@ vector.ph:
define <32 x i8> @test11(<32 x i8> %x) nounwind {
; SSE-LABEL: test11:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: movdqa {{.*#+}} xmm2 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127]
; SSE-NEXT: psubusb %xmm2, %xmm0
; SSE-NEXT: psubusb %xmm2, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: test11:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
; AVX1-NEXT: vpxor %xmm2, %xmm1, %xmm3
@@ -372,12 +372,12 @@ define <32 x i8> @test11(<32 x i8> %x) n
; AVX1-NEXT: retq
;
; AVX2-LABEL: test11:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusb {{.*}}(%rip), %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test11:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusb {{.*}}(%rip), %ymm0, %ymm0
; AVX512-NEXT: retq
vector.ph:
@@ -389,7 +389,7 @@ vector.ph:
define <32 x i8> @test12(<32 x i8> %x, i8 zeroext %w) nounwind {
; SSE2-LABEL: test12:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movd %edi, %xmm2
; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,0,0,0,4,5,6,7]
@@ -399,7 +399,7 @@ define <32 x i8> @test12(<32 x i8> %x, i
; SSE2-NEXT: retq
;
; SSSE3-LABEL: test12:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movd %edi, %xmm2
; SSSE3-NEXT: pxor %xmm3, %xmm3
; SSSE3-NEXT: pshufb %xmm3, %xmm2
@@ -408,7 +408,7 @@ define <32 x i8> @test12(<32 x i8> %x, i
; SSSE3-NEXT: retq
;
; SSE41-LABEL: test12:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movd %edi, %xmm2
; SSE41-NEXT: pxor %xmm3, %xmm3
; SSE41-NEXT: pshufb %xmm3, %xmm2
@@ -417,7 +417,7 @@ define <32 x i8> @test12(<32 x i8> %x, i
; SSE41-NEXT: retq
;
; AVX1-LABEL: test12:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vmovd %edi, %xmm1
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
@@ -434,14 +434,14 @@ define <32 x i8> @test12(<32 x i8> %x, i
; AVX1-NEXT: retq
;
; AVX2-LABEL: test12:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vmovd %edi, %xmm1
; AVX2-NEXT: vpbroadcastb %xmm1, %ymm1
; AVX2-NEXT: vpsubusb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: test12:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpbroadcastb %edi, %ymm1
; AVX512-NEXT: vpsubusb %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -456,7 +456,7 @@ vector.ph:
define <8 x i16> @test13(<8 x i16> %x, <8 x i32> %y) nounwind {
; SSE2-LABEL: test13:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
@@ -484,7 +484,7 @@ define <8 x i16> @test13(<8 x i16> %x, <
; SSE2-NEXT: retq
;
; SSSE3-LABEL: test13:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: pxor %xmm3, %xmm3
; SSSE3-NEXT: movdqa %xmm0, %xmm4
; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3]
@@ -511,7 +511,7 @@ define <8 x i16> @test13(<8 x i16> %x, <
; SSSE3-NEXT: retq
;
; SSE41-LABEL: test13:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
@@ -536,7 +536,7 @@ define <8 x i16> @test13(<8 x i16> %x, <
; SSE41-NEXT: retq
;
; AVX1-LABEL: test13:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
@@ -560,7 +560,7 @@ define <8 x i16> @test13(<8 x i16> %x, <
; AVX1-NEXT: retq
;
; AVX2-LABEL: test13:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648]
; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3
@@ -576,7 +576,7 @@ define <8 x i16> @test13(<8 x i16> %x, <
; AVX2-NEXT: retq
;
; AVX512-LABEL: test13:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512-NEXT: vpcmpnltud %ymm1, %ymm0, %k1
; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0
@@ -594,7 +594,7 @@ vector.ph:
define <16 x i8> @test14(<16 x i8> %x, <16 x i32> %y) nounwind {
; SSE2-LABEL: test14:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa %xmm0, %xmm5
; SSE2-NEXT: pxor %xmm0, %xmm0
; SSE2-NEXT: movdqa %xmm5, %xmm6
@@ -646,7 +646,7 @@ define <16 x i8> @test14(<16 x i8> %x, <
; SSE2-NEXT: retq
;
; SSSE3-LABEL: test14:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa %xmm0, %xmm5
; SSSE3-NEXT: pxor %xmm0, %xmm0
; SSSE3-NEXT: movdqa %xmm5, %xmm7
@@ -700,7 +700,7 @@ define <16 x i8> @test14(<16 x i8> %x, <
; SSSE3-NEXT: retq
;
; SSE41-LABEL: test14:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movdqa %xmm0, %xmm5
; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm5[1,1,2,3]
; SSE41-NEXT: pmovzxbd {{.*#+}} xmm8 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
@@ -751,7 +751,7 @@ define <16 x i8> @test14(<16 x i8> %x, <
; SSE41-NEXT: retq
;
; AVX1-LABEL: test14:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,2,3]
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm8 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm9 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
@@ -794,7 +794,7 @@ define <16 x i8> @test14(<16 x i8> %x, <
; AVX1-NEXT: retq
;
; AVX2-LABEL: test14:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
@@ -826,7 +826,7 @@ define <16 x i8> @test14(<16 x i8> %x, <
; AVX2-NEXT: retq
;
; AVX512-LABEL: test14:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
; AVX512-NEXT: vpcmpnltud %zmm0, %zmm1, %k1
; AVX512-NEXT: vpsubd %zmm0, %zmm1, %zmm0
@@ -844,7 +844,7 @@ vector.ph:
define <8 x i16> @test15(<8 x i16> %x, <8 x i32> %y) nounwind {
; SSE2-LABEL: test15:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3]
@@ -870,7 +870,7 @@ define <8 x i16> @test15(<8 x i16> %x, <
; SSE2-NEXT: retq
;
; SSSE3-LABEL: test15:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: pxor %xmm4, %xmm4
; SSSE3-NEXT: movdqa %xmm0, %xmm3
; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
@@ -896,7 +896,7 @@ define <8 x i16> @test15(<8 x i16> %x, <
; SSSE3-NEXT: retq
;
; SSE41-LABEL: test15:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
@@ -920,7 +920,7 @@ define <8 x i16> @test15(<8 x i16> %x, <
; SSE41-NEXT: retq
;
; AVX1-LABEL: test15:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
@@ -944,7 +944,7 @@ define <8 x i16> @test15(<8 x i16> %x, <
; AVX1-NEXT: retq
;
; AVX2-LABEL: test15:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648]
; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3
@@ -960,7 +960,7 @@ define <8 x i16> @test15(<8 x i16> %x, <
; AVX2-NEXT: retq
;
; AVX512-LABEL: test15:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512-NEXT: vpcmpnleud %ymm1, %ymm0, %k1
; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0
@@ -978,7 +978,7 @@ vector.ph:
define <8 x i16> @test16(<8 x i16> %x, <8 x i32> %y) nounwind {
; SSE2-LABEL: test16:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3]
@@ -1004,7 +1004,7 @@ define <8 x i16> @test16(<8 x i16> %x, <
; SSE2-NEXT: retq
;
; SSSE3-LABEL: test16:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: pxor %xmm4, %xmm4
; SSSE3-NEXT: movdqa %xmm0, %xmm3
; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
@@ -1030,7 +1030,7 @@ define <8 x i16> @test16(<8 x i16> %x, <
; SSSE3-NEXT: retq
;
; SSE41-LABEL: test16:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
@@ -1054,7 +1054,7 @@ define <8 x i16> @test16(<8 x i16> %x, <
; SSE41-NEXT: retq
;
; AVX1-LABEL: test16:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1]
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
@@ -1078,7 +1078,7 @@ define <8 x i16> @test16(<8 x i16> %x, <
; AVX1-NEXT: retq
;
; AVX2-LABEL: test16:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648,2147483648]
; AVX2-NEXT: vpxor %ymm2, %ymm1, %ymm3
@@ -1094,7 +1094,7 @@ define <8 x i16> @test16(<8 x i16> %x, <
; AVX2-NEXT: retq
;
; AVX512-LABEL: test16:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; AVX512-NEXT: vpcmpltud %ymm0, %ymm1, %k1
; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0
@@ -1112,7 +1112,7 @@ vector.ph:
define <8 x i16> @psubus_8i16_max(<8 x i16> %x, <8 x i16> %y) nounwind {
; SSE2-LABEL: psubus_8i16_max:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pxor %xmm2, %xmm3
@@ -1127,7 +1127,7 @@ define <8 x i16> @psubus_8i16_max(<8 x i
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_8i16_max:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
; SSSE3-NEXT: movdqa %xmm0, %xmm3
; SSSE3-NEXT: pxor %xmm2, %xmm3
@@ -1142,17 +1142,17 @@ define <8 x i16> @psubus_8i16_max(<8 x i
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_8i16_max:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: psubusw %xmm1, %xmm0
; SSE41-NEXT: retq
;
; AVX-LABEL: psubus_8i16_max:
-; AVX: # BB#0: # %vector.ph
+; AVX: # %bb.0: # %vector.ph
; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: psubus_8i16_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
vector.ph:
@@ -1164,17 +1164,17 @@ vector.ph:
define <16 x i8> @psubus_16i8_max(<16 x i8> %x, <16 x i8> %y) nounwind {
; SSE-LABEL: psubus_16i8_max:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: psubusb %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: psubus_16i8_max:
-; AVX: # BB#0: # %vector.ph
+; AVX: # %bb.0: # %vector.ph
; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
;
; AVX512-LABEL: psubus_16i8_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusb %xmm1, %xmm0, %xmm0
; AVX512-NEXT: retq
vector.ph:
@@ -1186,7 +1186,7 @@ vector.ph:
define <16 x i16> @psubus_16i16_max(<16 x i16> %x, <16 x i16> %y) nounwind {
; SSE2-LABEL: psubus_16i16_max:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [32768,32768,32768,32768,32768,32768,32768,32768]
; SSE2-NEXT: movdqa %xmm0, %xmm6
; SSE2-NEXT: pxor %xmm4, %xmm6
@@ -1212,7 +1212,7 @@ define <16 x i16> @psubus_16i16_max(<16
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_16i16_max:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [32768,32768,32768,32768,32768,32768,32768,32768]
; SSSE3-NEXT: movdqa %xmm0, %xmm6
; SSSE3-NEXT: pxor %xmm4, %xmm6
@@ -1238,13 +1238,13 @@ define <16 x i16> @psubus_16i16_max(<16
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_16i16_max:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: psubusw %xmm2, %xmm0
; SSE41-NEXT: psubusw %xmm3, %xmm1
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_16i16_max:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpsubusw %xmm2, %xmm3, %xmm2
@@ -1253,12 +1253,12 @@ define <16 x i16> @psubus_16i16_max(<16
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_16i16_max:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_16i16_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusw %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
vector.ph:
@@ -1270,7 +1270,7 @@ vector.ph:
define <32 x i16> @psubus_32i16_max(<32 x i16> %x, <32 x i16> %y) nounwind {
; SSE2-LABEL: psubus_32i16_max:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa %xmm3, %xmm11
; SSE2-NEXT: movdqa %xmm2, %xmm10
; SSE2-NEXT: movdqa %xmm1, %xmm9
@@ -1318,7 +1318,7 @@ define <32 x i16> @psubus_32i16_max(<32
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_32i16_max:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa %xmm3, %xmm11
; SSSE3-NEXT: movdqa %xmm2, %xmm10
; SSSE3-NEXT: movdqa %xmm1, %xmm9
@@ -1366,7 +1366,7 @@ define <32 x i16> @psubus_32i16_max(<32
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_32i16_max:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: psubusw %xmm4, %xmm0
; SSE41-NEXT: psubusw %xmm5, %xmm1
; SSE41-NEXT: psubusw %xmm6, %xmm2
@@ -1374,7 +1374,7 @@ define <32 x i16> @psubus_32i16_max(<32
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_32i16_max:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
; AVX1-NEXT: vpsubusw %xmm4, %xmm5, %xmm4
@@ -1388,13 +1388,13 @@ define <32 x i16> @psubus_32i16_max(<32
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_32i16_max:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusw %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpsubusw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_32i16_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusw %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retq
vector.ph:
@@ -1406,7 +1406,7 @@ vector.ph:
define <64 x i8> @psubus_64i8_max(<64 x i8> %x, <64 x i8> %y) nounwind {
; SSE-LABEL: psubus_64i8_max:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: psubusb %xmm4, %xmm0
; SSE-NEXT: psubusb %xmm5, %xmm1
; SSE-NEXT: psubusb %xmm6, %xmm2
@@ -1414,7 +1414,7 @@ define <64 x i8> @psubus_64i8_max(<64 x
; SSE-NEXT: retq
;
; AVX1-LABEL: psubus_64i8_max:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
; AVX1-NEXT: vpsubusb %xmm4, %xmm5, %xmm4
@@ -1428,13 +1428,13 @@ define <64 x i8> @psubus_64i8_max(<64 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_64i8_max:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusb %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpsubusb %ymm3, %ymm1, %ymm1
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_64i8_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusb %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retq
vector.ph:
@@ -1446,13 +1446,13 @@ vector.ph:
define <32 x i8> @psubus_32i8_max(<32 x i8> %x, <32 x i8> %y) nounwind {
; SSE-LABEL: psubus_32i8_max:
-; SSE: # BB#0: # %vector.ph
+; SSE: # %bb.0: # %vector.ph
; SSE-NEXT: psubusb %xmm2, %xmm0
; SSE-NEXT: psubusb %xmm3, %xmm1
; SSE-NEXT: retq
;
; AVX1-LABEL: psubus_32i8_max:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpsubusb %xmm2, %xmm3, %xmm2
@@ -1461,12 +1461,12 @@ define <32 x i8> @psubus_32i8_max(<32 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_32i8_max:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpsubusb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_32i8_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpsubusb %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
vector.ph:
@@ -1478,7 +1478,7 @@ vector.ph:
define <8 x i16> @psubus_8i32_max(<8 x i16> %x, <8 x i32> %y) nounwind {
; SSE2-LABEL: psubus_8i32_max:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pxor %xmm0, %xmm0
; SSE2-NEXT: movdqa %xmm3, %xmm4
@@ -1512,7 +1512,7 @@ define <8 x i16> @psubus_8i32_max(<8 x i
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_8i32_max:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa %xmm0, %xmm3
; SSSE3-NEXT: pxor %xmm0, %xmm0
; SSSE3-NEXT: movdqa %xmm3, %xmm4
@@ -1545,7 +1545,7 @@ define <8 x i16> @psubus_8i32_max(<8 x i
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_8i32_max:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [65535,65535,65535,65535]
; SSE41-NEXT: pminud %xmm3, %xmm2
; SSE41-NEXT: pminud %xmm3, %xmm1
@@ -1554,7 +1554,7 @@ define <8 x i16> @psubus_8i32_max(<8 x i
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_8i32_max:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [65535,65535,65535,65535]
; AVX1-NEXT: vpminud %xmm3, %xmm2, %xmm2
@@ -1565,7 +1565,7 @@ define <8 x i16> @psubus_8i32_max(<8 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_8i32_max:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [65535,65535,65535,65535,65535,65535,65535,65535]
; AVX2-NEXT: vpminud %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
@@ -1575,7 +1575,7 @@ define <8 x i16> @psubus_8i32_max(<8 x i
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_8i32_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovusdw %ymm1, %xmm1
; AVX512-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -1591,7 +1591,7 @@ vector.ph:
define <8 x i16> @psubus_8i64_max(<8 x i16> %x, <8 x i64> %y) nounwind {
; SSE2-LABEL: psubus_8i64_max:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: pxor %xmm5, %xmm5
; SSE2-NEXT: movdqa %xmm0, %xmm10
; SSE2-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm5[0],xmm10[1],xmm5[1],xmm10[2],xmm5[2],xmm10[3],xmm5[3]
@@ -1684,7 +1684,7 @@ define <8 x i16> @psubus_8i64_max(<8 x i
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_8i64_max:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: pxor %xmm5, %xmm5
; SSSE3-NEXT: movdqa %xmm0, %xmm10
; SSSE3-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm5[0],xmm10[1],xmm5[1],xmm10[2],xmm5[2],xmm10[3],xmm5[3]
@@ -1777,7 +1777,7 @@ define <8 x i16> @psubus_8i64_max(<8 x i
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_8i64_max:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm0[3,1,2,3]
; SSE41-NEXT: pmovzxwq {{.*#+}} xmm11 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero
; SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm0[2,3,0,1]
@@ -1856,7 +1856,7 @@ define <8 x i16> @psubus_8i64_max(<8 x i
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_8i64_max:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[2,3,0,1]
; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero
; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[3,1,2,3]
@@ -1903,7 +1903,7 @@ define <8 x i16> @psubus_8i64_max(<8 x i
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_8i64_max:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpmovzxwq {{.*#+}} ymm3 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; AVX2-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
@@ -1930,7 +1930,7 @@ define <8 x i16> @psubus_8i64_max(<8 x i
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_8i64_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovusqw %zmm1, %xmm1
; AVX512-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -1946,7 +1946,7 @@ vector.ph:
define <16 x i16> @psubus_16i32_max(<16 x i16> %x, <16 x i32> %y) nounwind {
; SSE2-LABEL: psubus_16i32_max:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa %xmm1, %xmm8
; SSE2-NEXT: movdqa %xmm0, %xmm9
; SSE2-NEXT: pxor %xmm0, %xmm0
@@ -2009,7 +2009,7 @@ define <16 x i16> @psubus_16i32_max(<16
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_16i32_max:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa %xmm1, %xmm8
; SSSE3-NEXT: movdqa %xmm0, %xmm9
; SSSE3-NEXT: pxor %xmm0, %xmm0
@@ -2072,7 +2072,7 @@ define <16 x i16> @psubus_16i32_max(<16
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_16i32_max:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: pshufd {{.*#+}} xmm6 = xmm1[2,3,0,1]
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm6 = xmm6[0],zero,xmm6[1],zero,xmm6[2],zero,xmm6[3],zero
; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
@@ -2097,7 +2097,7 @@ define <16 x i16> @psubus_16i32_max(<16
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_16i32_max:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [65535,65535,65535,65535]
; AVX1-NEXT: vpminud %xmm4, %xmm3, %xmm3
@@ -2121,7 +2121,7 @@ define <16 x i16> @psubus_16i32_max(<16
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_16i32_max:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [65535,65535,65535,65535,65535,65535,65535,65535]
; AVX2-NEXT: vpminud %ymm3, %ymm1, %ymm1
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm4
@@ -2142,7 +2142,7 @@ define <16 x i16> @psubus_16i32_max(<16
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_16i32_max:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovusdw %zmm1, %ymm1
; AVX512-NEXT: vpsubusw %ymm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -2157,7 +2157,7 @@ vector.ph:
define <8 x i16> @psubus_i16_i32_max_swapped(<8 x i16> %x, <8 x i32> %y) nounwind {
; SSE2-LABEL: psubus_i16_i32_max_swapped:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: pxor %xmm0, %xmm0
; SSE2-NEXT: movdqa %xmm3, %xmm5
@@ -2189,7 +2189,7 @@ define <8 x i16> @psubus_i16_i32_max_swa
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_i16_i32_max_swapped:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa %xmm0, %xmm3
; SSSE3-NEXT: pxor %xmm0, %xmm0
; SSSE3-NEXT: movdqa %xmm3, %xmm5
@@ -2220,7 +2220,7 @@ define <8 x i16> @psubus_i16_i32_max_swa
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_i16_i32_max_swapped:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [65535,65535,65535,65535]
; SSE41-NEXT: pminud %xmm3, %xmm2
; SSE41-NEXT: pminud %xmm3, %xmm1
@@ -2229,7 +2229,7 @@ define <8 x i16> @psubus_i16_i32_max_swa
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_i16_i32_max_swapped:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [65535,65535,65535,65535]
; AVX1-NEXT: vpminud %xmm3, %xmm2, %xmm2
@@ -2240,7 +2240,7 @@ define <8 x i16> @psubus_i16_i32_max_swa
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_i16_i32_max_swapped:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [65535,65535,65535,65535,65535,65535,65535,65535]
; AVX2-NEXT: vpminud %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
@@ -2250,7 +2250,7 @@ define <8 x i16> @psubus_i16_i32_max_swa
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_i16_i32_max_swapped:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovusdw %ymm1, %xmm1
; AVX512-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
@@ -2266,7 +2266,7 @@ vector.ph:
define <8 x i16> @psubus_i16_i32_min(<8 x i16> %x, <8 x i32> %y) nounwind {
; SSE2-LABEL: psubus_i16_i32_min:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: pxor %xmm4, %xmm4
; SSE2-NEXT: movdqa %xmm0, %xmm3
; SSE2-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
@@ -2299,7 +2299,7 @@ define <8 x i16> @psubus_i16_i32_min(<8
; SSE2-NEXT: retq
;
; SSSE3-LABEL: psubus_i16_i32_min:
-; SSSE3: # BB#0: # %vector.ph
+; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: pxor %xmm4, %xmm4
; SSSE3-NEXT: movdqa %xmm0, %xmm3
; SSSE3-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
@@ -2331,7 +2331,7 @@ define <8 x i16> @psubus_i16_i32_min(<8
; SSSE3-NEXT: retq
;
; SSE41-LABEL: psubus_i16_i32_min:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [65535,65535,65535,65535]
; SSE41-NEXT: pminud %xmm3, %xmm2
; SSE41-NEXT: pminud %xmm3, %xmm1
@@ -2340,7 +2340,7 @@ define <8 x i16> @psubus_i16_i32_min(<8
; SSE41-NEXT: retq
;
; AVX1-LABEL: psubus_i16_i32_min:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [65535,65535,65535,65535]
; AVX1-NEXT: vpminud %xmm3, %xmm2, %xmm2
@@ -2351,7 +2351,7 @@ define <8 x i16> @psubus_i16_i32_min(<8
; AVX1-NEXT: retq
;
; AVX2-LABEL: psubus_i16_i32_min:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [65535,65535,65535,65535,65535,65535,65535,65535]
; AVX2-NEXT: vpminud %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
@@ -2361,7 +2361,7 @@ define <8 x i16> @psubus_i16_i32_min(<8
; AVX2-NEXT: retq
;
; AVX512-LABEL: psubus_i16_i32_min:
-; AVX512: # BB#0: # %vector.ph
+; AVX512: # %bb.0: # %vector.ph
; AVX512-NEXT: vpmovusdw %ymm1, %xmm1
; AVX512-NEXT: vpsubusw %xmm1, %xmm0, %xmm0
; AVX512-NEXT: vzeroupper
Modified: llvm/trunk/test/CodeGen/X86/rdrand-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdrand-x86_64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdrand-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdrand-x86_64.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@ declare {i64, i32} @llvm.x86.rdrand.64()
define i32 @_rdrand64_step(i64* %random_val) {
; CHECK-LABEL: _rdrand64_step:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: rdrandq %rcx
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: cmovael %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/rdrand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdrand.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdrand.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdrand.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ declare {i32, i32} @llvm.x86.rdrand.32()
define i32 @_rdrand16_step(i16* %random_val) {
; X86-LABEL: _rdrand16_step:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: rdrandw %ax
; X86-NEXT: movzwl %ax, %edx
@@ -17,7 +17,7 @@ define i32 @_rdrand16_step(i16* %random_
; X86-NEXT: retl
;
; X64-LABEL: _rdrand16_step:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rdrandw %ax
; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: movl $1, %eax
@@ -33,7 +33,7 @@ define i32 @_rdrand16_step(i16* %random_
define i32 @_rdrand32_step(i32* %random_val) {
; X86-LABEL: _rdrand32_step:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: rdrandl %edx
; X86-NEXT: movl $1, %eax
@@ -42,7 +42,7 @@ define i32 @_rdrand32_step(i32* %random_
; X86-NEXT: retl
;
; X64-LABEL: _rdrand32_step:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rdrandl %ecx
; X64-NEXT: movl $1, %eax
; X64-NEXT: cmovael %ecx, %eax
@@ -58,14 +58,14 @@ define i32 @_rdrand32_step(i32* %random_
; Check that MachineCSE doesn't eliminate duplicate rdrand instructions.
define i32 @CSE() nounwind {
; X86-LABEL: CSE:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: rdrandl %ecx
; X86-NEXT: rdrandl %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: retl
;
; X64-LABEL: CSE:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rdrandl %ecx
; X64-NEXT: rdrandl %eax
; X64-NEXT: addl %ecx, %eax
@@ -81,11 +81,11 @@ define i32 @CSE() nounwind {
; Check that MachineLICM doesn't hoist rdrand instructions.
define void @loop(i32* %p, i32 %n) nounwind {
; X86-LABEL: loop:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: testl %eax, %eax
; X86-NEXT: je .LBB3_3
-; X86-NEXT: # BB#1: # %while.body.preheader
+; X86-NEXT: # %bb.1: # %while.body.preheader
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: .p2align 4, 0x90
; X86-NEXT: .LBB3_2: # %while.body
@@ -99,7 +99,7 @@ define void @loop(i32* %p, i32 %n) nounw
; X86-NEXT: retl
;
; X64-LABEL: loop:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: testl %esi, %esi
; X64-NEXT: je .LBB3_2
; X64-NEXT: .p2align 4, 0x90
Modified: llvm/trunk/test/CodeGen/X86/rdseed-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdseed-x86_64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdseed-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdseed-x86_64.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@ declare {i64, i32} @llvm.x86.rdseed.64()
define i32 @_rdseed64_step(i64* %random_val) {
; CHECK-LABEL: _rdseed64_step:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: rdseedq %rcx
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: cmovael %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/rdseed.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rdseed.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rdseed.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rdseed.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@ declare {i32, i32} @llvm.x86.rdseed.32()
define i32 @_rdseed16_step(i16* %random_val) {
; X86-LABEL: _rdseed16_step:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: rdseedw %ax
; X86-NEXT: movzwl %ax, %edx
@@ -17,7 +17,7 @@ define i32 @_rdseed16_step(i16* %random_
; X86-NEXT: retl
;
; X64-LABEL: _rdseed16_step:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rdseedw %ax
; X64-NEXT: movzwl %ax, %ecx
; X64-NEXT: movl $1, %eax
@@ -33,7 +33,7 @@ define i32 @_rdseed16_step(i16* %random_
define i32 @_rdseed32_step(i32* %random_val) {
; X86-LABEL: _rdseed32_step:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: rdseedl %edx
; X86-NEXT: movl $1, %eax
@@ -42,7 +42,7 @@ define i32 @_rdseed32_step(i32* %random_
; X86-NEXT: retl
;
; X64-LABEL: _rdseed32_step:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rdseedl %ecx
; X64-NEXT: movl $1, %eax
; X64-NEXT: cmovael %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/recip-fastmath.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/recip-fastmath.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/recip-fastmath.ll (original)
+++ llvm/trunk/test/CodeGen/X86/recip-fastmath.ll Mon Dec 4 09:18:51 2017
@@ -19,56 +19,56 @@
define float @f32_no_estimate(float %x) #0 {
; SSE-LABEL: f32_no_estimate:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE-NEXT: divss %xmm0, %xmm1
; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: f32_no_estimate:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; AVX-RECIP-NEXT: vdivss %xmm0, %xmm1, %xmm0
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: f32_no_estimate:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; FMA-RECIP-NEXT: vdivss %xmm0, %xmm1, %xmm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: f32_no_estimate:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:1.00]
; BTVER2-NEXT: vdivss %xmm0, %xmm1, %xmm0 # sched: [19:19.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: f32_no_estimate:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [6:0.50]
; SANDY-NEXT: vdivss %xmm0, %xmm1, %xmm0 # sched: [14:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: f32_no_estimate:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [1:0.50]
; HASWELL-NEXT: vdivss %xmm0, %xmm1, %xmm0 # sched: [13:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: f32_no_estimate:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; HASWELL-NO-FMA-NEXT: vdivss %xmm0, %xmm1, %xmm0
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: f32_no_estimate:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [1:0.50]
; KNL-NEXT: vdivss %xmm0, %xmm1, %xmm0 # sched: [13:1.00]
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: f32_no_estimate:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50]
; SKX-NEXT: vdivss %xmm0, %xmm1, %xmm0 # sched: [11:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
@@ -78,7 +78,7 @@ define float @f32_no_estimate(float %x)
define float @f32_one_step(float %x) #1 {
; SSE-LABEL: f32_one_step:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpss %xmm0, %xmm2
; SSE-NEXT: mulss %xmm2, %xmm0
; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
@@ -89,7 +89,7 @@ define float @f32_one_step(float %x) #1
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: f32_one_step:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm0
; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
@@ -99,14 +99,14 @@ define float @f32_one_step(float %x) #1
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: f32_one_step:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; FMA-RECIP-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0
; FMA-RECIP-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: f32_one_step:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:1.00]
; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
@@ -116,7 +116,7 @@ define float @f32_one_step(float %x) #1
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: f32_one_step:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
; SANDY-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [6:0.50]
@@ -126,14 +126,14 @@ define float @f32_one_step(float %x) #1
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: f32_one_step:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [5:0.50]
; HASWELL-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [5:0.50]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: f32_one_step:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0
; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
@@ -143,14 +143,14 @@ define float @f32_one_step(float %x) #1
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: f32_one_step:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [5:0.50]
; KNL-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [5:0.50]
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: f32_one_step:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [9:0.50]
; SKX-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [4:0.33]
@@ -161,7 +161,7 @@ define float @f32_one_step(float %x) #1
define float @f32_two_step(float %x) #2 {
; SSE-LABEL: f32_two_step:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpss %xmm0, %xmm2
; SSE-NEXT: movaps %xmm0, %xmm3
; SSE-NEXT: mulss %xmm2, %xmm3
@@ -178,7 +178,7 @@ define float @f32_two_step(float %x) #2
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: f32_two_step:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm2
; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
@@ -192,7 +192,7 @@ define float @f32_two_step(float %x) #2
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: f32_two_step:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; FMA-RECIP-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3
@@ -203,7 +203,7 @@ define float @f32_two_step(float %x) #2
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: f32_two_step:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero sched: [5:1.00]
; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm2 # sched: [2:1.00]
@@ -217,7 +217,7 @@ define float @f32_two_step(float %x) #2
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: f32_two_step:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm2 # sched: [5:1.00]
; SANDY-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero sched: [6:0.50]
@@ -231,7 +231,7 @@ define float @f32_two_step(float %x) #2
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: f32_two_step:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [1:0.50]
; HASWELL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -242,7 +242,7 @@ define float @f32_two_step(float %x) #2
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: f32_two_step:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm2
; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
@@ -256,7 +256,7 @@ define float @f32_two_step(float %x) #2
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: f32_two_step:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [1:0.50]
; KNL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -267,7 +267,7 @@ define float @f32_two_step(float %x) #2
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: f32_two_step:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:0.50]
; SKX-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -282,56 +282,56 @@ define float @f32_two_step(float %x) #2
define <4 x float> @v4f32_no_estimate(<4 x float> %x) #0 {
; SSE-LABEL: v4f32_no_estimate:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; SSE-NEXT: divps %xmm0, %xmm1
; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v4f32_no_estimate:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; AVX-RECIP-NEXT: vdivps %xmm0, %xmm1, %xmm0
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v4f32_no_estimate:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; FMA-RECIP-NEXT: vdivps %xmm0, %xmm1, %xmm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v4f32_no_estimate:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [19:19.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v4f32_no_estimate:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vmovaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
; SANDY-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [14:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v4f32_no_estimate:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [13:1.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v4f32_no_estimate:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1]
; HASWELL-NO-FMA-NEXT: vdivps %xmm0, %xmm1, %xmm0
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: v4f32_no_estimate:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [13:1.00]
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v4f32_no_estimate:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1] sched: [6:0.50]
; SKX-NEXT: vdivps %xmm0, %xmm1, %xmm0 # sched: [11:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
@@ -341,7 +341,7 @@ define <4 x float> @v4f32_no_estimate(<4
define <4 x float> @v4f32_one_step(<4 x float> %x) #1 {
; SSE-LABEL: v4f32_one_step:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm2
; SSE-NEXT: mulps %xmm2, %xmm0
; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -352,7 +352,7 @@ define <4 x float> @v4f32_one_step(<4 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v4f32_one_step:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0
; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -362,14 +362,14 @@ define <4 x float> @v4f32_one_step(<4 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v4f32_one_step:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1
; FMA-RECIP-NEXT: vfnmadd213ps {{.*}}(%rip), %xmm1, %xmm0
; FMA-RECIP-NEXT: vfmadd132ps %xmm1, %xmm1, %xmm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v4f32_one_step:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
@@ -379,7 +379,7 @@ define <4 x float> @v4f32_one_step(<4 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v4f32_one_step:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
@@ -389,7 +389,7 @@ define <4 x float> @v4f32_one_step(<4 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v4f32_one_step:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0 # sched: [5:0.50]
@@ -397,7 +397,7 @@ define <4 x float> @v4f32_one_step(<4 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v4f32_one_step:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1
; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1]
@@ -407,7 +407,7 @@ define <4 x float> @v4f32_one_step(<4 x
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: v4f32_one_step:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0 # sched: [5:0.50]
@@ -415,7 +415,7 @@ define <4 x float> @v4f32_one_step(<4 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v4f32_one_step:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ps {{.*}}(%rip){1to4}, %xmm1, %xmm0 # sched: [10:0.50]
; SKX-NEXT: vfmadd132ps %xmm1, %xmm1, %xmm0 # sched: [4:0.33]
@@ -426,7 +426,7 @@ define <4 x float> @v4f32_one_step(<4 x
define <4 x float> @v4f32_two_step(<4 x float> %x) #2 {
; SSE-LABEL: v4f32_two_step:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm2
; SSE-NEXT: movaps %xmm0, %xmm3
; SSE-NEXT: mulps %xmm2, %xmm3
@@ -443,7 +443,7 @@ define <4 x float> @v4f32_two_step(<4 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v4f32_two_step:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm2
; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -457,7 +457,7 @@ define <4 x float> @v4f32_two_step(<4 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v4f32_two_step:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1
; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3
@@ -468,7 +468,7 @@ define <4 x float> @v4f32_two_step(<4 x
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v4f32_two_step:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [2:1.00]
@@ -482,7 +482,7 @@ define <4 x float> @v4f32_two_step(<4 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v4f32_two_step:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
@@ -496,7 +496,7 @@ define <4 x float> @v4f32_two_step(<4 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v4f32_two_step:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -507,7 +507,7 @@ define <4 x float> @v4f32_two_step(<4 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v4f32_two_step:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1
; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm2
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1]
@@ -521,7 +521,7 @@ define <4 x float> @v4f32_two_step(<4 x
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: v4f32_two_step:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -532,7 +532,7 @@ define <4 x float> @v4f32_two_step(<4 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v4f32_two_step:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50]
; SKX-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -547,7 +547,7 @@ define <4 x float> @v4f32_two_step(<4 x
define <8 x float> @v8f32_no_estimate(<8 x float> %x) #0 {
; SSE-LABEL: v8f32_no_estimate:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; SSE-NEXT: movaps %xmm2, %xmm3
; SSE-NEXT: divps %xmm0, %xmm3
@@ -557,49 +557,49 @@ define <8 x float> @v8f32_no_estimate(<8
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_no_estimate:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; AVX-RECIP-NEXT: vdivps %ymm0, %ymm1, %ymm0
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_no_estimate:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; FMA-RECIP-NEXT: vdivps %ymm0, %ymm1, %ymm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_no_estimate:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [38:38.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_no_estimate:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vmovaps {{.*#+}} ymm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
; SANDY-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [29:2.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_no_estimate:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [21:2.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_no_estimate:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1]
; HASWELL-NO-FMA-NEXT: vdivps %ymm0, %ymm1, %ymm0
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: v8f32_no_estimate:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [21:2.00]
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_no_estimate:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vbroadcastss {{.*#+}} ymm1 = [1,1,1,1,1,1,1,1] sched: [7:0.50]
; SKX-NEXT: vdivps %ymm0, %ymm1, %ymm0 # sched: [11:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
@@ -609,7 +609,7 @@ define <8 x float> @v8f32_no_estimate(<8
define <8 x float> @v8f32_one_step(<8 x float> %x) #1 {
; SSE-LABEL: v8f32_one_step:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm4
; SSE-NEXT: mulps %xmm4, %xmm0
; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -627,7 +627,7 @@ define <8 x float> @v8f32_one_step(<8 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_one_step:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1
; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0
; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -637,14 +637,14 @@ define <8 x float> @v8f32_one_step(<8 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_one_step:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1
; FMA-RECIP-NEXT: vfnmadd213ps {{.*}}(%rip), %ymm1, %ymm0
; FMA-RECIP-NEXT: vfmadd132ps %ymm1, %ymm1, %ymm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_one_step:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00]
; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [2:2.00]
@@ -654,7 +654,7 @@ define <8 x float> @v8f32_one_step(<8 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_one_step:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
@@ -664,7 +664,7 @@ define <8 x float> @v8f32_one_step(<8 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_one_step:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0 # sched: [5:0.50]
@@ -672,7 +672,7 @@ define <8 x float> @v8f32_one_step(<8 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_one_step:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1
; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1]
@@ -682,7 +682,7 @@ define <8 x float> @v8f32_one_step(<8 x
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: v8f32_one_step:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0 # sched: [5:0.50]
@@ -690,7 +690,7 @@ define <8 x float> @v8f32_one_step(<8 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_one_step:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %ymm0, %ymm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ps {{.*}}(%rip){1to8}, %ymm1, %ymm0 # sched: [11:0.50]
; SKX-NEXT: vfmadd132ps %ymm1, %ymm1, %ymm0 # sched: [4:0.33]
@@ -701,7 +701,7 @@ define <8 x float> @v8f32_one_step(<8 x
define <8 x float> @v8f32_two_step(<8 x float> %x) #2 {
; SSE-LABEL: v8f32_two_step:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movaps %xmm1, %xmm2
; SSE-NEXT: rcpps %xmm0, %xmm3
; SSE-NEXT: movaps %xmm0, %xmm4
@@ -731,7 +731,7 @@ define <8 x float> @v8f32_two_step(<8 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_two_step:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1
; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm2
; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -745,7 +745,7 @@ define <8 x float> @v8f32_two_step(<8 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_two_step:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1
; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; FMA-RECIP-NEXT: vmovaps %ymm1, %ymm3
@@ -756,7 +756,7 @@ define <8 x float> @v8f32_two_step(<8 x
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_two_step:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00]
; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [2:2.00]
@@ -770,7 +770,7 @@ define <8 x float> @v8f32_two_step(<8 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_two_step:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
@@ -784,7 +784,7 @@ define <8 x float> @v8f32_two_step(<8 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_two_step:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00]
@@ -795,7 +795,7 @@ define <8 x float> @v8f32_two_step(<8 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_two_step:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1
; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm2
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1]
@@ -809,7 +809,7 @@ define <8 x float> @v8f32_two_step(<8 x
; HASWELL-NO-FMA-NEXT: retq
;
; KNL-LABEL: v8f32_two_step:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00]
@@ -820,7 +820,7 @@ define <8 x float> @v8f32_two_step(<8 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_two_step:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %ymm0, %ymm1 # sched: [4:1.00]
; SKX-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50]
; SKX-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00]
Modified: llvm/trunk/test/CodeGen/X86/recip-fastmath2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/recip-fastmath2.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/recip-fastmath2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/recip-fastmath2.ll Mon Dec 4 09:18:51 2017
@@ -13,55 +13,55 @@
define float @f32_no_step_2(float %x) #3 {
; SSE-LABEL: f32_no_step_2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpss %xmm0, %xmm0
; SSE-NEXT: mulss {{.*}}(%rip), %xmm0
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: f32_no_step_2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm0
; AVX-RECIP-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: f32_no_step_2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm0
; FMA-RECIP-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: f32_no_step_2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [2:1.00]
; BTVER2-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [7:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: f32_no_step_2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [5:1.00]
; SANDY-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [11:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: f32_no_step_2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [5:1.00]
; HASWELL-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [5:0.50]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: f32_no_step_2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [5:1.00]
; HASWELL-NO-FMA-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: f32_no_step_2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [5:1.00]
; KNL-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [5:0.50]
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: f32_no_step_2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpss %xmm0, %xmm0, %xmm0 # sched: [4:1.00]
; SKX-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 # sched: [9:0.50]
; SKX-NEXT: retq # sched: [7:1.00]
@@ -71,7 +71,7 @@ define float @f32_no_step_2(float %x) #3
define float @f32_one_step_2(float %x) #1 {
; SSE-LABEL: f32_one_step_2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpss %xmm0, %xmm2
; SSE-NEXT: mulss %xmm2, %xmm0
; SSE-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
@@ -83,7 +83,7 @@ define float @f32_one_step_2(float %x) #
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: f32_one_step_2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm0
; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
@@ -94,7 +94,7 @@ define float @f32_one_step_2(float %x) #
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: f32_one_step_2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; FMA-RECIP-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0
; FMA-RECIP-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0
@@ -102,7 +102,7 @@ define float @f32_one_step_2(float %x) #
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: f32_one_step_2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:1.00]
; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
@@ -113,7 +113,7 @@ define float @f32_one_step_2(float %x) #
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: f32_one_step_2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
; SANDY-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [6:0.50]
@@ -124,7 +124,7 @@ define float @f32_one_step_2(float %x) #
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: f32_one_step_2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [5:0.50]
; HASWELL-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [5:0.50]
@@ -132,7 +132,7 @@ define float @f32_one_step_2(float %x) #
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: f32_one_step_2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [1:0.50]
@@ -143,7 +143,7 @@ define float @f32_one_step_2(float %x) #
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: f32_one_step_2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [5:0.50]
; KNL-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [5:0.50]
@@ -151,7 +151,7 @@ define float @f32_one_step_2(float %x) #
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: f32_one_step_2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [9:0.50]
; SKX-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [4:0.33]
@@ -163,7 +163,7 @@ define float @f32_one_step_2(float %x) #
define float @f32_one_step_2_divs(float %x) #1 {
; SSE-LABEL: f32_one_step_2_divs:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpss %xmm0, %xmm1
; SSE-NEXT: mulss %xmm1, %xmm0
; SSE-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
@@ -176,7 +176,7 @@ define float @f32_one_step_2_divs(float
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: f32_one_step_2_divs:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm0
; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
@@ -188,7 +188,7 @@ define float @f32_one_step_2_divs(float
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: f32_one_step_2_divs:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; FMA-RECIP-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0
; FMA-RECIP-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0
@@ -197,7 +197,7 @@ define float @f32_one_step_2_divs(float
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: f32_one_step_2_divs:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [5:1.00]
; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
@@ -209,7 +209,7 @@ define float @f32_one_step_2_divs(float
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: f32_one_step_2_divs:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
; SANDY-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [6:0.50]
@@ -221,7 +221,7 @@ define float @f32_one_step_2_divs(float
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: f32_one_step_2_divs:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [5:0.50]
; HASWELL-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [5:0.50]
@@ -230,7 +230,7 @@ define float @f32_one_step_2_divs(float
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: f32_one_step_2_divs:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [1:0.50]
@@ -242,7 +242,7 @@ define float @f32_one_step_2_divs(float
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: f32_one_step_2_divs:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [5:0.50]
; KNL-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [5:0.50]
@@ -251,7 +251,7 @@ define float @f32_one_step_2_divs(float
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: f32_one_step_2_divs:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ss {{.*}}(%rip), %xmm1, %xmm0 # sched: [9:0.50]
; SKX-NEXT: vfmadd132ss %xmm1, %xmm1, %xmm0 # sched: [4:0.33]
@@ -265,7 +265,7 @@ define float @f32_one_step_2_divs(float
define float @f32_two_step_2(float %x) #2 {
; SSE-LABEL: f32_two_step_2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpss %xmm0, %xmm2
; SSE-NEXT: movaps %xmm0, %xmm3
; SSE-NEXT: mulss %xmm2, %xmm3
@@ -283,7 +283,7 @@ define float @f32_two_step_2(float %x) #
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: f32_two_step_2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulss %xmm1, %xmm0, %xmm2
; AVX-RECIP-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
@@ -298,7 +298,7 @@ define float @f32_two_step_2(float %x) #
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: f32_two_step_2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpss %xmm0, %xmm0, %xmm1
; FMA-RECIP-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3
@@ -310,7 +310,7 @@ define float @f32_two_step_2(float %x) #
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: f32_two_step_2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero sched: [5:1.00]
; BTVER2-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulss %xmm1, %xmm0, %xmm2 # sched: [2:1.00]
@@ -325,7 +325,7 @@ define float @f32_two_step_2(float %x) #
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: f32_two_step_2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulss %xmm1, %xmm0, %xmm2 # sched: [5:1.00]
; SANDY-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero sched: [6:0.50]
@@ -340,7 +340,7 @@ define float @f32_two_step_2(float %x) #
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: f32_two_step_2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [1:0.50]
; HASWELL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -352,7 +352,7 @@ define float @f32_two_step_2(float %x) #
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: f32_two_step_2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NO-FMA-NEXT: vmulss %xmm1, %xmm0, %xmm2 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero sched: [1:0.50]
@@ -367,7 +367,7 @@ define float @f32_two_step_2(float %x) #
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: f32_two_step_2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpss %xmm0, %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero sched: [1:0.50]
; KNL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -379,7 +379,7 @@ define float @f32_two_step_2(float %x) #
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: f32_two_step_2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero sched: [5:0.50]
; SKX-NEXT: vrcpss %xmm0, %xmm0, %xmm2 # sched: [4:1.00]
; SKX-NEXT: vmovaps %xmm2, %xmm3 # sched: [1:1.00]
@@ -395,7 +395,7 @@ define float @f32_two_step_2(float %x) #
define <4 x float> @v4f32_one_step2(<4 x float> %x) #1 {
; SSE-LABEL: v4f32_one_step2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm2
; SSE-NEXT: mulps %xmm2, %xmm0
; SSE-NEXT: movaps {{.*#+}} xmm1 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -407,7 +407,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v4f32_one_step2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0
; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -418,7 +418,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v4f32_one_step2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1
; FMA-RECIP-NEXT: vfnmadd213ps {{.*}}(%rip), %xmm1, %xmm0
; FMA-RECIP-NEXT: vfmadd132ps %xmm1, %xmm1, %xmm0
@@ -426,7 +426,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v4f32_one_step2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
@@ -437,7 +437,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v4f32_one_step2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
@@ -448,7 +448,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v4f32_one_step2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0 # sched: [5:0.50]
@@ -457,7 +457,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v4f32_one_step2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
@@ -468,7 +468,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v4f32_one_step2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0 # sched: [5:0.50]
@@ -477,7 +477,7 @@ define <4 x float> @v4f32_one_step2(<4 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v4f32_one_step2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ps {{.*}}(%rip){1to4}, %xmm1, %xmm0 # sched: [10:0.50]
; SKX-NEXT: vfmadd132ps %xmm1, %xmm1, %xmm0 # sched: [4:0.33]
@@ -489,7 +489,7 @@ define <4 x float> @v4f32_one_step2(<4 x
define <4 x float> @v4f32_one_step_2_divs(<4 x float> %x) #1 {
; SSE-LABEL: v4f32_one_step_2_divs:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm1
; SSE-NEXT: mulps %xmm1, %xmm0
; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -502,7 +502,7 @@ define <4 x float> @v4f32_one_step_2_div
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v4f32_one_step_2_divs:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm0
; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -514,7 +514,7 @@ define <4 x float> @v4f32_one_step_2_div
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v4f32_one_step_2_divs:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1
; FMA-RECIP-NEXT: vfnmadd213ps {{.*}}(%rip), %xmm1, %xmm0
; FMA-RECIP-NEXT: vfmadd132ps %xmm1, %xmm1, %xmm0
@@ -523,7 +523,7 @@ define <4 x float> @v4f32_one_step_2_div
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v4f32_one_step_2_divs:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [2:1.00]
@@ -535,7 +535,7 @@ define <4 x float> @v4f32_one_step_2_div
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v4f32_one_step_2_divs:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
@@ -547,7 +547,7 @@ define <4 x float> @v4f32_one_step_2_div
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v4f32_one_step_2_divs:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0 # sched: [5:0.50]
@@ -557,7 +557,7 @@ define <4 x float> @v4f32_one_step_2_div
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v4f32_one_step_2_divs:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
@@ -569,7 +569,7 @@ define <4 x float> @v4f32_one_step_2_div
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v4f32_one_step_2_divs:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vfnmadd213ps %xmm2, %xmm1, %xmm0 # sched: [5:0.50]
@@ -579,7 +579,7 @@ define <4 x float> @v4f32_one_step_2_div
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v4f32_one_step_2_divs:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ps {{.*}}(%rip){1to4}, %xmm1, %xmm0 # sched: [10:0.50]
; SKX-NEXT: vfmadd132ps %xmm1, %xmm1, %xmm0 # sched: [4:0.33]
@@ -593,7 +593,7 @@ define <4 x float> @v4f32_one_step_2_div
define <4 x float> @v4f32_two_step2(<4 x float> %x) #2 {
; SSE-LABEL: v4f32_two_step2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm2
; SSE-NEXT: movaps %xmm0, %xmm3
; SSE-NEXT: mulps %xmm2, %xmm3
@@ -611,7 +611,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v4f32_two_step2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %xmm0, %xmm1
; AVX-RECIP-NEXT: vmulps %xmm1, %xmm0, %xmm2
; AVX-RECIP-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -626,7 +626,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v4f32_two_step2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %xmm0, %xmm1
; FMA-RECIP-NEXT: vmovaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; FMA-RECIP-NEXT: vmovaps %xmm1, %xmm3
@@ -638,7 +638,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v4f32_two_step2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %xmm0, %xmm1 # sched: [2:1.00]
; BTVER2-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [2:1.00]
@@ -653,7 +653,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v4f32_two_step2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; SANDY-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [6:0.50]
@@ -668,7 +668,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v4f32_two_step2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -680,7 +680,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v4f32_two_step2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; HASWELL-NO-FMA-NEXT: vmulps %xmm1, %xmm0, %xmm2 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} xmm3 = [1,1,1,1] sched: [1:0.50]
@@ -695,7 +695,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v4f32_two_step2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %xmm0, %xmm1 # sched: [5:1.00]
; KNL-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -707,7 +707,7 @@ define <4 x float> @v4f32_two_step2(<4 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v4f32_two_step2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %xmm0, %xmm1 # sched: [4:1.00]
; SKX-NEXT: vbroadcastss {{.*#+}} xmm2 = [1,1,1,1] sched: [6:0.50]
; SKX-NEXT: vmovaps %xmm1, %xmm3 # sched: [1:1.00]
@@ -723,7 +723,7 @@ define <4 x float> @v4f32_two_step2(<4 x
define <8 x float> @v8f32_one_step2(<8 x float> %x) #1 {
; SSE-LABEL: v8f32_one_step2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm1, %xmm4
; SSE-NEXT: mulps %xmm4, %xmm1
; SSE-NEXT: movaps {{.*#+}} xmm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -743,7 +743,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_one_step2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1
; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0
; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -754,7 +754,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_one_step2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1
; FMA-RECIP-NEXT: vfnmadd213ps {{.*}}(%rip), %ymm1, %ymm0
; FMA-RECIP-NEXT: vfmadd132ps %ymm1, %ymm1, %ymm0
@@ -762,7 +762,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_one_step2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00]
; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [2:2.00]
@@ -773,7 +773,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_one_step2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
@@ -784,7 +784,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_one_step2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0 # sched: [5:0.50]
@@ -793,7 +793,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_one_step2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
@@ -804,7 +804,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v8f32_one_step2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0 # sched: [5:0.50]
@@ -813,7 +813,7 @@ define <8 x float> @v8f32_one_step2(<8 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_one_step2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %ymm0, %ymm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ps {{.*}}(%rip){1to8}, %ymm1, %ymm0 # sched: [11:0.50]
; SKX-NEXT: vfmadd132ps %ymm1, %ymm1, %ymm0 # sched: [4:0.33]
@@ -825,7 +825,7 @@ define <8 x float> @v8f32_one_step2(<8 x
define <8 x float> @v8f32_one_step_2_divs(<8 x float> %x) #1 {
; SSE-LABEL: v8f32_one_step_2_divs:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm2
; SSE-NEXT: mulps %xmm2, %xmm0
; SSE-NEXT: movaps {{.*#+}} xmm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -847,7 +847,7 @@ define <8 x float> @v8f32_one_step_2_div
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_one_step_2_divs:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1
; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm0
; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -859,7 +859,7 @@ define <8 x float> @v8f32_one_step_2_div
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_one_step_2_divs:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1
; FMA-RECIP-NEXT: vfnmadd213ps {{.*}}(%rip), %ymm1, %ymm0
; FMA-RECIP-NEXT: vfmadd132ps %ymm1, %ymm1, %ymm0
@@ -868,7 +868,7 @@ define <8 x float> @v8f32_one_step_2_div
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_one_step_2_divs:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00]
; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [2:2.00]
@@ -880,7 +880,7 @@ define <8 x float> @v8f32_one_step_2_div
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_one_step_2_divs:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
@@ -892,7 +892,7 @@ define <8 x float> @v8f32_one_step_2_div
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_one_step_2_divs:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0 # sched: [5:0.50]
@@ -902,7 +902,7 @@ define <8 x float> @v8f32_one_step_2_div
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_one_step_2_divs:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
@@ -914,7 +914,7 @@ define <8 x float> @v8f32_one_step_2_div
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v8f32_one_step_2_divs:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vfnmadd213ps %ymm2, %ymm1, %ymm0 # sched: [5:0.50]
@@ -924,7 +924,7 @@ define <8 x float> @v8f32_one_step_2_div
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_one_step_2_divs:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %ymm0, %ymm1 # sched: [4:1.00]
; SKX-NEXT: vfnmadd213ps {{.*}}(%rip){1to8}, %ymm1, %ymm0 # sched: [11:0.50]
; SKX-NEXT: vfmadd132ps %ymm1, %ymm1, %ymm0 # sched: [4:0.33]
@@ -938,7 +938,7 @@ define <8 x float> @v8f32_one_step_2_div
define <8 x float> @v8f32_two_step2(<8 x float> %x) #2 {
; SSE-LABEL: v8f32_two_step2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movaps %xmm0, %xmm2
; SSE-NEXT: rcpps %xmm1, %xmm3
; SSE-NEXT: movaps %xmm1, %xmm4
@@ -970,7 +970,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_two_step2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm1
; AVX-RECIP-NEXT: vmulps %ymm1, %ymm0, %ymm2
; AVX-RECIP-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
@@ -985,7 +985,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_two_step2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm1
; FMA-RECIP-NEXT: vmovaps {{.*#+}} ymm2 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00]
; FMA-RECIP-NEXT: vmovaps %ymm1, %ymm3
@@ -997,7 +997,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_two_step2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [5:1.00]
; BTVER2-NEXT: vrcpps %ymm0, %ymm1 # sched: [2:2.00]
; BTVER2-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [2:2.00]
@@ -1012,7 +1012,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_two_step2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %ymm0, %ymm1 # sched: [7:2.00]
; SANDY-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:1.00]
; SANDY-NEXT: vmovaps {{.*#+}} ymm3 = [1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00,1.000000e+00] sched: [7:0.50]
@@ -1027,7 +1027,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_two_step2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; HASWELL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00]
@@ -1039,7 +1039,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_two_step2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; HASWELL-NO-FMA-NEXT: vmulps %ymm1, %ymm0, %ymm2 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: vbroadcastss {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
@@ -1054,7 +1054,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v8f32_two_step2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %ymm0, %ymm1 # sched: [11:2.00]
; KNL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [1:0.50]
; KNL-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00]
@@ -1066,7 +1066,7 @@ define <8 x float> @v8f32_two_step2(<8 x
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_two_step2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %ymm0, %ymm1 # sched: [4:1.00]
; SKX-NEXT: vbroadcastss {{.*#+}} ymm2 = [1,1,1,1,1,1,1,1] sched: [7:0.50]
; SKX-NEXT: vmovaps %ymm1, %ymm3 # sched: [1:1.00]
@@ -1082,48 +1082,48 @@ define <8 x float> @v8f32_two_step2(<8 x
define <8 x float> @v8f32_no_step(<8 x float> %x) #3 {
; SSE-LABEL: v8f32_no_step:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm0, %xmm0
; SSE-NEXT: rcpps %xmm1, %xmm1
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_no_step:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm0
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_no_step:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_no_step:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [2:2.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_no_step:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_no_step:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %ymm0, %ymm0 # sched: [11:2.00]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_no_step:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm0 # sched: [11:2.00]
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v8f32_no_step:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %ymm0, %ymm0 # sched: [11:2.00]
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_no_step:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %ymm0, %ymm0 # sched: [4:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
%div = fdiv fast <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, %x
@@ -1132,7 +1132,7 @@ define <8 x float> @v8f32_no_step(<8 x f
define <8 x float> @v8f32_no_step2(<8 x float> %x) #3 {
; SSE-LABEL: v8f32_no_step2:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: rcpps %xmm1, %xmm1
; SSE-NEXT: rcpps %xmm0, %xmm0
; SSE-NEXT: mulps {{.*}}(%rip), %xmm0
@@ -1140,49 +1140,49 @@ define <8 x float> @v8f32_no_step2(<8 x
; SSE-NEXT: retq
;
; AVX-RECIP-LABEL: v8f32_no_step2:
-; AVX-RECIP: # BB#0:
+; AVX-RECIP: # %bb.0:
; AVX-RECIP-NEXT: vrcpps %ymm0, %ymm0
; AVX-RECIP-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0
; AVX-RECIP-NEXT: retq
;
; FMA-RECIP-LABEL: v8f32_no_step2:
-; FMA-RECIP: # BB#0:
+; FMA-RECIP: # %bb.0:
; FMA-RECIP-NEXT: vrcpps %ymm0, %ymm0
; FMA-RECIP-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0
; FMA-RECIP-NEXT: retq
;
; BTVER2-LABEL: v8f32_no_step2:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: vrcpps %ymm0, %ymm0 # sched: [2:2.00]
; BTVER2-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [7:2.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; SANDY-LABEL: v8f32_no_step2:
-; SANDY: # BB#0:
+; SANDY: # %bb.0:
; SANDY-NEXT: vrcpps %ymm0, %ymm0 # sched: [7:2.00]
; SANDY-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [12:1.00]
; SANDY-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: v8f32_no_step2:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: vrcpps %ymm0, %ymm0 # sched: [11:2.00]
; HASWELL-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [5:0.50]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; HASWELL-NO-FMA-LABEL: v8f32_no_step2:
-; HASWELL-NO-FMA: # BB#0:
+; HASWELL-NO-FMA: # %bb.0:
; HASWELL-NO-FMA-NEXT: vrcpps %ymm0, %ymm0 # sched: [11:2.00]
; HASWELL-NO-FMA-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [5:0.50]
; HASWELL-NO-FMA-NEXT: retq # sched: [2:1.00]
;
; KNL-LABEL: v8f32_no_step2:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: vrcpps %ymm0, %ymm0 # sched: [11:2.00]
; KNL-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [5:0.50]
; KNL-NEXT: retq # sched: [2:1.00]
;
; SKX-LABEL: v8f32_no_step2:
-; SKX: # BB#0:
+; SKX: # %bb.0:
; SKX-NEXT: vrcpps %ymm0, %ymm0 # sched: [4:1.00]
; SKX-NEXT: vmulps {{.*}}(%rip), %ymm0, %ymm0 # sched: [11:0.50]
; SKX-NEXT: retq # sched: [7:1.00]
Modified: llvm/trunk/test/CodeGen/X86/recip-pic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/recip-pic.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/recip-pic.ll (original)
+++ llvm/trunk/test/CodeGen/X86/recip-pic.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define fastcc float @foo(float %x) unnamed_addr #0 {
; CHECK-LABEL: foo:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: calll .L0$pb
; CHECK-NEXT: .cfi_adjust_cfa_offset 4
; CHECK-NEXT: .L0$pb:
Modified: llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll (original)
+++ llvm/trunk/test/CodeGen/X86/reduce-trunc-shl.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define void @trunc_shl_7_v4i32_v4i64(<4 x i32> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
; SSE2-LABEL: trunc_shl_7_v4i32_v4i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps (%rsi), %xmm0
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],mem[0,2]
; SSE2-NEXT: pslld $7, %xmm0
@@ -12,7 +12,7 @@ define void @trunc_shl_7_v4i32_v4i64(<4
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_7_v4i32_v4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = mem[0,2,2,3,4,6,6,7]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
; AVX2-NEXT: vpslld $7, %xmm0, %xmm0
@@ -28,7 +28,7 @@ define void @trunc_shl_7_v4i32_v4i64(<4
define <8 x i16> @trunc_shl_v8i16_v8i32(<8 x i32> %a) {
; SSE2-LABEL: trunc_shl_v8i16_v8i32:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pslld $17, %xmm0
; SSE2-NEXT: pslld $17, %xmm1
; SSE2-NEXT: pslld $16, %xmm1
@@ -39,7 +39,7 @@ define <8 x i16> @trunc_shl_v8i16_v8i32(
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_v8i16_v8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpslld $17, %ymm0, %ymm0
; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
@@ -53,14 +53,14 @@ define <8 x i16> @trunc_shl_v8i16_v8i32(
define void @trunc_shl_31_i32_i64(i32* %out, i64* %in) {
; SSE2-LABEL: trunc_shl_31_i32_i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movl (%rsi), %eax
; SSE2-NEXT: shll $31, %eax
; SSE2-NEXT: movl %eax, (%rdi)
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_31_i32_i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: movl (%rsi), %eax
; AVX2-NEXT: shll $31, %eax
; AVX2-NEXT: movl %eax, (%rdi)
@@ -74,12 +74,12 @@ define void @trunc_shl_31_i32_i64(i32* %
define void @trunc_shl_32_i32_i64(i32* %out, i64* %in) {
; SSE2-LABEL: trunc_shl_32_i32_i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movl $0, (%rdi)
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_32_i32_i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: movl $0, (%rdi)
; AVX2-NEXT: retq
%val = load i64, i64* %in
@@ -91,14 +91,14 @@ define void @trunc_shl_32_i32_i64(i32* %
define void @trunc_shl_15_i16_i64(i16* %out, i64* %in) {
; SSE2-LABEL: trunc_shl_15_i16_i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movzwl (%rsi), %eax
; SSE2-NEXT: shlw $15, %ax
; SSE2-NEXT: movw %ax, (%rdi)
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_15_i16_i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: movzwl (%rsi), %eax
; AVX2-NEXT: shlw $15, %ax
; AVX2-NEXT: movw %ax, (%rdi)
@@ -112,12 +112,12 @@ define void @trunc_shl_15_i16_i64(i16* %
define void @trunc_shl_16_i16_i64(i16* %out, i64* %in) {
; SSE2-LABEL: trunc_shl_16_i16_i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movw $0, (%rdi)
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_16_i16_i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: movw $0, (%rdi)
; AVX2-NEXT: retq
%val = load i64, i64* %in
@@ -129,14 +129,14 @@ define void @trunc_shl_16_i16_i64(i16* %
define void @trunc_shl_7_i8_i64(i8* %out, i64* %in) {
; SSE2-LABEL: trunc_shl_7_i8_i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movb (%rsi), %al
; SSE2-NEXT: shlb $7, %al
; SSE2-NEXT: movb %al, (%rdi)
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_7_i8_i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: movb (%rsi), %al
; AVX2-NEXT: shlb $7, %al
; AVX2-NEXT: movb %al, (%rdi)
@@ -150,12 +150,12 @@ define void @trunc_shl_7_i8_i64(i8* %out
define void @trunc_shl_8_i8_i64(i8* %out, i64* %in) {
; SSE2-LABEL: trunc_shl_8_i8_i64:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movb $0, (%rdi)
; SSE2-NEXT: retq
;
; AVX2-LABEL: trunc_shl_8_i8_i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: movb $0, (%rdi)
; AVX2-NEXT: retq
%val = load i64, i64* %in
Modified: llvm/trunk/test/CodeGen/X86/rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rem.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rem.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rem.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i32 @test1(i32 %X) {
; CHECK-LABEL: test1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl $-2139062143, %edx # imm = 0x80808081
; CHECK-NEXT: movl %ecx, %eax
@@ -25,7 +25,7 @@ define i32 @test1(i32 %X) {
define i32 @test2(i32 %X) {
; CHECK-LABEL: test2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: sarl $31, %ecx
@@ -40,7 +40,7 @@ define i32 @test2(i32 %X) {
define i32 @test3(i32 %X) {
; CHECK-LABEL: test3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl $-2139062143, %edx # imm = 0x80808081
; CHECK-NEXT: movl %ecx, %eax
@@ -58,7 +58,7 @@ define i32 @test3(i32 %X) {
define i32 @test4(i32 %X) {
; CHECK-LABEL: test4:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: retl
%tmp1 = urem i32 %X, 256
@@ -67,7 +67,7 @@ define i32 @test4(i32 %X) {
define i32 @test5(i32 %X) nounwind readnone {
; CHECK-LABEL: test5:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl $41, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: idivl {{[0-9]+}}(%esp)
Modified: llvm/trunk/test/CodeGen/X86/replace-load-and-with-bzhi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/replace-load-and-with-bzhi.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/replace-load-and-with-bzhi.ll (original)
+++ llvm/trunk/test/CodeGen/X86/replace-load-and-with-bzhi.ll Mon Dec 4 09:18:51 2017
@@ -9,14 +9,14 @@
define i32 @f32_bzhi(i32 %x, i32 %y) local_unnamed_addr {
; CHECK-LABEL: f32_bzhi:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movslq %esi, %rax
; CHECK-NEXT: andl fill_table32(,%rax,4), %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: ret{{[l|q]}}
;
; CHECK32-LABEL: f32_bzhi:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movl fill_table32(,%eax,4), %eax
; CHECK32-NEXT: andl {{[0-9]+}}(%esp), %eax
@@ -31,14 +31,14 @@ entry:
define i32 @f32_bzhi_partial(i32 %x, i32 %y) local_unnamed_addr {
; CHECK-LABEL: f32_bzhi_partial:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movslq %esi, %rax
; CHECK-NEXT: andl fill_table32_partial(,%rax,4), %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: ret{{[l|q]}}
;
; CHECK32-LABEL: f32_bzhi_partial:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movl fill_table32_partial(,%eax,4), %eax
; CHECK32-NEXT: andl {{[0-9]+}}(%esp), %eax
@@ -53,13 +53,13 @@ entry:
define i64 @f64_bzhi(i64 %x, i64 %y) local_unnamed_addr {
; CHECK-LABEL: f64_bzhi:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq fill_table64(,%rsi,8), %rdi
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: ret{{[l|q]}}
;
; CHECK32-LABEL: f64_bzhi:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movl fill_table64+4(,%eax,8), %edx
; CHECK32-NEXT: movl fill_table64(,%eax,8), %eax
@@ -75,13 +75,13 @@ entry:
define i64 @f64_bzhi_partial(i64 %x, i64 %y) local_unnamed_addr {
; CHECK-LABEL: f64_bzhi_partial:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andq fill_table64_partial(,%rsi,8), %rdi
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: ret{{[l|q]}}
;
; CHECK32-LABEL: f64_bzhi_partial:
-; CHECK32: # BB#0: # %entry
+; CHECK32: # %bb.0: # %entry
; CHECK32-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK32-NEXT: movl fill_table64_partial+4(,%eax,8), %edx
; CHECK32-NEXT: movl fill_table64_partial(,%eax,8), %eax
Modified: llvm/trunk/test/CodeGen/X86/ret-mmx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ret-mmx.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ret-mmx.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ret-mmx.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define void @t1() nounwind {
; CHECK-LABEL: t1:
-; CHECK: ## BB#0: ## %entry
+; CHECK: ## %bb.0: ## %entry
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: callq _return_v1di
; CHECK-NEXT: movq _g_v1di@{{.*}}(%rip), %rcx
@@ -23,7 +23,7 @@ declare <1 x i64> @return_v1di()
define <1 x i64> @t2() nounwind {
; CHECK-LABEL: t2:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: retq
ret <1 x i64> <i64 1>
@@ -31,7 +31,7 @@ define <1 x i64> @t2() nounwind {
define <2 x i32> @t3() nounwind {
; CHECK-LABEL: t3:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: retq
@@ -40,7 +40,7 @@ define <2 x i32> @t3() nounwind {
define double @t4() nounwind {
; CHECK-LABEL: t4:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl $1, %eax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/rot16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot16.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot16.ll Mon Dec 4 09:18:51 2017
@@ -4,14 +4,14 @@
define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: foo:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: rolw %cl, %ax
; X32-NEXT: retl
;
; X64-LABEL: foo:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edx, %ecx
; X64-NEXT: shldw %cl, %di, %di
; X64-NEXT: movl %edi, %eax
@@ -25,7 +25,7 @@ define i16 @foo(i16 %x, i16 %y, i16 %z)
define i16 @bar(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: bar:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
@@ -33,7 +33,7 @@ define i16 @bar(i16 %x, i16 %y, i16 %z)
; X32-NEXT: retl
;
; X64-LABEL: bar:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edx, %ecx
; X64-NEXT: shldw %cl, %di, %si
; X64-NEXT: movl %esi, %eax
@@ -47,14 +47,14 @@ define i16 @bar(i16 %x, i16 %y, i16 %z)
define i16 @un(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: un:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: rorw %cl, %ax
; X32-NEXT: retl
;
; X64-LABEL: un:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edx, %ecx
; X64-NEXT: shrdw %cl, %di, %di
; X64-NEXT: movl %edi, %eax
@@ -68,7 +68,7 @@ define i16 @un(i16 %x, i16 %y, i16 %z) n
define i16 @bu(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: bu:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
@@ -76,7 +76,7 @@ define i16 @bu(i16 %x, i16 %y, i16 %z) n
; X32-NEXT: retl
;
; X64-LABEL: bu:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edx, %ecx
; X64-NEXT: shrdw %cl, %di, %si
; X64-NEXT: movl %esi, %eax
@@ -90,13 +90,13 @@ define i16 @bu(i16 %x, i16 %y, i16 %z) n
define i16 @xfoo(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: xfoo:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: rolw $5, %ax
; X32-NEXT: retl
;
; X64-LABEL: xfoo:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rolw $5, %di
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
@@ -108,14 +108,14 @@ define i16 @xfoo(i16 %x, i16 %y, i16 %z)
define i16 @xbar(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: xbar:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: shldw $5, %cx, %ax
; X32-NEXT: retl
;
; X64-LABEL: xbar:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: shldw $5, %di, %si
; X64-NEXT: movl %esi, %eax
; X64-NEXT: retq
@@ -127,13 +127,13 @@ define i16 @xbar(i16 %x, i16 %y, i16 %z)
define i16 @xun(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: xun:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: rolw $11, %ax
; X32-NEXT: retl
;
; X64-LABEL: xun:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rolw $11, %di
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
@@ -145,14 +145,14 @@ define i16 @xun(i16 %x, i16 %y, i16 %z)
define i16 @xbu(i16 %x, i16 %y, i16 %z) nounwind {
; X32-LABEL: xbu:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: shldw $11, %cx, %ax
; X32-NEXT: retl
;
; X64-LABEL: xbu:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: shldw $11, %si, %di
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/rot32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot32.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot32.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
; ALL-LABEL: foo:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
; ALL-NEXT: roll %cl, %eax
@@ -20,7 +20,7 @@ entry:
define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
; ALL-LABEL: bar:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -36,7 +36,7 @@ entry:
define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
; ALL-LABEL: un:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
; ALL-NEXT: rorl %cl, %eax
@@ -51,7 +51,7 @@ entry:
define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
; ALL-LABEL: bu:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -67,19 +67,19 @@ entry:
define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
; X86-LABEL: xfoo:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: roll $7, %eax
; X86-NEXT: retl
;
; SHLD-LABEL: xfoo:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
; SHLD-NEXT: shldl $7, %eax, %eax
; SHLD-NEXT: retl
;
; BMI2-LABEL: xfoo:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: retl
entry:
@@ -91,21 +91,21 @@ entry:
define i32 @xfoop(i32* %p) nounwind readnone {
; X86-LABEL: xfoop:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %eax
; X86-NEXT: roll $7, %eax
; X86-NEXT: retl
;
; SHLD-LABEL: xfoop:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
; SHLD-NEXT: movl (%eax), %eax
; SHLD-NEXT: shldl $7, %eax, %eax
; SHLD-NEXT: retl
;
; BMI2-LABEL: xfoop:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: rorxl $25, (%eax), %eax
; BMI2-NEXT: retl
@@ -119,7 +119,7 @@ entry:
define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
; ALL-LABEL: xbar:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
; ALL-NEXT: shldl $7, %ecx, %eax
@@ -133,19 +133,19 @@ entry:
define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
; X86-LABEL: xun:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: roll $25, %eax
; X86-NEXT: retl
;
; SHLD-LABEL: xun:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
; SHLD-NEXT: shldl $25, %eax, %eax
; SHLD-NEXT: retl
;
; BMI2-LABEL: xun:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: retl
entry:
@@ -157,21 +157,21 @@ entry:
define i32 @xunp(i32* %p) nounwind readnone {
; X86-LABEL: xunp:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl (%eax), %eax
; X86-NEXT: roll $25, %eax
; X86-NEXT: retl
;
; SHLD-LABEL: xunp:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
; SHLD-NEXT: movl (%eax), %eax
; SHLD-NEXT: shldl $25, %eax, %eax
; SHLD-NEXT: retl
;
; BMI2-LABEL: xunp:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
; BMI2-NEXT: rorxl $7, (%eax), %eax
; BMI2-NEXT: retl
@@ -187,7 +187,7 @@ entry:
define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
; ALL-LABEL: xbu:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
; ALL-NEXT: shldl $25, %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/rot64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rot64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rot64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rot64.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
; ALL-LABEL: foo:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movl %edx, %ecx
; ALL-NEXT: rolq %cl, %rdi
; ALL-NEXT: movq %rdi, %rax
@@ -20,7 +20,7 @@ entry:
define i64 @bar(i64 %x, i64 %y, i64 %z) nounwind readnone {
; ALL-LABEL: bar:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movl %edx, %ecx
; ALL-NEXT: shldq %cl, %rdi, %rsi
; ALL-NEXT: movq %rsi, %rax
@@ -35,7 +35,7 @@ entry:
define i64 @un(i64 %x, i64 %y, i64 %z) nounwind readnone {
; ALL-LABEL: un:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movl %edx, %ecx
; ALL-NEXT: rorq %cl, %rdi
; ALL-NEXT: movq %rdi, %rax
@@ -50,7 +50,7 @@ entry:
define i64 @bu(i64 %x, i64 %y, i64 %z) nounwind readnone {
; ALL-LABEL: bu:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: movl %edx, %ecx
; ALL-NEXT: shrdq %cl, %rdi, %rsi
; ALL-NEXT: movq %rsi, %rax
@@ -65,19 +65,19 @@ entry:
define i64 @xfoo(i64 %x, i64 %y, i64 %z) nounwind readnone {
; X64-LABEL: xfoo:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: rolq $7, %rdi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: retq
;
; SHLD-LABEL: xfoo:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: shldq $7, %rdi, %rdi
; SHLD-NEXT: movq %rdi, %rax
; SHLD-NEXT: retq
;
; BMI2-LABEL: xfoo:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxq $57, %rdi, %rax
; BMI2-NEXT: retq
entry:
@@ -89,19 +89,19 @@ entry:
define i64 @xfoop(i64* %p) nounwind readnone {
; X64-LABEL: xfoop:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: rolq $7, %rax
; X64-NEXT: retq
;
; SHLD-LABEL: xfoop:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: movq (%rdi), %rax
; SHLD-NEXT: shldq $7, %rax, %rax
; SHLD-NEXT: retq
;
; BMI2-LABEL: xfoop:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxq $57, (%rdi), %rax
; BMI2-NEXT: retq
entry:
@@ -114,7 +114,7 @@ entry:
define i64 @xbar(i64 %x, i64 %y, i64 %z) nounwind readnone {
; ALL-LABEL: xbar:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: shrdq $57, %rsi, %rdi
; ALL-NEXT: movq %rdi, %rax
; ALL-NEXT: retq
@@ -127,19 +127,19 @@ entry:
define i64 @xun(i64 %x, i64 %y, i64 %z) nounwind readnone {
; X64-LABEL: xun:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: rolq $57, %rdi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: retq
;
; SHLD-LABEL: xun:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: shldq $57, %rdi, %rdi
; SHLD-NEXT: movq %rdi, %rax
; SHLD-NEXT: retq
;
; BMI2-LABEL: xun:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxq $7, %rdi, %rax
; BMI2-NEXT: retq
entry:
@@ -151,19 +151,19 @@ entry:
define i64 @xunp(i64* %p) nounwind readnone {
; X64-LABEL: xunp:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movq (%rdi), %rax
; X64-NEXT: rolq $57, %rax
; X64-NEXT: retq
;
; SHLD-LABEL: xunp:
-; SHLD: # BB#0: # %entry
+; SHLD: # %bb.0: # %entry
; SHLD-NEXT: movq (%rdi), %rax
; SHLD-NEXT: shldq $57, %rax, %rax
; SHLD-NEXT: retq
;
; BMI2-LABEL: xunp:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: rorxq $7, (%rdi), %rax
; BMI2-NEXT: retq
entry:
@@ -176,7 +176,7 @@ entry:
define i64 @xbu(i64 %x, i64 %y, i64 %z) nounwind readnone {
; ALL-LABEL: xbu:
-; ALL: # BB#0: # %entry
+; ALL: # %bb.0: # %entry
; ALL-NEXT: shldq $57, %rsi, %rdi
; ALL-NEXT: movq %rdi, %rax
; ALL-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/rotate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rotate.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rotate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rotate.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define i64 @rotl64(i64 %A, i8 %Amt) nounwind {
; 32-LABEL: rotl64:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: pushl %ebx
; 32-NEXT: pushl %edi
; 32-NEXT: pushl %esi
@@ -17,7 +17,7 @@ define i64 @rotl64(i64 %A, i8 %Amt) noun
; 32-NEXT: shldl %cl, %esi, %edx
; 32-NEXT: testb $32, %cl
; 32-NEXT: je .LBB0_2
-; 32-NEXT: # BB#1:
+; 32-NEXT: # %bb.1:
; 32-NEXT: movl %eax, %edx
; 32-NEXT: xorl %eax, %eax
; 32-NEXT: .LBB0_2:
@@ -29,7 +29,7 @@ define i64 @rotl64(i64 %A, i8 %Amt) noun
; 32-NEXT: shrdl %cl, %edi, %esi
; 32-NEXT: testb $32, %ch
; 32-NEXT: je .LBB0_4
-; 32-NEXT: # BB#3:
+; 32-NEXT: # %bb.3:
; 32-NEXT: movl %ebx, %esi
; 32-NEXT: xorl %ebx, %ebx
; 32-NEXT: .LBB0_4:
@@ -41,7 +41,7 @@ define i64 @rotl64(i64 %A, i8 %Amt) noun
; 32-NEXT: retl
;
; 64-LABEL: rotl64:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: rolq %cl, %rdi
; 64-NEXT: movq %rdi, %rax
@@ -57,7 +57,7 @@ define i64 @rotl64(i64 %A, i8 %Amt) noun
define i64 @rotr64(i64 %A, i8 %Amt) nounwind {
; 32-LABEL: rotr64:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: pushl %ebx
; 32-NEXT: pushl %edi
; 32-NEXT: pushl %esi
@@ -70,7 +70,7 @@ define i64 @rotr64(i64 %A, i8 %Amt) noun
; 32-NEXT: shrdl %cl, %esi, %eax
; 32-NEXT: testb $32, %cl
; 32-NEXT: je .LBB1_2
-; 32-NEXT: # BB#1:
+; 32-NEXT: # %bb.1:
; 32-NEXT: movl %edx, %eax
; 32-NEXT: xorl %edx, %edx
; 32-NEXT: .LBB1_2:
@@ -82,7 +82,7 @@ define i64 @rotr64(i64 %A, i8 %Amt) noun
; 32-NEXT: shldl %cl, %edi, %esi
; 32-NEXT: testb $32, %ch
; 32-NEXT: je .LBB1_4
-; 32-NEXT: # BB#3:
+; 32-NEXT: # %bb.3:
; 32-NEXT: movl %ebx, %esi
; 32-NEXT: xorl %ebx, %ebx
; 32-NEXT: .LBB1_4:
@@ -94,7 +94,7 @@ define i64 @rotr64(i64 %A, i8 %Amt) noun
; 32-NEXT: retl
;
; 64-LABEL: rotr64:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: rorq %cl, %rdi
; 64-NEXT: movq %rdi, %rax
@@ -110,7 +110,7 @@ define i64 @rotr64(i64 %A, i8 %Amt) noun
define i64 @rotli64(i64 %A) nounwind {
; 32-LABEL: rotli64:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; 32-NEXT: movl %ecx, %edx
@@ -119,7 +119,7 @@ define i64 @rotli64(i64 %A) nounwind {
; 32-NEXT: retl
;
; 64-LABEL: rotli64:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolq $5, %rdi
; 64-NEXT: movq %rdi, %rax
; 64-NEXT: retq
@@ -131,7 +131,7 @@ define i64 @rotli64(i64 %A) nounwind {
define i64 @rotri64(i64 %A) nounwind {
; 32-LABEL: rotri64:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %edx
; 32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; 32-NEXT: movl %ecx, %eax
@@ -140,7 +140,7 @@ define i64 @rotri64(i64 %A) nounwind {
; 32-NEXT: retl
;
; 64-LABEL: rotri64:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolq $59, %rdi
; 64-NEXT: movq %rdi, %rax
; 64-NEXT: retq
@@ -152,7 +152,7 @@ define i64 @rotri64(i64 %A) nounwind {
define i64 @rotl1_64(i64 %A) nounwind {
; 32-LABEL: rotl1_64:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; 32-NEXT: movl %ecx, %edx
@@ -161,7 +161,7 @@ define i64 @rotl1_64(i64 %A) nounwind {
; 32-NEXT: retl
;
; 64-LABEL: rotl1_64:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolq %rdi
; 64-NEXT: movq %rdi, %rax
; 64-NEXT: retq
@@ -173,7 +173,7 @@ define i64 @rotl1_64(i64 %A) nounwind {
define i64 @rotr1_64(i64 %A) nounwind {
; 32-LABEL: rotr1_64:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %edx
; 32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; 32-NEXT: movl %ecx, %eax
@@ -182,7 +182,7 @@ define i64 @rotr1_64(i64 %A) nounwind {
; 32-NEXT: retl
;
; 64-LABEL: rotr1_64:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorq %rdi
; 64-NEXT: movq %rdi, %rax
; 64-NEXT: retq
@@ -194,14 +194,14 @@ define i64 @rotr1_64(i64 %A) nounwind {
define i32 @rotl32(i32 %A, i8 %Amt) nounwind {
; 32-LABEL: rotl32:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %cl
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: roll %cl, %eax
; 32-NEXT: retl
;
; 64-LABEL: rotl32:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: roll %cl, %edi
; 64-NEXT: movl %edi, %eax
@@ -217,14 +217,14 @@ define i32 @rotl32(i32 %A, i8 %Amt) noun
define i32 @rotr32(i32 %A, i8 %Amt) nounwind {
; 32-LABEL: rotr32:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %cl
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rorl %cl, %eax
; 32-NEXT: retl
;
; 64-LABEL: rotr32:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: rorl %cl, %edi
; 64-NEXT: movl %edi, %eax
@@ -240,13 +240,13 @@ define i32 @rotr32(i32 %A, i8 %Amt) noun
define i32 @rotli32(i32 %A) nounwind {
; 32-LABEL: rotli32:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: roll $5, %eax
; 32-NEXT: retl
;
; 64-LABEL: rotli32:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: roll $5, %edi
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -258,13 +258,13 @@ define i32 @rotli32(i32 %A) nounwind {
define i32 @rotri32(i32 %A) nounwind {
; 32-LABEL: rotri32:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: roll $27, %eax
; 32-NEXT: retl
;
; 64-LABEL: rotri32:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: roll $27, %edi
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -276,13 +276,13 @@ define i32 @rotri32(i32 %A) nounwind {
define i32 @rotl1_32(i32 %A) nounwind {
; 32-LABEL: rotl1_32:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: roll %eax
; 32-NEXT: retl
;
; 64-LABEL: rotl1_32:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: roll %edi
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -294,13 +294,13 @@ define i32 @rotl1_32(i32 %A) nounwind {
define i32 @rotr1_32(i32 %A) nounwind {
; 32-LABEL: rotr1_32:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rorl %eax
; 32-NEXT: retl
;
; 64-LABEL: rotr1_32:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorl %edi
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -312,14 +312,14 @@ define i32 @rotr1_32(i32 %A) nounwind {
define i16 @rotl16(i16 %A, i8 %Amt) nounwind {
; 32-LABEL: rotl16:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %cl
; 32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rolw %cl, %ax
; 32-NEXT: retl
;
; 64-LABEL: rotl16:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: rolw %cl, %di
; 64-NEXT: movl %edi, %eax
@@ -335,14 +335,14 @@ define i16 @rotl16(i16 %A, i8 %Amt) noun
define i16 @rotr16(i16 %A, i8 %Amt) nounwind {
; 32-LABEL: rotr16:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %cl
; 32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rorw %cl, %ax
; 32-NEXT: retl
;
; 64-LABEL: rotr16:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: rorw %cl, %di
; 64-NEXT: movl %edi, %eax
@@ -358,13 +358,13 @@ define i16 @rotr16(i16 %A, i8 %Amt) noun
define i16 @rotli16(i16 %A) nounwind {
; 32-LABEL: rotli16:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rolw $5, %ax
; 32-NEXT: retl
;
; 64-LABEL: rotli16:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolw $5, %di
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -376,13 +376,13 @@ define i16 @rotli16(i16 %A) nounwind {
define i16 @rotri16(i16 %A) nounwind {
; 32-LABEL: rotri16:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rolw $11, %ax
; 32-NEXT: retl
;
; 64-LABEL: rotri16:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolw $11, %di
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -394,13 +394,13 @@ define i16 @rotri16(i16 %A) nounwind {
define i16 @rotl1_16(i16 %A) nounwind {
; 32-LABEL: rotl1_16:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rolw %ax
; 32-NEXT: retl
;
; 64-LABEL: rotl1_16:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolw %di
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -412,13 +412,13 @@ define i16 @rotl1_16(i16 %A) nounwind {
define i16 @rotr1_16(i16 %A) nounwind {
; 32-LABEL: rotr1_16:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rorw %ax
; 32-NEXT: retl
;
; 64-LABEL: rotr1_16:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorw %di
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -430,14 +430,14 @@ define i16 @rotr1_16(i16 %A) nounwind {
define i8 @rotl8(i8 %A, i8 %Amt) nounwind {
; 32-LABEL: rotl8:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %cl
; 32-NEXT: movb {{[0-9]+}}(%esp), %al
; 32-NEXT: rolb %cl, %al
; 32-NEXT: retl
;
; 64-LABEL: rotl8:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: rolb %cl, %dil
; 64-NEXT: movl %edi, %eax
@@ -451,14 +451,14 @@ define i8 @rotl8(i8 %A, i8 %Amt) nounwin
define i8 @rotr8(i8 %A, i8 %Amt) nounwind {
; 32-LABEL: rotr8:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %cl
; 32-NEXT: movb {{[0-9]+}}(%esp), %al
; 32-NEXT: rorb %cl, %al
; 32-NEXT: retl
;
; 64-LABEL: rotr8:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: movl %esi, %ecx
; 64-NEXT: rorb %cl, %dil
; 64-NEXT: movl %edi, %eax
@@ -472,13 +472,13 @@ define i8 @rotr8(i8 %A, i8 %Amt) nounwin
define i8 @rotli8(i8 %A) nounwind {
; 32-LABEL: rotli8:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %al
; 32-NEXT: rolb $5, %al
; 32-NEXT: retl
;
; 64-LABEL: rotli8:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolb $5, %dil
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -490,13 +490,13 @@ define i8 @rotli8(i8 %A) nounwind {
define i8 @rotri8(i8 %A) nounwind {
; 32-LABEL: rotri8:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %al
; 32-NEXT: rolb $3, %al
; 32-NEXT: retl
;
; 64-LABEL: rotri8:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolb $3, %dil
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -508,13 +508,13 @@ define i8 @rotri8(i8 %A) nounwind {
define i8 @rotl1_8(i8 %A) nounwind {
; 32-LABEL: rotl1_8:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %al
; 32-NEXT: rolb %al
; 32-NEXT: retl
;
; 64-LABEL: rotl1_8:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rolb %dil
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -526,13 +526,13 @@ define i8 @rotl1_8(i8 %A) nounwind {
define i8 @rotr1_8(i8 %A) nounwind {
; 32-LABEL: rotr1_8:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movb {{[0-9]+}}(%esp), %al
; 32-NEXT: rorb %al
; 32-NEXT: retl
;
; 64-LABEL: rotr1_8:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorb %dil
; 64-NEXT: movl %edi, %eax
; 64-NEXT: retq
@@ -544,7 +544,7 @@ define i8 @rotr1_8(i8 %A) nounwind {
define void @rotr1_64_mem(i64* %Aptr) nounwind {
; 32-LABEL: rotr1_64_mem:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: pushl %esi
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: movl (%eax), %ecx
@@ -558,7 +558,7 @@ define void @rotr1_64_mem(i64* %Aptr) no
; 32-NEXT: retl
;
; 64-LABEL: rotr1_64_mem:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorq (%rdi)
; 64-NEXT: retq
@@ -572,13 +572,13 @@ define void @rotr1_64_mem(i64* %Aptr) no
define void @rotr1_32_mem(i32* %Aptr) nounwind {
; 32-LABEL: rotr1_32_mem:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rorl (%eax)
; 32-NEXT: retl
;
; 64-LABEL: rotr1_32_mem:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorl (%rdi)
; 64-NEXT: retq
%A = load i32, i32 *%Aptr
@@ -591,13 +591,13 @@ define void @rotr1_32_mem(i32* %Aptr) no
define void @rotr1_16_mem(i16* %Aptr) nounwind {
; 32-LABEL: rotr1_16_mem:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rorw (%eax)
; 32-NEXT: retl
;
; 64-LABEL: rotr1_16_mem:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorw (%rdi)
; 64-NEXT: retq
%A = load i16, i16 *%Aptr
@@ -610,13 +610,13 @@ define void @rotr1_16_mem(i16* %Aptr) no
define void @rotr1_8_mem(i8* %Aptr) nounwind {
; 32-LABEL: rotr1_8_mem:
-; 32: # BB#0:
+; 32: # %bb.0:
; 32-NEXT: movl {{[0-9]+}}(%esp), %eax
; 32-NEXT: rorb (%eax)
; 32-NEXT: retl
;
; 64-LABEL: rotr1_8_mem:
-; 64: # BB#0:
+; 64: # %bb.0:
; 64-NEXT: rorb (%rdi)
; 64-NEXT: retq
%A = load i8, i8 *%Aptr
Modified: llvm/trunk/test/CodeGen/X86/rotate4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rotate4.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rotate4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rotate4.ll Mon Dec 4 09:18:51 2017
@@ -6,7 +6,7 @@
define i32 @rotate_left_32(i32 %a, i32 %b) {
; CHECK-LABEL: rotate_left_32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: roll %cl, %edi
; CHECK-NEXT: movl %edi, %eax
@@ -22,7 +22,7 @@ define i32 @rotate_left_32(i32 %a, i32 %
define i32 @rotate_right_32(i32 %a, i32 %b) {
; CHECK-LABEL: rotate_right_32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorl %cl, %edi
; CHECK-NEXT: movl %edi, %eax
@@ -38,7 +38,7 @@ define i32 @rotate_right_32(i32 %a, i32
define i64 @rotate_left_64(i64 %a, i64 %b) {
; CHECK-LABEL: rotate_left_64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rolq %cl, %rdi
; CHECK-NEXT: movq %rdi, %rax
@@ -54,7 +54,7 @@ define i64 @rotate_left_64(i64 %a, i64 %
define i64 @rotate_right_64(i64 %a, i64 %b) {
; CHECK-LABEL: rotate_right_64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorq %cl, %rdi
; CHECK-NEXT: movq %rdi, %rax
@@ -72,7 +72,7 @@ define i64 @rotate_right_64(i64 %a, i64
define void @rotate_left_m32(i32 *%pa, i32 %b) {
; CHECK-LABEL: rotate_left_m32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: roll %cl, (%rdi)
; CHECK-NEXT: retq
@@ -89,7 +89,7 @@ define void @rotate_left_m32(i32 *%pa, i
define void @rotate_right_m32(i32 *%pa, i32 %b) {
; CHECK-LABEL: rotate_right_m32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorl %cl, (%rdi)
; CHECK-NEXT: retq
@@ -106,7 +106,7 @@ define void @rotate_right_m32(i32 *%pa,
define void @rotate_left_m64(i64 *%pa, i64 %b) {
; CHECK-LABEL: rotate_left_m64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rolq %cl, (%rdi)
; CHECK-NEXT: retq
@@ -123,7 +123,7 @@ define void @rotate_left_m64(i64 *%pa, i
define void @rotate_right_m64(i64 *%pa, i64 %b) {
; CHECK-LABEL: rotate_right_m64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorq %cl, (%rdi)
; CHECK-NEXT: retq
@@ -143,7 +143,7 @@ define void @rotate_right_m64(i64 *%pa,
define i8 @rotate_left_8(i8 %x, i32 %amount) {
; CHECK-LABEL: rotate_left_8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rolb %cl, %dil
; CHECK-NEXT: movl %edi, %eax
@@ -160,7 +160,7 @@ define i8 @rotate_left_8(i8 %x, i32 %amo
define i8 @rotate_right_8(i8 %x, i32 %amount) {
; CHECK-LABEL: rotate_right_8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorb %cl, %dil
; CHECK-NEXT: movl %edi, %eax
@@ -177,7 +177,7 @@ define i8 @rotate_right_8(i8 %x, i32 %am
define i16 @rotate_left_16(i16 %x, i32 %amount) {
; CHECK-LABEL: rotate_left_16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rolw %cl, %di
; CHECK-NEXT: movl %edi, %eax
@@ -194,7 +194,7 @@ define i16 @rotate_left_16(i16 %x, i32 %
define i16 @rotate_right_16(i16 %x, i32 %amount) {
; CHECK-LABEL: rotate_right_16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorw %cl, %di
; CHECK-NEXT: movl %edi, %eax
@@ -211,7 +211,7 @@ define i16 @rotate_right_16(i16 %x, i32
define void @rotate_left_m8(i8* %p, i32 %amount) {
; CHECK-LABEL: rotate_left_m8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rolb %cl, (%rdi)
; CHECK-NEXT: retq
@@ -229,7 +229,7 @@ define void @rotate_left_m8(i8* %p, i32
define void @rotate_right_m8(i8* %p, i32 %amount) {
; CHECK-LABEL: rotate_right_m8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorb %cl, (%rdi)
; CHECK-NEXT: retq
@@ -247,7 +247,7 @@ define void @rotate_right_m8(i8* %p, i32
define void @rotate_left_m16(i16* %p, i32 %amount) {
; CHECK-LABEL: rotate_left_m16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rolw %cl, (%rdi)
; CHECK-NEXT: retq
@@ -265,7 +265,7 @@ define void @rotate_left_m16(i16* %p, i3
define void @rotate_right_m16(i16* %p, i32 %amount) {
; CHECK-LABEL: rotate_right_m16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: rorw %cl, (%rdi)
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/rotate_vec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rotate_vec.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rotate_vec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rotate_vec.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <4 x i32> @rot_v4i32_splat(<4 x i32> %x) {
; CHECK-LABEL: rot_v4i32_splat:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotd $31, %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = lshr <4 x i32> %x, <i32 1, i32 1, i32 1, i32 1>
@@ -14,7 +14,7 @@ define <4 x i32> @rot_v4i32_splat(<4 x i
define <4 x i32> @rot_v4i32_non_splat(<4 x i32> %x) {
; CHECK-LABEL: rot_v4i32_non_splat:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0
; CHECK-NEXT: retq
%1 = lshr <4 x i32> %x, <i32 1, i32 2, i32 3, i32 4>
@@ -25,7 +25,7 @@ define <4 x i32> @rot_v4i32_non_splat(<4
define <4 x i32> @rot_v4i32_splat_2masks(<4 x i32> %x) {
; CHECK-LABEL: rot_v4i32_splat_2masks:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotd $31, %xmm0, %xmm0
; CHECK-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; CHECK-NEXT: retq
@@ -40,7 +40,7 @@ define <4 x i32> @rot_v4i32_splat_2masks
define <4 x i32> @rot_v4i32_non_splat_2masks(<4 x i32> %x) {
; CHECK-LABEL: rot_v4i32_non_splat_2masks:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0
; CHECK-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/rounding-ops.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rounding-ops.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rounding-ops.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rounding-ops.ll Mon Dec 4 09:18:51 2017
@@ -5,17 +5,17 @@
define float @test1(float %x) nounwind {
; CHECK-SSE-LABEL: test1:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundss $9, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test1:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test1:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscaless $9, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @floorf(float %x) nounwind readnone
@@ -26,17 +26,17 @@ declare float @floorf(float) nounwind re
define double @test2(double %x) nounwind {
; CHECK-SSE-LABEL: test2:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundsd $9, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test2:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test2:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscalesd $9, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @floor(double %x) nounwind readnone
@@ -47,17 +47,17 @@ declare double @floor(double) nounwind r
define float @test3(float %x) nounwind {
; CHECK-SSE-LABEL: test3:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundss $12, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test3:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test3:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscaless $12, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @nearbyintf(float %x) nounwind readnone
@@ -68,17 +68,17 @@ declare float @nearbyintf(float) nounwin
define double @test4(double %x) nounwind {
; CHECK-SSE-LABEL: test4:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundsd $12, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test4:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test4:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscalesd $12, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @nearbyint(double %x) nounwind readnone
@@ -89,17 +89,17 @@ declare double @nearbyint(double) nounwi
define float @test5(float %x) nounwind {
; CHECK-SSE-LABEL: test5:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundss $10, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test5:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test5:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscaless $10, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @ceilf(float %x) nounwind readnone
@@ -110,17 +110,17 @@ declare float @ceilf(float) nounwind rea
define double @test6(double %x) nounwind {
; CHECK-SSE-LABEL: test6:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundsd $10, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test6:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test6:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscalesd $10, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @ceil(double %x) nounwind readnone
@@ -131,17 +131,17 @@ declare double @ceil(double) nounwind re
define float @test7(float %x) nounwind {
; CHECK-SSE-LABEL: test7:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundss $4, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test7:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test7:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscaless $4, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @rintf(float %x) nounwind readnone
@@ -152,17 +152,17 @@ declare float @rintf(float) nounwind rea
define double @test8(double %x) nounwind {
; CHECK-SSE-LABEL: test8:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundsd $4, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test8:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test8:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscalesd $4, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @rint(double %x) nounwind readnone
@@ -173,17 +173,17 @@ declare double @rint(double) nounwind re
define float @test9(float %x) nounwind {
; CHECK-SSE-LABEL: test9:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundss $11, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test9:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test9:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscaless $11, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call float @truncf(float %x) nounwind readnone
@@ -194,17 +194,17 @@ declare float @truncf(float) nounwind re
define double @test10(double %x) nounwind {
; CHECK-SSE-LABEL: test10:
-; CHECK-SSE: ## BB#0:
+; CHECK-SSE: ## %bb.0:
; CHECK-SSE-NEXT: roundsd $11, %xmm0, %xmm0
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: test10:
-; CHECK-AVX: ## BB#0:
+; CHECK-AVX: ## %bb.0:
; CHECK-AVX-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm0
; CHECK-AVX-NEXT: retq
;
; CHECK-AVX512-LABEL: test10:
-; CHECK-AVX512: ## BB#0:
+; CHECK-AVX512: ## %bb.0:
; CHECK-AVX512-NEXT: vrndscalesd $11, %xmm0, %xmm0, %xmm0
; CHECK-AVX512-NEXT: retq
%call = tail call double @trunc(double %x) nounwind readnone
Modified: llvm/trunk/test/CodeGen/X86/rtm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rtm.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/rtm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/rtm.ll Mon Dec 4 09:18:51 2017
@@ -9,18 +9,18 @@ declare void @f1()
define i32 @test_xbegin() nounwind uwtable {
; X86-LABEL: test_xbegin:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: xbegin .LBB0_2
-; X86-NEXT: # BB#1: # %entry
+; X86-NEXT: # %bb.1: # %entry
; X86-NEXT: movl $-1, %eax
; X86: .LBB0_2: # %entry
; X86-NEXT: # XABORT DEF
; X86-NEXT: retl
;
; X64-LABEL: test_xbegin:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xbegin .LBB0_2
-; X64-NEXT: # BB#1: # %entry
+; X64-NEXT: # %bb.1: # %entry
; X64-NEXT: movl $-1, %eax
; X64: .LBB0_2: # %entry
; X64-NEXT: # XABORT DEF
@@ -32,12 +32,12 @@ entry:
define void @test_xend() nounwind uwtable {
; X86-LABEL: test_xend:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: xend
; X86-NEXT: retl
;
; X64-LABEL: test_xend:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xend
; X64-NEXT: retq
entry:
@@ -47,12 +47,12 @@ entry:
define void @test_xabort() nounwind uwtable {
; X86-LABEL: test_xabort:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: xabort $2
; X86-NEXT: retl
;
; X64-LABEL: test_xabort:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xabort $2
; X64-NEXT: retq
entry:
@@ -62,13 +62,13 @@ entry:
define void @f2(i32 %x) nounwind uwtable {
; X86-LABEL: f2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: xabort $1
; X86-NEXT: calll f1
; X86-NEXT: retl
;
; X64-LABEL: f2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: pushq %rax
; X64-NEXT: .cfi_def_cfa_offset 16
; X64-NEXT: movl %edi, {{[0-9]+}}(%rsp)
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