[llvm] r319665 - [CodeGen] Unify MBB reference format in both MIR and debug output
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 4 09:18:56 PST 2017
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-vec-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-vec-cmp.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl-vec-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl-vec-cmp.ll Mon Dec 4 09:18:51 2017
@@ -4,13 +4,13 @@
define <4 x i64> @test256_1(<4 x i64> %x, <4 x i64> %y) nounwind {
; VLX-LABEL: test256_1:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k1
; VLX-NEXT: vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_1:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm2
; NoVLX-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: retq
@@ -21,13 +21,13 @@ define <4 x i64> @test256_1(<4 x i64> %x
define <4 x i64> @test256_2(<4 x i64> %x, <4 x i64> %y, <4 x i64> %x1) nounwind {
; VLX-LABEL: test256_2:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k1
; VLX-NEXT: vpblendmq %ymm2, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_2:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vblendvpd %ymm0, %ymm2, %ymm1, %ymm0
; NoVLX-NEXT: retq
@@ -38,13 +38,13 @@ define <4 x i64> @test256_2(<4 x i64> %x
define <8 x i32> @test256_3(<8 x i32> %x, <8 x i32> %y, <8 x i32> %x1) nounwind {
; VLX-LABEL: test256_3:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled %ymm0, %ymm1, %k1
; VLX-NEXT: vpblendmd %ymm2, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_3:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
@@ -59,13 +59,13 @@ define <8 x i32> @test256_3(<8 x i32> %x
define <4 x i64> @test256_4(<4 x i64> %x, <4 x i64> %y, <4 x i64> %x1) nounwind {
; VLX-LABEL: test256_4:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpnleuq %ymm1, %ymm0, %k1
; VLX-NEXT: vpblendmq %ymm2, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_4:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm3 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm3, %ymm1, %ymm4
; NoVLX-NEXT: vpxor %ymm3, %ymm0, %ymm0
@@ -79,13 +79,13 @@ define <4 x i64> @test256_4(<4 x i64> %x
define <8 x i32> @test256_5(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %yp) nounwind {
; VLX-LABEL: test256_5:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqd (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_5:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -101,13 +101,13 @@ define <8 x i32> @test256_5(<8 x i32> %x
define <8 x i32> @test256_5b(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %yp) nounwind {
; VLX-LABEL: test256_5b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqd (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_5b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -123,13 +123,13 @@ define <8 x i32> @test256_5b(<8 x i32> %
define <8 x i32> @test256_6(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test256_6:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtd (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_6:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -145,13 +145,13 @@ define <8 x i32> @test256_6(<8 x i32> %x
define <8 x i32> @test256_6b(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test256_6b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtd (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_6b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -167,13 +167,13 @@ define <8 x i32> @test256_6b(<8 x i32> %
define <8 x i32> @test256_7(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test256_7:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_7:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -189,13 +189,13 @@ define <8 x i32> @test256_7(<8 x i32> %x
define <8 x i32> @test256_7b(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test256_7b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_7b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -211,13 +211,13 @@ define <8 x i32> @test256_7b(<8 x i32> %
define <8 x i32> @test256_8(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test256_8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleud (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_8:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -233,13 +233,13 @@ define <8 x i32> @test256_8(<8 x i32> %x
define <8 x i32> @test256_8b(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test256_8b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleud (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_8b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -255,14 +255,14 @@ define <8 x i32> @test256_8b(<8 x i32> %
define <8 x i32> @test256_9(<8 x i32> %x, <8 x i32> %y, <8 x i32> %x1, <8 x i32> %y1) nounwind {
; VLX-LABEL: test256_9:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqd %ymm1, %ymm0, %k1
; VLX-NEXT: vpcmpeqd %ymm3, %ymm2, %k1 {%k1}
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_9:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm3<def> %ymm3<kill> %zmm3<def>
; NoVLX-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
@@ -281,14 +281,14 @@ define <8 x i32> @test256_9(<8 x i32> %x
define <4 x i64> @test256_10(<4 x i64> %x, <4 x i64> %y, <4 x i64> %x1, <4 x i64> %y1) nounwind {
; VLX-LABEL: test256_10:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleq %ymm1, %ymm0, %k1
; VLX-NEXT: vpcmpleq %ymm2, %ymm3, %k1 {%k1}
; VLX-NEXT: vpblendmq %ymm0, %ymm2, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_10:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq %ymm2, %ymm3, %ymm3
; NoVLX-NEXT: vpcmpeqd %ymm4, %ymm4, %ymm4
; NoVLX-NEXT: vpxor %ymm4, %ymm3, %ymm3
@@ -305,14 +305,14 @@ define <4 x i64> @test256_10(<4 x i64> %
define <4 x i64> @test256_11(<4 x i64> %x, <4 x i64>* %y.ptr, <4 x i64> %x1, <4 x i64> %y1) nounwind {
; VLX-LABEL: test256_11:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtq %ymm2, %ymm1, %k1
; VLX-NEXT: vpcmpgtq (%rdi), %ymm0, %k1 {%k1}
; VLX-NEXT: vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_11:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq (%rdi), %ymm0, %ymm3
; NoVLX-NEXT: vpcmpgtq %ymm2, %ymm1, %ymm2
; NoVLX-NEXT: vpand %ymm2, %ymm3, %ymm2
@@ -328,14 +328,14 @@ define <4 x i64> @test256_11(<4 x i64> %
define <8 x i32> @test256_12(<8 x i32> %x, <8 x i32>* %y.ptr, <8 x i32> %x1, <8 x i32> %y1) nounwind {
; VLX-LABEL: test256_12:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled %ymm1, %ymm2, %k1
; VLX-NEXT: vpcmpleud (%rdi), %ymm0, %k1 {%k1}
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_12:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
@@ -355,13 +355,13 @@ define <8 x i32> @test256_12(<8 x i32> %
define <4 x i64> @test256_13(<4 x i64> %x, <4 x i64> %x1, i64* %yb.ptr) nounwind {
; VLX-LABEL: test256_13:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqq (%rdi){1to4}, %ymm0, %k1
; VLX-NEXT: vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_13:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm2
; NoVLX-NEXT: vpcmpeqq %ymm2, %ymm0, %ymm2
; NoVLX-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
@@ -376,13 +376,13 @@ define <4 x i64> @test256_13(<4 x i64> %
define <8 x i32> @test256_14(<8 x i32> %x, i32* %yb.ptr, <8 x i32> %x1) nounwind {
; VLX-LABEL: test256_14:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled (%rdi){1to8}, %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_14:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rdi), %ymm2
@@ -400,14 +400,14 @@ define <8 x i32> @test256_14(<8 x i32> %
define <8 x i32> @test256_15(<8 x i32> %x, i32* %yb.ptr, <8 x i32> %x1, <8 x i32> %y1) nounwind {
; VLX-LABEL: test256_15:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled %ymm1, %ymm2, %k1
; VLX-NEXT: vpcmpgtd (%rdi){1to8}, %ymm0, %k1 {%k1}
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_15:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm2<def> %ymm2<kill> %zmm2<def>
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
@@ -429,14 +429,14 @@ define <8 x i32> @test256_15(<8 x i32> %
define <4 x i64> @test256_16(<4 x i64> %x, i64* %yb.ptr, <4 x i64> %x1, <4 x i64> %y1) nounwind {
; VLX-LABEL: test256_16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleq %ymm1, %ymm2, %k1
; VLX-NEXT: vpcmpgtq (%rdi){1to4}, %ymm0, %k1 {%k1}
; VLX-NEXT: vpblendmq %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_16:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm2, %ymm2
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm3
; NoVLX-NEXT: vpcmpgtq %ymm3, %ymm0, %ymm3
@@ -455,13 +455,13 @@ define <4 x i64> @test256_16(<4 x i64> %
define <8 x i32> @test256_17(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %yp) nounwind {
; VLX-LABEL: test256_17:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpneqd (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_17:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -477,13 +477,13 @@ define <8 x i32> @test256_17(<8 x i32> %
define <8 x i32> @test256_18(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %yp) nounwind {
; VLX-LABEL: test256_18:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpneqd (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_18:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -499,13 +499,13 @@ define <8 x i32> @test256_18(<8 x i32> %
define <8 x i32> @test256_19(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %yp) nounwind {
; VLX-LABEL: test256_19:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpnltud (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_19:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -521,13 +521,13 @@ define <8 x i32> @test256_19(<8 x i32> %
define <8 x i32> @test256_20(<8 x i32> %x, <8 x i32> %x1, <8 x i32>* %yp) nounwind {
; VLX-LABEL: test256_20:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleud (%rdi), %ymm0, %k1
; VLX-NEXT: vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test256_20:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqu (%rdi), %ymm2
@@ -543,13 +543,13 @@ define <8 x i32> @test256_20(<8 x i32> %
define <2 x i64> @test128_1(<2 x i64> %x, <2 x i64> %y) nounwind {
; VLX-LABEL: test128_1:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k1
; VLX-NEXT: vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_1:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm2
; NoVLX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: retq
@@ -560,13 +560,13 @@ define <2 x i64> @test128_1(<2 x i64> %x
define <2 x i64> @test128_2(<2 x i64> %x, <2 x i64> %y, <2 x i64> %x1) nounwind {
; VLX-LABEL: test128_2:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k1
; VLX-NEXT: vpblendmq %xmm2, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_2:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vblendvpd %xmm0, %xmm2, %xmm1, %xmm0
; NoVLX-NEXT: retq
@@ -577,13 +577,13 @@ define <2 x i64> @test128_2(<2 x i64> %x
define <4 x i32> @test128_3(<4 x i32> %x, <4 x i32> %y, <4 x i32> %x1) nounwind {
; VLX-LABEL: test128_3:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k1
; VLX-NEXT: vpblendmd %xmm2, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_3:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; NoVLX-NEXT: vpxor %xmm3, %xmm0, %xmm0
@@ -596,13 +596,13 @@ define <4 x i32> @test128_3(<4 x i32> %x
define <2 x i64> @test128_4(<2 x i64> %x, <2 x i64> %y, <2 x i64> %x1) nounwind {
; VLX-LABEL: test128_4:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpnleuq %xmm1, %xmm0, %k1
; VLX-NEXT: vpblendmq %xmm2, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_4:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm3, %xmm1, %xmm4
; NoVLX-NEXT: vpxor %xmm3, %xmm0, %xmm0
@@ -616,13 +616,13 @@ define <2 x i64> @test128_4(<2 x i64> %x
define <4 x i32> @test128_5(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %yp) nounwind {
; VLX-LABEL: test128_5:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqd (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_5:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpeqd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: retq
@@ -634,13 +634,13 @@ define <4 x i32> @test128_5(<4 x i32> %x
define <4 x i32> @test128_5b(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %yp) nounwind {
; VLX-LABEL: test128_5b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqd (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_5b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpeqd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: retq
@@ -652,13 +652,13 @@ define <4 x i32> @test128_5b(<4 x i32> %
define <4 x i32> @test128_6(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_6:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtd (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_6:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: retq
@@ -670,13 +670,13 @@ define <4 x i32> @test128_6(<4 x i32> %x
define <4 x i32> @test128_6b(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_6b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtd (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_6b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: retq
@@ -688,13 +688,13 @@ define <4 x i32> @test128_6b(<4 x i32> %
define <4 x i32> @test128_7(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_7:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_7:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; NoVLX-NEXT: vpxor %xmm3, %xmm2, %xmm2
@@ -708,13 +708,13 @@ define <4 x i32> @test128_7(<4 x i32> %x
define <4 x i32> @test128_7b(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_7b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_7b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; NoVLX-NEXT: vpxor %xmm3, %xmm2, %xmm2
@@ -728,13 +728,13 @@ define <4 x i32> @test128_7b(<4 x i32> %
define <4 x i32> @test128_8(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_8:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleud (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_8:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpminud (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm2
; NoVLX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
@@ -747,13 +747,13 @@ define <4 x i32> @test128_8(<4 x i32> %x
define <4 x i32> @test128_8b(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_8b:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleud (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_8b:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vmovdqu (%rdi), %xmm2
; NoVLX-NEXT: vpmaxud %xmm0, %xmm2, %xmm3
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
@@ -767,14 +767,14 @@ define <4 x i32> @test128_8b(<4 x i32> %
define <4 x i32> @test128_9(<4 x i32> %x, <4 x i32> %y, <4 x i32> %x1, <4 x i32> %y1) nounwind {
; VLX-LABEL: test128_9:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k1
; VLX-NEXT: vpcmpeqd %xmm3, %xmm2, %k1 {%k1}
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_9:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm3
; NoVLX-NEXT: vpand %xmm2, %xmm3, %xmm2
@@ -789,14 +789,14 @@ define <4 x i32> @test128_9(<4 x i32> %x
define <2 x i64> @test128_10(<2 x i64> %x, <2 x i64> %y, <2 x i64> %x1, <2 x i64> %y1) nounwind {
; VLX-LABEL: test128_10:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleq %xmm1, %xmm0, %k1
; VLX-NEXT: vpcmpleq %xmm2, %xmm3, %k1 {%k1}
; VLX-NEXT: vpblendmq %xmm0, %xmm2, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_10:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm3
; NoVLX-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
; NoVLX-NEXT: vpxor %xmm4, %xmm3, %xmm3
@@ -813,14 +813,14 @@ define <2 x i64> @test128_10(<2 x i64> %
define <2 x i64> @test128_11(<2 x i64> %x, <2 x i64>* %y.ptr, <2 x i64> %x1, <2 x i64> %y1) nounwind {
; VLX-LABEL: test128_11:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpgtq %xmm2, %xmm1, %k1
; VLX-NEXT: vpcmpgtq (%rdi), %xmm0, %k1 {%k1}
; VLX-NEXT: vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_11:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm3
; NoVLX-NEXT: vpcmpgtq %xmm2, %xmm1, %xmm2
; NoVLX-NEXT: vpand %xmm2, %xmm3, %xmm2
@@ -836,14 +836,14 @@ define <2 x i64> @test128_11(<2 x i64> %
define <4 x i32> @test128_12(<4 x i32> %x, <4 x i32>* %y.ptr, <4 x i32> %x1, <4 x i32> %y1) nounwind {
; VLX-LABEL: test128_12:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled %xmm1, %xmm2, %k1
; VLX-NEXT: vpcmpleud (%rdi), %xmm0, %k1 {%k1}
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_12:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm2, %xmm2
; NoVLX-NEXT: vpminud (%rdi), %xmm0, %xmm3
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm0, %xmm3
@@ -860,13 +860,13 @@ define <4 x i32> @test128_12(<4 x i32> %
define <2 x i64> @test128_13(<2 x i64> %x, <2 x i64> %x1, i64* %yb.ptr) nounwind {
; VLX-LABEL: test128_13:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpeqq (%rdi){1to2}, %xmm0, %k1
; VLX-NEXT: vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_13:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm2
; NoVLX-NEXT: vpcmpeqq %xmm2, %xmm0, %xmm2
; NoVLX-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
@@ -881,13 +881,13 @@ define <2 x i64> @test128_13(<2 x i64> %
define <4 x i32> @test128_14(<4 x i32> %x, i32* %yb.ptr, <4 x i32> %x1) nounwind {
; VLX-LABEL: test128_14:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled (%rdi){1to4}, %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_14:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm2
; NoVLX-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
@@ -904,14 +904,14 @@ define <4 x i32> @test128_14(<4 x i32> %
define <4 x i32> @test128_15(<4 x i32> %x, i32* %yb.ptr, <4 x i32> %x1, <4 x i32> %y1) nounwind {
; VLX-LABEL: test128_15:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpled %xmm1, %xmm2, %k1
; VLX-NEXT: vpcmpgtd (%rdi){1to4}, %xmm0, %k1 {%k1}
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_15:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm2, %xmm2
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm3
; NoVLX-NEXT: vpcmpgtd %xmm3, %xmm0, %xmm3
@@ -930,14 +930,14 @@ define <4 x i32> @test128_15(<4 x i32> %
define <2 x i64> @test128_16(<2 x i64> %x, i64* %yb.ptr, <2 x i64> %x1, <2 x i64> %y1) nounwind {
; VLX-LABEL: test128_16:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleq %xmm1, %xmm2, %k1
; VLX-NEXT: vpcmpgtq (%rdi){1to2}, %xmm0, %k1 {%k1}
; VLX-NEXT: vpblendmq %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_16:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm2, %xmm2
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm3
; NoVLX-NEXT: vpcmpgtq %xmm3, %xmm0, %xmm3
@@ -956,13 +956,13 @@ define <2 x i64> @test128_16(<2 x i64> %
define <4 x i32> @test128_17(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_17:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpneqd (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_17:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpeqd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; NoVLX-NEXT: vpxor %xmm3, %xmm2, %xmm2
@@ -976,13 +976,13 @@ define <4 x i32> @test128_17(<4 x i32> %
define <4 x i32> @test128_18(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_18:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpneqd (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_18:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpcmpeqd (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
; NoVLX-NEXT: vpxor %xmm3, %xmm2, %xmm2
@@ -996,13 +996,13 @@ define <4 x i32> @test128_18(<4 x i32> %
define <4 x i32> @test128_19(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_19:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpnltud (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_19:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vpmaxud (%rdi), %xmm0, %xmm2
; NoVLX-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm2
; NoVLX-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0
@@ -1015,13 +1015,13 @@ define <4 x i32> @test128_19(<4 x i32> %
define <4 x i32> @test128_20(<4 x i32> %x, <4 x i32> %x1, <4 x i32>* %y.ptr) nounwind {
; VLX-LABEL: test128_20:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vpcmpleud (%rdi), %xmm0, %k1
; VLX-NEXT: vpblendmd %xmm0, %xmm1, %xmm0 {%k1}
; VLX-NEXT: retq
;
; NoVLX-LABEL: test128_20:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: vmovdqu (%rdi), %xmm2
; NoVLX-NEXT: vpmaxud %xmm0, %xmm2, %xmm3
; NoVLX-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll Mon Dec 4 09:18:51 2017
@@ -4,13 +4,13 @@
define zeroext i32 @test_vpcmpeqb_v16i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqb %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -122,13 +122,13 @@ entry:
define zeroext i32 @test_vpcmpeqb_v16i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqb (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -241,14 +241,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqb_v16i1_v32i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqb %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -363,14 +363,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqb_v16i1_v32i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqb (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -487,13 +487,13 @@ entry:
define zeroext i64 @test_vpcmpeqb_v16i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqb %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -610,13 +610,13 @@ entry:
define zeroext i64 @test_vpcmpeqb_v16i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqb (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -734,14 +734,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqb_v16i1_v64i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqb %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -861,14 +861,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqb_v16i1_v64i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqb (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -990,14 +990,14 @@ entry:
define zeroext i64 @test_vpcmpeqb_v32i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqb %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1037,14 +1037,14 @@ entry:
define zeroext i64 @test_vpcmpeqb_v32i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqb (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1085,7 +1085,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqb_v32i1_v64i1_mask(i32 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqb %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -1093,7 +1093,7 @@ define zeroext i64 @test_masked_vpcmpeqb
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1144,7 +1144,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqb_v32i1_v64i1_mask_mem(i32 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqb (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -1152,7 +1152,7 @@ define zeroext i64 @test_masked_vpcmpeqb
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1205,14 +1205,14 @@ entry:
define zeroext i16 @test_vpcmpeqw_v8i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -1232,14 +1232,14 @@ entry:
define zeroext i16 @test_vpcmpeqw_v8i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqw (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -1260,7 +1260,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqw_v8i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -1268,7 +1268,7 @@ define zeroext i16 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -1291,7 +1291,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqw_v8i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -1299,7 +1299,7 @@ define zeroext i16 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqw (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -1324,13 +1324,13 @@ entry:
define zeroext i32 @test_vpcmpeqw_v8i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1397,13 +1397,13 @@ entry:
define zeroext i32 @test_vpcmpeqw_v8i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1471,14 +1471,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqw_v8i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1548,14 +1548,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqw_v8i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1627,13 +1627,13 @@ entry:
define zeroext i64 @test_vpcmpeqw_v8i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1705,13 +1705,13 @@ entry:
define zeroext i64 @test_vpcmpeqw_v8i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1784,14 +1784,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqw_v8i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1866,14 +1866,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqw_v8i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -1950,14 +1950,14 @@ entry:
define zeroext i32 @test_vpcmpeqw_v16i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2069,14 +2069,14 @@ entry:
define zeroext i32 @test_vpcmpeqw_v16i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2189,7 +2189,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqw_v16i1_v32i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -2197,7 +2197,7 @@ define zeroext i32 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2312,7 +2312,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqw_v16i1_v32i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -2320,7 +2320,7 @@ define zeroext i32 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2437,14 +2437,14 @@ entry:
define zeroext i64 @test_vpcmpeqw_v16i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2561,14 +2561,14 @@ entry:
define zeroext i64 @test_vpcmpeqw_v16i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2686,7 +2686,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqw_v16i1_v64i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -2694,7 +2694,7 @@ define zeroext i64 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2814,7 +2814,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqw_v16i1_v64i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -2822,7 +2822,7 @@ define zeroext i64 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -2944,14 +2944,14 @@ entry:
define zeroext i64 @test_vpcmpeqw_v32i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -3293,14 +3293,14 @@ entry:
define zeroext i64 @test_vpcmpeqw_v32i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqw_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqw (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqw_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -3558,7 +3558,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqw_v32i1_v64i1_mask(i32 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -3566,7 +3566,7 @@ define zeroext i64 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -3919,7 +3919,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqw_v32i1_v64i1_mask_mem(i32 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqw_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqw (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -3927,7 +3927,7 @@ define zeroext i64 @test_masked_vpcmpeqw
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqw_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -4197,14 +4197,14 @@ entry:
define zeroext i8 @test_vpcmpeqd_v4i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -4253,14 +4253,14 @@ entry:
define zeroext i8 @test_vpcmpeqd_v4i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -4310,7 +4310,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqd_v4i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -4318,7 +4318,7 @@ define zeroext i8 @test_masked_vpcmpeqd_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -4388,7 +4388,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqd_v4i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -4396,7 +4396,7 @@ define zeroext i8 @test_masked_vpcmpeqd_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -4468,14 +4468,14 @@ entry:
define zeroext i8 @test_vpcmpeqd_v4i1_v8i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -4527,7 +4527,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqd_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -4535,7 +4535,7 @@ define zeroext i8 @test_masked_vpcmpeqd_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -4609,14 +4609,14 @@ entry:
define zeroext i16 @test_vpcmpeqd_v4i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -4664,14 +4664,14 @@ entry:
define zeroext i16 @test_vpcmpeqd_v4i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -4720,7 +4720,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqd_v4i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -4728,7 +4728,7 @@ define zeroext i16 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -4797,7 +4797,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqd_v4i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -4805,7 +4805,7 @@ define zeroext i16 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqd (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -4876,14 +4876,14 @@ entry:
define zeroext i16 @test_vpcmpeqd_v4i1_v16i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -4934,7 +4934,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqd_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -4942,7 +4942,7 @@ define zeroext i16 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -5015,13 +5015,13 @@ entry:
define zeroext i32 @test_vpcmpeqd_v4i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5056,13 +5056,13 @@ entry:
define zeroext i32 @test_vpcmpeqd_v4i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5098,14 +5098,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v4i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5161,14 +5161,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v4i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5226,13 +5226,13 @@ entry:
define zeroext i32 @test_vpcmpeqd_v4i1_v32i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5270,14 +5270,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5337,13 +5337,13 @@ entry:
define zeroext i64 @test_vpcmpeqd_v4i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5384,13 +5384,13 @@ entry:
define zeroext i64 @test_vpcmpeqd_v4i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5432,14 +5432,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v4i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5501,14 +5501,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v4i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5572,13 +5572,13 @@ entry:
define zeroext i64 @test_vpcmpeqd_v4i1_v64i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5622,14 +5622,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5695,7 +5695,7 @@ entry:
define zeroext i16 @test_vpcmpeqd_v8i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -5703,7 +5703,7 @@ define zeroext i16 @test_vpcmpeqd_v8i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
@@ -5724,7 +5724,7 @@ entry:
define zeroext i16 @test_vpcmpeqd_v8i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -5732,7 +5732,7 @@ define zeroext i16 @test_vpcmpeqd_v8i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rdi), %ymm1
; NoVLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
@@ -5754,7 +5754,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqd_v8i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -5763,7 +5763,7 @@ define zeroext i16 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: kmovw %edi, %k1
@@ -5787,7 +5787,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqd_v8i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -5796,7 +5796,7 @@ define zeroext i16 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -5822,7 +5822,7 @@ entry:
define zeroext i16 @test_vpcmpeqd_v8i1_v16i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -5830,7 +5830,7 @@ define zeroext i16 @test_vpcmpeqd_v8i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rdi), %ymm1
; NoVLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
@@ -5853,7 +5853,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqd_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -5862,7 +5862,7 @@ define zeroext i16 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -5889,14 +5889,14 @@ entry:
define zeroext i32 @test_vpcmpeqd_v8i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -5962,14 +5962,14 @@ entry:
define zeroext i32 @test_vpcmpeqd_v8i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6036,7 +6036,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v8i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -6044,7 +6044,7 @@ define zeroext i32 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6113,7 +6113,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v8i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -6121,7 +6121,7 @@ define zeroext i32 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6192,14 +6192,14 @@ entry:
define zeroext i32 @test_vpcmpeqd_v8i1_v32i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6267,7 +6267,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -6275,7 +6275,7 @@ define zeroext i32 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6347,14 +6347,14 @@ entry:
define zeroext i64 @test_vpcmpeqd_v8i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6425,14 +6425,14 @@ entry:
define zeroext i64 @test_vpcmpeqd_v8i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6504,7 +6504,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v8i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -6512,7 +6512,7 @@ define zeroext i64 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6586,7 +6586,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v8i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -6594,7 +6594,7 @@ define zeroext i64 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6670,14 +6670,14 @@ entry:
define zeroext i64 @test_vpcmpeqd_v8i1_v64i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6750,7 +6750,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -6758,7 +6758,7 @@ define zeroext i64 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6835,14 +6835,14 @@ entry:
define zeroext i32 @test_vpcmpeqd_v16i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -6951,14 +6951,14 @@ entry:
define zeroext i32 @test_vpcmpeqd_v16i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7068,7 +7068,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v16i1_v32i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -7076,7 +7076,7 @@ define zeroext i32 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7188,7 +7188,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v16i1_v32i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -7196,7 +7196,7 @@ define zeroext i32 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7310,14 +7310,14 @@ entry:
define zeroext i32 @test_vpcmpeqd_v16i1_v32i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7428,7 +7428,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqd_v16i1_v32i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -7436,7 +7436,7 @@ define zeroext i32 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7551,14 +7551,14 @@ entry:
define zeroext i64 @test_vpcmpeqd_v16i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7672,14 +7672,14 @@ entry:
define zeroext i64 @test_vpcmpeqd_v16i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7794,7 +7794,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v16i1_v64i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -7802,7 +7802,7 @@ define zeroext i64 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -7919,7 +7919,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v16i1_v64i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -7927,7 +7927,7 @@ define zeroext i64 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -8046,14 +8046,14 @@ entry:
define zeroext i64 @test_vpcmpeqd_v16i1_v64i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqd_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqd (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqd_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -8169,7 +8169,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqd_v16i1_v64i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqd_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqd (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -8177,7 +8177,7 @@ define zeroext i64 @test_masked_vpcmpeqd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqd_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -8297,14 +8297,14 @@ entry:
define zeroext i4 @test_vpcmpeqq_v2i1_v4i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; NoVLX-NEXT: vpslld $31, %ymm0, %ymm0
@@ -8325,14 +8325,14 @@ entry:
define zeroext i4 @test_vpcmpeqq_v2i1_v4i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; NoVLX-NEXT: vpslld $31, %ymm0, %ymm0
@@ -8354,7 +8354,7 @@ entry:
define zeroext i4 @test_masked_vpcmpeqq_v2i1_v4i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -8362,7 +8362,7 @@ define zeroext i4 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -8396,7 +8396,7 @@ entry:
define zeroext i4 @test_masked_vpcmpeqq_v2i1_v4i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -8404,7 +8404,7 @@ define zeroext i4 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -8440,14 +8440,14 @@ entry:
define zeroext i4 @test_vpcmpeqq_v2i1_v4i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
@@ -8471,7 +8471,7 @@ entry:
define zeroext i4 @test_masked_vpcmpeqq_v2i1_v4i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -8479,7 +8479,7 @@ define zeroext i4 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -8517,14 +8517,14 @@ entry:
define zeroext i8 @test_vpcmpeqq_v2i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -8557,14 +8557,14 @@ entry:
define zeroext i8 @test_vpcmpeqq_v2i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -8598,7 +8598,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqq_v2i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -8606,7 +8606,7 @@ define zeroext i8 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -8652,7 +8652,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqq_v2i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -8660,7 +8660,7 @@ define zeroext i8 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -8708,14 +8708,14 @@ entry:
define zeroext i8 @test_vpcmpeqq_v2i1_v8i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
@@ -8751,7 +8751,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqq_v2i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -8759,7 +8759,7 @@ define zeroext i8 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -8809,14 +8809,14 @@ entry:
define zeroext i16 @test_vpcmpeqq_v2i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -8848,14 +8848,14 @@ entry:
define zeroext i16 @test_vpcmpeqq_v2i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -8888,7 +8888,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v2i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -8896,7 +8896,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -8941,7 +8941,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v2i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -8949,7 +8949,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -8996,14 +8996,14 @@ entry:
define zeroext i16 @test_vpcmpeqq_v2i1_v16i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
@@ -9038,7 +9038,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v2i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -9046,7 +9046,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -9095,13 +9095,13 @@ entry:
define zeroext i32 @test_vpcmpeqq_v2i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9136,13 +9136,13 @@ entry:
define zeroext i32 @test_vpcmpeqq_v2i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9178,14 +9178,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v2i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9233,14 +9233,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v2i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9290,13 +9290,13 @@ entry:
define zeroext i32 @test_vpcmpeqq_v2i1_v32i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9334,14 +9334,14 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v2i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9393,13 +9393,13 @@ entry:
define zeroext i64 @test_vpcmpeqq_v2i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9440,13 +9440,13 @@ entry:
define zeroext i64 @test_vpcmpeqq_v2i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9488,14 +9488,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v2i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9549,14 +9549,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v2i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9612,13 +9612,13 @@ entry:
define zeroext i64 @test_vpcmpeqq_v2i1_v64i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9662,14 +9662,14 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v2i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -9727,7 +9727,7 @@ entry:
define zeroext i8 @test_vpcmpeqq_v4i1_v8i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -9735,7 +9735,7 @@ define zeroext i8 @test_vpcmpeqq_v4i1_v8
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -9785,7 +9785,7 @@ entry:
define zeroext i8 @test_vpcmpeqq_v4i1_v8i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -9793,7 +9793,7 @@ define zeroext i8 @test_vpcmpeqq_v4i1_v8
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rdi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -9844,7 +9844,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqq_v4i1_v8i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -9853,7 +9853,7 @@ define zeroext i8 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -9924,7 +9924,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqq_v4i1_v8i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -9933,7 +9933,7 @@ define zeroext i8 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rsi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -10006,7 +10006,7 @@ entry:
define zeroext i8 @test_vpcmpeqq_v4i1_v8i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -10014,7 +10014,7 @@ define zeroext i8 @test_vpcmpeqq_v4i1_v8
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -10067,7 +10067,7 @@ entry:
define zeroext i8 @test_masked_vpcmpeqq_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -10076,7 +10076,7 @@ define zeroext i8 @test_masked_vpcmpeqq_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -10151,7 +10151,7 @@ entry:
define zeroext i16 @test_vpcmpeqq_v4i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -10159,7 +10159,7 @@ define zeroext i16 @test_vpcmpeqq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -10208,7 +10208,7 @@ entry:
define zeroext i16 @test_vpcmpeqq_v4i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -10216,7 +10216,7 @@ define zeroext i16 @test_vpcmpeqq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rdi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -10266,7 +10266,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v4i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -10275,7 +10275,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -10345,7 +10345,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v4i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -10354,7 +10354,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rsi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -10426,7 +10426,7 @@ entry:
define zeroext i16 @test_vpcmpeqq_v4i1_v16i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -10434,7 +10434,7 @@ define zeroext i16 @test_vpcmpeqq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -10486,7 +10486,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -10495,7 +10495,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -10569,14 +10569,14 @@ entry:
define zeroext i32 @test_vpcmpeqq_v4i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -10612,14 +10612,14 @@ entry:
define zeroext i32 @test_vpcmpeqq_v4i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -10656,7 +10656,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v4i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -10664,7 +10664,7 @@ define zeroext i32 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -10721,7 +10721,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v4i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -10729,7 +10729,7 @@ define zeroext i32 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -10788,14 +10788,14 @@ entry:
define zeroext i32 @test_vpcmpeqq_v4i1_v32i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -10834,7 +10834,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -10842,7 +10842,7 @@ define zeroext i32 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -10903,14 +10903,14 @@ entry:
define zeroext i64 @test_vpcmpeqq_v4i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -10952,14 +10952,14 @@ entry:
define zeroext i64 @test_vpcmpeqq_v4i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11002,7 +11002,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v4i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -11010,7 +11010,7 @@ define zeroext i64 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11073,7 +11073,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v4i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -11081,7 +11081,7 @@ define zeroext i64 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11146,14 +11146,14 @@ entry:
define zeroext i64 @test_vpcmpeqq_v4i1_v64i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11198,7 +11198,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -11206,7 +11206,7 @@ define zeroext i64 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11273,7 +11273,7 @@ entry:
define zeroext i16 @test_vpcmpeqq_v8i1_v16i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -11281,7 +11281,7 @@ define zeroext i16 @test_vpcmpeqq_v8i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -11298,7 +11298,7 @@ entry:
define zeroext i16 @test_vpcmpeqq_v8i1_v16i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -11306,7 +11306,7 @@ define zeroext i16 @test_vpcmpeqq_v8i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rdi), %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -11324,7 +11324,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v8i1_v16i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -11333,7 +11333,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -11353,7 +11353,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v8i1_v16i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -11362,7 +11362,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpeqq (%rsi), %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -11384,7 +11384,7 @@ entry:
define zeroext i16 @test_vpcmpeqq_v8i1_v16i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -11392,7 +11392,7 @@ define zeroext i16 @test_vpcmpeqq_v8i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpeqq (%rdi){1to8}, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -11411,7 +11411,7 @@ entry:
define zeroext i16 @test_masked_vpcmpeqq_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -11420,7 +11420,7 @@ define zeroext i16 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpeqq (%rsi){1to8}, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -11443,14 +11443,14 @@ entry:
define zeroext i32 @test_vpcmpeqq_v8i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11514,14 +11514,14 @@ entry:
define zeroext i32 @test_vpcmpeqq_v8i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11586,7 +11586,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v8i1_v32i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -11594,7 +11594,7 @@ define zeroext i32 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11661,7 +11661,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v8i1_v32i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -11669,7 +11669,7 @@ define zeroext i32 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11738,14 +11738,14 @@ entry:
define zeroext i32 @test_vpcmpeqq_v8i1_v32i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11811,7 +11811,7 @@ entry:
define zeroext i32 @test_masked_vpcmpeqq_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -11819,7 +11819,7 @@ define zeroext i32 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11889,14 +11889,14 @@ entry:
define zeroext i64 @test_vpcmpeqq_v8i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -11965,14 +11965,14 @@ entry:
define zeroext i64 @test_vpcmpeqq_v8i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12042,7 +12042,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v8i1_v64i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -12050,7 +12050,7 @@ define zeroext i64 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12122,7 +12122,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v8i1_v64i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -12130,7 +12130,7 @@ define zeroext i64 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12204,14 +12204,14 @@ entry:
define zeroext i64 @test_vpcmpeqq_v8i1_v64i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpeqq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpeqq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpeqq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12282,7 +12282,7 @@ entry:
define zeroext i64 @test_masked_vpcmpeqq_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpeqq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpeqq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -12290,7 +12290,7 @@ define zeroext i64 @test_masked_vpcmpeqq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpeqq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12365,13 +12365,13 @@ entry:
define zeroext i32 @test_vpcmpsgtb_v16i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtb %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12483,13 +12483,13 @@ entry:
define zeroext i32 @test_vpcmpsgtb_v16i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtb (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12602,14 +12602,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtb_v16i1_v32i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12724,14 +12724,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtb_v16i1_v32i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtb (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12848,13 +12848,13 @@ entry:
define zeroext i64 @test_vpcmpsgtb_v16i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtb %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -12971,13 +12971,13 @@ entry:
define zeroext i64 @test_vpcmpsgtb_v16i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtb (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13095,14 +13095,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtb_v16i1_v64i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13222,14 +13222,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtb_v16i1_v64i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtb (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13351,14 +13351,14 @@ entry:
define zeroext i64 @test_vpcmpsgtb_v32i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtb %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13398,14 +13398,14 @@ entry:
define zeroext i64 @test_vpcmpsgtb_v32i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtb (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13446,7 +13446,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtb_v32i1_v64i1_mask(i32 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtb %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -13454,7 +13454,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13505,7 +13505,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtb_v32i1_v64i1_mask_mem(i32 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtb (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -13513,7 +13513,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13566,14 +13566,14 @@ entry:
define zeroext i16 @test_vpcmpsgtw_v8i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -13593,14 +13593,14 @@ entry:
define zeroext i16 @test_vpcmpsgtw_v8i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtw (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -13621,7 +13621,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtw_v8i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -13629,7 +13629,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -13652,7 +13652,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtw_v8i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -13660,7 +13660,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtw (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: vpmovsxwq %xmm0, %zmm0
; NoVLX-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -13685,13 +13685,13 @@ entry:
define zeroext i32 @test_vpcmpsgtw_v8i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13758,13 +13758,13 @@ entry:
define zeroext i32 @test_vpcmpsgtw_v8i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13832,14 +13832,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtw_v8i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13909,14 +13909,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtw_v8i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -13988,13 +13988,13 @@ entry:
define zeroext i64 @test_vpcmpsgtw_v8i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14066,13 +14066,13 @@ entry:
define zeroext i64 @test_vpcmpsgtw_v8i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14145,14 +14145,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtw_v8i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14227,14 +14227,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtw_v8i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14311,14 +14311,14 @@ entry:
define zeroext i32 @test_vpcmpsgtw_v16i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14430,14 +14430,14 @@ entry:
define zeroext i32 @test_vpcmpsgtw_v16i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14550,7 +14550,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtw_v16i1_v32i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -14558,7 +14558,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14673,7 +14673,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtw_v16i1_v32i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -14681,7 +14681,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14798,14 +14798,14 @@ entry:
define zeroext i64 @test_vpcmpsgtw_v16i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -14922,14 +14922,14 @@ entry:
define zeroext i64 @test_vpcmpsgtw_v16i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -15047,7 +15047,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtw_v16i1_v64i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -15055,7 +15055,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -15175,7 +15175,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtw_v16i1_v64i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -15183,7 +15183,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -15305,14 +15305,14 @@ entry:
define zeroext i64 @test_vpcmpsgtw_v32i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -15654,14 +15654,14 @@ entry:
define zeroext i64 @test_vpcmpsgtw_v32i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtw_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtw (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtw_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -15919,7 +15919,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtw_v32i1_v64i1_mask(i32 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -15927,7 +15927,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -16280,7 +16280,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtw_v32i1_v64i1_mask_mem(i32 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtw_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtw (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -16288,7 +16288,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtw_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -16558,14 +16558,14 @@ entry:
define zeroext i8 @test_vpcmpsgtd_v4i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -16614,14 +16614,14 @@ entry:
define zeroext i8 @test_vpcmpsgtd_v4i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -16671,7 +16671,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtd_v4i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -16679,7 +16679,7 @@ define zeroext i8 @test_masked_vpcmpsgtd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -16749,7 +16749,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtd_v4i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -16757,7 +16757,7 @@ define zeroext i8 @test_masked_vpcmpsgtd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -16829,14 +16829,14 @@ entry:
define zeroext i8 @test_vpcmpsgtd_v4i1_v8i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -16888,7 +16888,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtd_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -16896,7 +16896,7 @@ define zeroext i8 @test_masked_vpcmpsgtd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -16970,14 +16970,14 @@ entry:
define zeroext i16 @test_vpcmpsgtd_v4i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -17025,14 +17025,14 @@ entry:
define zeroext i16 @test_vpcmpsgtd_v4i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -17081,7 +17081,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtd_v4i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -17089,7 +17089,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -17158,7 +17158,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtd_v4i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -17166,7 +17166,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -17237,14 +17237,14 @@ entry:
define zeroext i16 @test_vpcmpsgtd_v4i1_v16i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -17295,7 +17295,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtd_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -17303,7 +17303,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -17376,13 +17376,13 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v4i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17417,13 +17417,13 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v4i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17459,14 +17459,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v4i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17522,14 +17522,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v4i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17587,13 +17587,13 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v4i1_v32i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17631,14 +17631,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17698,13 +17698,13 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v4i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17745,13 +17745,13 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v4i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17793,14 +17793,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v4i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17862,14 +17862,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v4i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17933,13 +17933,13 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v4i1_v64i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -17983,14 +17983,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18056,7 +18056,7 @@ entry:
define zeroext i16 @test_vpcmpsgtd_v8i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -18064,7 +18064,7 @@ define zeroext i16 @test_vpcmpsgtd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
@@ -18085,7 +18085,7 @@ entry:
define zeroext i16 @test_vpcmpsgtd_v8i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -18093,7 +18093,7 @@ define zeroext i16 @test_vpcmpsgtd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
@@ -18115,7 +18115,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtd_v8i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -18124,7 +18124,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: kmovw %edi, %k1
@@ -18148,7 +18148,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtd_v8i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -18157,7 +18157,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -18183,7 +18183,7 @@ entry:
define zeroext i16 @test_vpcmpsgtd_v8i1_v16i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -18191,7 +18191,7 @@ define zeroext i16 @test_vpcmpsgtd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
@@ -18214,7 +18214,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtd_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -18223,7 +18223,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -18250,14 +18250,14 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v8i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18323,14 +18323,14 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v8i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18397,7 +18397,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v8i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -18405,7 +18405,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18474,7 +18474,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v8i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -18482,7 +18482,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18553,14 +18553,14 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v8i1_v32i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18628,7 +18628,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -18636,7 +18636,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18708,14 +18708,14 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v8i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18786,14 +18786,14 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v8i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18865,7 +18865,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v8i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -18873,7 +18873,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -18947,7 +18947,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v8i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -18955,7 +18955,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19031,14 +19031,14 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v8i1_v64i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19111,7 +19111,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -19119,7 +19119,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19196,14 +19196,14 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v16i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19312,14 +19312,14 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v16i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19429,7 +19429,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v16i1_v32i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -19437,7 +19437,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19549,7 +19549,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v16i1_v32i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -19557,7 +19557,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19671,14 +19671,14 @@ entry:
define zeroext i32 @test_vpcmpsgtd_v16i1_v32i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19789,7 +19789,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtd_v16i1_v32i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -19797,7 +19797,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -19912,14 +19912,14 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v16i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -20033,14 +20033,14 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v16i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -20155,7 +20155,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v16i1_v64i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -20163,7 +20163,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -20280,7 +20280,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v16i1_v64i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -20288,7 +20288,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -20407,14 +20407,14 @@ entry:
define zeroext i64 @test_vpcmpsgtd_v16i1_v64i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtd_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtd (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtd_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -20530,7 +20530,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtd_v16i1_v64i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtd_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtd (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -20538,7 +20538,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtd_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -20658,14 +20658,14 @@ entry:
define zeroext i4 @test_vpcmpsgtq_v2i1_v4i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; NoVLX-NEXT: vpslld $31, %ymm0, %ymm0
@@ -20686,14 +20686,14 @@ entry:
define zeroext i4 @test_vpcmpsgtq_v2i1_v4i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; NoVLX-NEXT: vpslld $31, %ymm0, %ymm0
@@ -20715,7 +20715,7 @@ entry:
define zeroext i4 @test_masked_vpcmpsgtq_v2i1_v4i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -20723,7 +20723,7 @@ define zeroext i4 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -20757,7 +20757,7 @@ entry:
define zeroext i4 @test_masked_vpcmpsgtq_v2i1_v4i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -20765,7 +20765,7 @@ define zeroext i4 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -20801,14 +20801,14 @@ entry:
define zeroext i4 @test_vpcmpsgtq_v2i1_v4i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
@@ -20832,7 +20832,7 @@ entry:
define zeroext i4 @test_masked_vpcmpsgtq_v2i1_v4i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -20840,7 +20840,7 @@ define zeroext i4 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -20878,14 +20878,14 @@ entry:
define zeroext i8 @test_vpcmpsgtq_v2i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -20918,14 +20918,14 @@ entry:
define zeroext i8 @test_vpcmpsgtq_v2i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -20959,7 +20959,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtq_v2i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -20967,7 +20967,7 @@ define zeroext i8 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -21013,7 +21013,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtq_v2i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -21021,7 +21021,7 @@ define zeroext i8 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -21069,14 +21069,14 @@ entry:
define zeroext i8 @test_vpcmpsgtq_v2i1_v8i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
@@ -21112,7 +21112,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtq_v2i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -21120,7 +21120,7 @@ define zeroext i8 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -21170,14 +21170,14 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v2i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -21209,14 +21209,14 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v2i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -21249,7 +21249,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v2i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -21257,7 +21257,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -21302,7 +21302,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v2i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -21310,7 +21310,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rsi), %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -21357,14 +21357,14 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v2i1_v16i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
@@ -21399,7 +21399,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v2i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -21407,7 +21407,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -21456,13 +21456,13 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v2i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21497,13 +21497,13 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v2i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21539,14 +21539,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v2i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21594,14 +21594,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v2i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21651,13 +21651,13 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v2i1_v32i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21695,14 +21695,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v2i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21754,13 +21754,13 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v2i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21801,13 +21801,13 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v2i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21849,14 +21849,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v2i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21910,14 +21910,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v2i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -21973,13 +21973,13 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v2i1_v64i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -22023,14 +22023,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v2i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -22088,7 +22088,7 @@ entry:
define zeroext i8 @test_vpcmpsgtq_v4i1_v8i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -22096,7 +22096,7 @@ define zeroext i8 @test_vpcmpsgtq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -22146,7 +22146,7 @@ entry:
define zeroext i8 @test_vpcmpsgtq_v4i1_v8i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -22154,7 +22154,7 @@ define zeroext i8 @test_vpcmpsgtq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rdi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -22205,7 +22205,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtq_v4i1_v8i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -22214,7 +22214,7 @@ define zeroext i8 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -22285,7 +22285,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtq_v4i1_v8i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -22294,7 +22294,7 @@ define zeroext i8 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rsi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -22367,7 +22367,7 @@ entry:
define zeroext i8 @test_vpcmpsgtq_v4i1_v8i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -22375,7 +22375,7 @@ define zeroext i8 @test_vpcmpsgtq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -22428,7 +22428,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgtq_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -22437,7 +22437,7 @@ define zeroext i8 @test_masked_vpcmpsgtq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -22512,7 +22512,7 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v4i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -22520,7 +22520,7 @@ define zeroext i16 @test_vpcmpsgtq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -22569,7 +22569,7 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v4i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -22577,7 +22577,7 @@ define zeroext i16 @test_vpcmpsgtq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rdi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -22627,7 +22627,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v4i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -22636,7 +22636,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -22706,7 +22706,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v4i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -22715,7 +22715,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rsi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -22787,7 +22787,7 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v4i1_v16i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -22795,7 +22795,7 @@ define zeroext i16 @test_vpcmpsgtq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -22847,7 +22847,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -22856,7 +22856,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -22930,14 +22930,14 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v4i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -22973,14 +22973,14 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v4i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23017,7 +23017,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v4i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -23025,7 +23025,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23082,7 +23082,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v4i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -23090,7 +23090,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23149,14 +23149,14 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v4i1_v32i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23195,7 +23195,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -23203,7 +23203,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23264,14 +23264,14 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v4i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23313,14 +23313,14 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v4i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23363,7 +23363,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v4i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -23371,7 +23371,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23434,7 +23434,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v4i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -23442,7 +23442,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23507,14 +23507,14 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v4i1_v64i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23559,7 +23559,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -23567,7 +23567,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23634,7 +23634,7 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v8i1_v16i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -23642,7 +23642,7 @@ define zeroext i16 @test_vpcmpsgtq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -23659,7 +23659,7 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v8i1_v16i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -23667,7 +23667,7 @@ define zeroext i16 @test_vpcmpsgtq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rdi), %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -23685,7 +23685,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v8i1_v16i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -23694,7 +23694,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -23714,7 +23714,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v8i1_v16i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -23723,7 +23723,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpgtq (%rsi), %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -23745,7 +23745,7 @@ entry:
define zeroext i16 @test_vpcmpsgtq_v8i1_v16i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -23753,7 +23753,7 @@ define zeroext i16 @test_vpcmpsgtq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq (%rdi){1to8}, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -23772,7 +23772,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgtq_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -23781,7 +23781,7 @@ define zeroext i16 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpgtq (%rsi){1to8}, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -23804,14 +23804,14 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v8i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23875,14 +23875,14 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v8i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -23947,7 +23947,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v8i1_v32i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -23955,7 +23955,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24022,7 +24022,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v8i1_v32i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -24030,7 +24030,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24099,14 +24099,14 @@ entry:
define zeroext i32 @test_vpcmpsgtq_v8i1_v32i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24172,7 +24172,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgtq_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -24180,7 +24180,7 @@ define zeroext i32 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24250,14 +24250,14 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v8i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24326,14 +24326,14 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v8i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24403,7 +24403,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v8i1_v64i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -24411,7 +24411,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24483,7 +24483,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v8i1_v64i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -24491,7 +24491,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24565,14 +24565,14 @@ entry:
define zeroext i64 @test_vpcmpsgtq_v8i1_v64i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgtq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpgtq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgtq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24643,7 +24643,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgtq_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgtq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpgtq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -24651,7 +24651,7 @@ define zeroext i64 @test_masked_vpcmpsgt
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgtq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24726,13 +24726,13 @@ entry:
define zeroext i32 @test_vpcmpsgeb_v16i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleb %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24846,13 +24846,13 @@ entry:
define zeroext i32 @test_vpcmpsgeb_v16i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltb (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -24968,14 +24968,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeb_v16i1_v32i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleb %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25092,14 +25092,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeb_v16i1_v32i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltb (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25219,13 +25219,13 @@ entry:
define zeroext i64 @test_vpcmpsgeb_v16i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleb %xmm0, %xmm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25344,13 +25344,13 @@ entry:
define zeroext i64 @test_vpcmpsgeb_v16i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltb (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25471,14 +25471,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeb_v16i1_v64i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleb %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25600,14 +25600,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeb_v16i1_v64i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltb (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25732,14 +25732,14 @@ entry:
define zeroext i64 @test_vpcmpsgeb_v32i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleb %ymm0, %ymm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25781,14 +25781,14 @@ entry:
define zeroext i64 @test_vpcmpsgeb_v32i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltb (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25832,7 +25832,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeb_v32i1_v64i1_mask(i32 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleb %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -25840,7 +25840,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25893,7 +25893,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeb_v32i1_v64i1_mask_mem(i32 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltb (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -25901,7 +25901,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -25957,14 +25957,14 @@ entry:
define zeroext i16 @test_vpcmpsgew_v8i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmplew %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
@@ -25986,14 +25986,14 @@ entry:
define zeroext i16 @test_vpcmpsgew_v8i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -26017,7 +26017,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgew_v8i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmplew %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -26025,7 +26025,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
@@ -26050,7 +26050,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgew_v8i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -26058,7 +26058,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtw %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -26086,13 +26086,13 @@ entry:
define zeroext i32 @test_vpcmpsgew_v8i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmplew %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26161,13 +26161,13 @@ entry:
define zeroext i32 @test_vpcmpsgew_v8i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26238,14 +26238,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgew_v8i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmplew %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26317,14 +26317,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgew_v8i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26399,13 +26399,13 @@ entry:
define zeroext i64 @test_vpcmpsgew_v8i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmplew %xmm0, %xmm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26479,13 +26479,13 @@ entry:
define zeroext i64 @test_vpcmpsgew_v8i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26561,14 +26561,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgew_v8i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmplew %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26645,14 +26645,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgew_v8i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26732,14 +26732,14 @@ entry:
define zeroext i32 @test_vpcmpsgew_v16i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmplew %ymm0, %ymm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26853,14 +26853,14 @@ entry:
define zeroext i32 @test_vpcmpsgew_v16i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -26976,7 +26976,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgew_v16i1_v32i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmplew %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -26984,7 +26984,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -27101,7 +27101,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgew_v16i1_v32i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -27109,7 +27109,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -27229,14 +27229,14 @@ entry:
define zeroext i64 @test_vpcmpsgew_v16i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmplew %ymm0, %ymm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -27355,14 +27355,14 @@ entry:
define zeroext i64 @test_vpcmpsgew_v16i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -27483,7 +27483,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgew_v16i1_v64i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmplew %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -27491,7 +27491,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -27613,7 +27613,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgew_v16i1_v64i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -27621,7 +27621,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -27746,14 +27746,14 @@ entry:
define zeroext i64 @test_vpcmpsgew_v32i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmplew %zmm0, %zmm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -28098,14 +28098,14 @@ entry:
define zeroext i64 @test_vpcmpsgew_v32i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgew_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltw (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgew_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -28368,7 +28368,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgew_v32i1_v64i1_mask(i32 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmplew %zmm0, %zmm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -28376,7 +28376,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -28732,7 +28732,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgew_v32i1_v64i1_mask_mem(i32 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgew_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltw (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -28740,7 +28740,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgew_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -29015,14 +29015,14 @@ entry:
define zeroext i8 @test_vpcmpsged_v4i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
@@ -29073,14 +29073,14 @@ entry:
define zeroext i8 @test_vpcmpsged_v4i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -29133,7 +29133,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsged_v4i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -29141,7 +29141,7 @@ define zeroext i8 @test_masked_vpcmpsged
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -29211,7 +29211,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsged_v4i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -29219,7 +29219,7 @@ define zeroext i8 @test_masked_vpcmpsged
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -29292,14 +29292,14 @@ entry:
define zeroext i8 @test_vpcmpsged_v4i1_v8i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -29353,7 +29353,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsged_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -29361,7 +29361,7 @@ define zeroext i8 @test_masked_vpcmpsged
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -29435,14 +29435,14 @@ entry:
define zeroext i16 @test_vpcmpsged_v4i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
@@ -29492,14 +29492,14 @@ entry:
define zeroext i16 @test_vpcmpsged_v4i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -29551,7 +29551,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsged_v4i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -29559,7 +29559,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $12, %k0, %k1
@@ -29628,7 +29628,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsged_v4i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -29636,7 +29636,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -29708,14 +29708,14 @@ entry:
define zeroext i16 @test_vpcmpsged_v4i1_v16i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -29768,7 +29768,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsged_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -29776,7 +29776,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtd %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -29849,13 +29849,13 @@ entry:
define zeroext i32 @test_vpcmpsged_v4i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -29892,13 +29892,13 @@ entry:
define zeroext i32 @test_vpcmpsged_v4i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -29937,14 +29937,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v4i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30000,14 +30000,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v4i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30066,13 +30066,13 @@ entry:
define zeroext i32 @test_vpcmpsged_v4i1_v32i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30112,14 +30112,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30179,13 +30179,13 @@ entry:
define zeroext i64 @test_vpcmpsged_v4i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30228,13 +30228,13 @@ entry:
define zeroext i64 @test_vpcmpsged_v4i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30279,14 +30279,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v4i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30348,14 +30348,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v4i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30420,13 +30420,13 @@ entry:
define zeroext i64 @test_vpcmpsged_v4i1_v64i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30472,14 +30472,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30545,7 +30545,7 @@ entry:
define zeroext i16 @test_vpcmpsged_v8i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %ymm0, %ymm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -30553,7 +30553,7 @@ define zeroext i16 @test_vpcmpsged_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpcmpled %zmm0, %zmm1, %k0
@@ -30574,7 +30574,7 @@ entry:
define zeroext i16 @test_vpcmpsged_v8i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -30582,7 +30582,7 @@ define zeroext i16 @test_vpcmpsged_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rdi), %ymm1
; NoVLX-NEXT: vpcmpled %zmm0, %zmm1, %k0
@@ -30604,7 +30604,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsged_v8i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -30613,7 +30613,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: kmovw %edi, %k1
@@ -30637,7 +30637,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsged_v8i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -30646,7 +30646,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -30672,7 +30672,7 @@ entry:
define zeroext i16 @test_vpcmpsged_v8i1_v16i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -30680,7 +30680,7 @@ define zeroext i16 @test_vpcmpsged_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rdi), %ymm1
; NoVLX-NEXT: vpcmpled %zmm0, %zmm1, %k0
@@ -30703,7 +30703,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsged_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -30712,7 +30712,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -30739,14 +30739,14 @@ entry:
define zeroext i32 @test_vpcmpsged_v8i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %ymm0, %ymm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30812,14 +30812,14 @@ entry:
define zeroext i32 @test_vpcmpsged_v8i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30886,7 +30886,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v8i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -30894,7 +30894,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -30963,7 +30963,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v8i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -30971,7 +30971,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31042,14 +31042,14 @@ entry:
define zeroext i32 @test_vpcmpsged_v8i1_v32i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31117,7 +31117,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -31125,7 +31125,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31197,14 +31197,14 @@ entry:
define zeroext i64 @test_vpcmpsged_v8i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %ymm0, %ymm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31275,14 +31275,14 @@ entry:
define zeroext i64 @test_vpcmpsged_v8i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31354,7 +31354,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v8i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -31362,7 +31362,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31436,7 +31436,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v8i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -31444,7 +31444,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31520,14 +31520,14 @@ entry:
define zeroext i64 @test_vpcmpsged_v8i1_v64i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31600,7 +31600,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -31608,7 +31608,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31685,14 +31685,14 @@ entry:
define zeroext i32 @test_vpcmpsged_v16i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %zmm0, %zmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31801,14 +31801,14 @@ entry:
define zeroext i32 @test_vpcmpsged_v16i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -31918,7 +31918,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v16i1_v32i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %zmm0, %zmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -31926,7 +31926,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32038,7 +32038,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v16i1_v32i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -32046,7 +32046,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32160,14 +32160,14 @@ entry:
define zeroext i32 @test_vpcmpsged_v16i1_v32i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32278,7 +32278,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsged_v16i1_v32i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -32286,7 +32286,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32401,14 +32401,14 @@ entry:
define zeroext i64 @test_vpcmpsged_v16i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpled %zmm0, %zmm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32522,14 +32522,14 @@ entry:
define zeroext i64 @test_vpcmpsged_v16i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32644,7 +32644,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v16i1_v64i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpled %zmm0, %zmm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -32652,7 +32652,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32769,7 +32769,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v16i1_v64i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -32777,7 +32777,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -32896,14 +32896,14 @@ entry:
define zeroext i64 @test_vpcmpsged_v16i1_v64i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsged_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltd (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsged_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -33019,7 +33019,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsged_v16i1_v64i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsged_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltd (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -33027,7 +33027,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsged_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -33147,14 +33147,14 @@ entry:
define zeroext i4 @test_vpcmpsgeq_v2i1_v4i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
@@ -33177,14 +33177,14 @@ entry:
define zeroext i4 @test_vpcmpsgeq_v2i1_v4i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -33209,7 +33209,7 @@ entry:
define zeroext i4 @test_masked_vpcmpsgeq_v2i1_v4i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -33217,7 +33217,7 @@ define zeroext i4 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -33251,7 +33251,7 @@ entry:
define zeroext i4 @test_masked_vpcmpsgeq_v2i1_v4i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -33259,7 +33259,7 @@ define zeroext i4 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -33296,14 +33296,14 @@ entry:
define zeroext i4 @test_vpcmpsgeq_v2i1_v4i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -33329,7 +33329,7 @@ entry:
define zeroext i4 @test_masked_vpcmpsgeq_v2i1_v4i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -33337,7 +33337,7 @@ define zeroext i4 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -33375,14 +33375,14 @@ entry:
define zeroext i8 @test_vpcmpsgeq_v2i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
@@ -33417,14 +33417,14 @@ entry:
define zeroext i8 @test_vpcmpsgeq_v2i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -33461,7 +33461,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgeq_v2i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -33469,7 +33469,7 @@ define zeroext i8 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -33515,7 +33515,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgeq_v2i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -33523,7 +33523,7 @@ define zeroext i8 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -33572,14 +33572,14 @@ entry:
define zeroext i8 @test_vpcmpsgeq_v2i1_v8i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -33617,7 +33617,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgeq_v2i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -33625,7 +33625,7 @@ define zeroext i8 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -33675,14 +33675,14 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v2i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
@@ -33716,14 +33716,14 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v2i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -33759,7 +33759,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v2i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -33767,7 +33767,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
; NoVLX-NEXT: kshiftlw $15, %k0, %k1
@@ -33812,7 +33812,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v2i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -33820,7 +33820,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -33868,14 +33868,14 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v2i1_v16i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
@@ -33912,7 +33912,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v2i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -33920,7 +33920,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm0
; NoVLX-NEXT: kmovw %edi, %k0
@@ -33969,13 +33969,13 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v2i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34012,13 +34012,13 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v2i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34057,14 +34057,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v2i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34112,14 +34112,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v2i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34170,13 +34170,13 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v2i1_v32i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34216,14 +34216,14 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v2i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34275,13 +34275,13 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v2i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34324,13 +34324,13 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v2i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34375,14 +34375,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v2i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %xmm0, %xmm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34436,14 +34436,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v2i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34500,13 +34500,13 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v2i1_v64i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34552,14 +34552,14 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v2i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -34617,7 +34617,7 @@ entry:
define zeroext i8 @test_vpcmpsgeq_v4i1_v8i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -34625,7 +34625,7 @@ define zeroext i8 @test_vpcmpsgeq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
@@ -34677,7 +34677,7 @@ entry:
define zeroext i8 @test_vpcmpsgeq_v4i1_v8i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -34685,7 +34685,7 @@ define zeroext i8 @test_vpcmpsgeq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -34739,7 +34739,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgeq_v4i1_v8i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -34748,7 +34748,7 @@ define zeroext i8 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
@@ -34821,7 +34821,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgeq_v4i1_v8i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -34830,7 +34830,7 @@ define zeroext i8 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -34906,7 +34906,7 @@ entry:
define zeroext i8 @test_vpcmpsgeq_v4i1_v8i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -34914,7 +34914,7 @@ define zeroext i8 @test_vpcmpsgeq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -34969,7 +34969,7 @@ entry:
define zeroext i8 @test_masked_vpcmpsgeq_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -34978,7 +34978,7 @@ define zeroext i8 @test_masked_vpcmpsgeq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -35055,7 +35055,7 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v4i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -35063,7 +35063,7 @@ define zeroext i16 @test_vpcmpsgeq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
@@ -35114,7 +35114,7 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v4i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -35122,7 +35122,7 @@ define zeroext i16 @test_vpcmpsgeq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -35175,7 +35175,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v4i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -35184,7 +35184,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
@@ -35256,7 +35256,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v4i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -35265,7 +35265,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa (%rsi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -35340,7 +35340,7 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v4i1_v16i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -35348,7 +35348,7 @@ define zeroext i16 @test_vpcmpsgeq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -35402,7 +35402,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -35411,7 +35411,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm0
; NoVLX-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1
@@ -35487,14 +35487,14 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v4i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35532,14 +35532,14 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v4i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35579,7 +35579,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v4i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -35587,7 +35587,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35646,7 +35646,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v4i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -35654,7 +35654,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35716,14 +35716,14 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v4i1_v32i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35764,7 +35764,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -35772,7 +35772,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35835,14 +35835,14 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v4i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35886,14 +35886,14 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v4i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -35939,7 +35939,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v4i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %ymm0, %ymm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -35947,7 +35947,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36012,7 +36012,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v4i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -36020,7 +36020,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36088,14 +36088,14 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v4i1_v64i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36142,7 +36142,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -36150,7 +36150,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36219,7 +36219,7 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v8i1_v16i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -36227,7 +36227,7 @@ define zeroext i16 @test_vpcmpsgeq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -36244,7 +36244,7 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v8i1_v16i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -36252,7 +36252,7 @@ define zeroext i16 @test_vpcmpsgeq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpnltq (%rdi), %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -36270,7 +36270,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v8i1_v16i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -36279,7 +36279,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -36299,7 +36299,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v8i1_v16i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -36308,7 +36308,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpnltq (%rsi), %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -36330,7 +36330,7 @@ entry:
define zeroext i16 @test_vpcmpsgeq_v8i1_v16i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -36338,7 +36338,7 @@ define zeroext i16 @test_vpcmpsgeq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpnltq (%rdi){1to8}, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -36357,7 +36357,7 @@ entry:
define zeroext i16 @test_masked_vpcmpsgeq_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -36366,7 +36366,7 @@ define zeroext i16 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpnltq (%rsi){1to8}, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -36389,14 +36389,14 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v8i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36460,14 +36460,14 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v8i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36532,7 +36532,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v8i1_v32i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -36540,7 +36540,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36607,7 +36607,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v8i1_v32i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -36615,7 +36615,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36684,14 +36684,14 @@ entry:
define zeroext i32 @test_vpcmpsgeq_v8i1_v32i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36757,7 +36757,7 @@ entry:
define zeroext i32 @test_masked_vpcmpsgeq_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -36765,7 +36765,7 @@ define zeroext i32 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36835,14 +36835,14 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v8i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36911,14 +36911,14 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v8i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -36988,7 +36988,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v8i1_v64i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpleq %zmm0, %zmm1, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -36996,7 +36996,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37068,7 +37068,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v8i1_v64i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -37076,7 +37076,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37150,14 +37150,14 @@ entry:
define zeroext i64 @test_vpcmpsgeq_v8i1_v64i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpsgeq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpnltq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpsgeq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37228,7 +37228,7 @@ entry:
define zeroext i64 @test_masked_vpcmpsgeq_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpsgeq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpnltq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -37236,7 +37236,7 @@ define zeroext i64 @test_masked_vpcmpsge
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpsgeq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37311,13 +37311,13 @@ entry:
define zeroext i32 @test_vpcmpultb_v16i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltub %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37432,13 +37432,13 @@ entry:
define zeroext i32 @test_vpcmpultb_v16i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltub (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37554,14 +37554,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultb_v16i1_v32i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultb_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltub %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultb_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37679,14 +37679,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultb_v16i1_v32i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultb_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltub (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultb_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37806,13 +37806,13 @@ entry:
define zeroext i64 @test_vpcmpultb_v16i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltub %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -37932,13 +37932,13 @@ entry:
define zeroext i64 @test_vpcmpultb_v16i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltub (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38059,14 +38059,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultb_v16i1_v64i1_mask(i16 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultb_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltub %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultb_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38189,14 +38189,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultb_v16i1_v64i1_mask_mem(i16 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultb_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltub (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultb_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38321,14 +38321,14 @@ entry:
define zeroext i64 @test_vpcmpultb_v32i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltub %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38371,14 +38371,14 @@ entry:
define zeroext i64 @test_vpcmpultb_v32i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltub (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38422,7 +38422,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultb_v32i1_v64i1_mask(i32 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultb_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltub %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -38430,7 +38430,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultb_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38484,7 +38484,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultb_v32i1_v64i1_mask_mem(i32 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultb_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltub (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -38492,7 +38492,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultb_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38548,14 +38548,14 @@ entry:
define zeroext i16 @test_vpcmpultw_v8i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -38578,14 +38578,14 @@ entry:
define zeroext i16 @test_vpcmpultw_v8i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [32768,32768,32768,32768,32768,32768,32768,32768]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rdi), %xmm1, %xmm1
@@ -38609,7 +38609,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultw_v8i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -38617,7 +38617,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -38643,7 +38643,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultw_v8i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -38651,7 +38651,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [32768,32768,32768,32768,32768,32768,32768,32768]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rsi), %xmm1, %xmm1
@@ -38679,13 +38679,13 @@ entry:
define zeroext i32 @test_vpcmpultw_v8i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38755,13 +38755,13 @@ entry:
define zeroext i32 @test_vpcmpultw_v8i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38832,14 +38832,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultw_v8i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38912,14 +38912,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultw_v8i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -38994,13 +38994,13 @@ entry:
define zeroext i64 @test_vpcmpultw_v8i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39075,13 +39075,13 @@ entry:
define zeroext i64 @test_vpcmpultw_v8i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39157,14 +39157,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultw_v8i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39242,14 +39242,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultw_v8i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39329,14 +39329,14 @@ entry:
define zeroext i32 @test_vpcmpultw_v16i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39451,14 +39451,14 @@ entry:
define zeroext i32 @test_vpcmpultw_v16i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39574,7 +39574,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultw_v16i1_v32i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -39582,7 +39582,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39700,7 +39700,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultw_v16i1_v32i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -39708,7 +39708,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39828,14 +39828,14 @@ entry:
define zeroext i64 @test_vpcmpultw_v16i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -39955,14 +39955,14 @@ entry:
define zeroext i64 @test_vpcmpultw_v16i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -40083,7 +40083,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultw_v16i1_v64i1_mask(i16 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -40091,7 +40091,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -40214,7 +40214,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultw_v16i1_v64i1_mask_mem(i16 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -40222,7 +40222,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -40347,14 +40347,14 @@ entry:
define zeroext i64 @test_vpcmpultw_v32i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -40701,14 +40701,14 @@ entry:
define zeroext i64 @test_vpcmpultw_v32i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultw_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuw (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultw_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -40971,7 +40971,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultw_v32i1_v64i1_mask(i32 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v32i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -40979,7 +40979,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v32i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -41337,7 +41337,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultw_v32i1_v64i1_mask_mem(i32 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultw_v32i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuw (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -41345,7 +41345,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultw_v32i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -41620,14 +41620,14 @@ entry:
define zeroext i8 @test_vpcmpultd_v4i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -41679,14 +41679,14 @@ entry:
define zeroext i8 @test_vpcmpultd_v4i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rdi), %xmm1, %xmm1
@@ -41739,7 +41739,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultd_v4i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -41747,7 +41747,7 @@ define zeroext i8 @test_masked_vpcmpultd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -41820,7 +41820,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultd_v4i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -41828,7 +41828,7 @@ define zeroext i8 @test_masked_vpcmpultd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rsi), %xmm1, %xmm1
@@ -41903,14 +41903,14 @@ entry:
define zeroext i8 @test_vpcmpultd_v4i1_v8i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -41965,7 +41965,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultd_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -41973,7 +41973,7 @@ define zeroext i8 @test_masked_vpcmpultd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -42050,14 +42050,14 @@ entry:
define zeroext i16 @test_vpcmpultd_v4i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -42108,14 +42108,14 @@ entry:
define zeroext i16 @test_vpcmpultd_v4i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rdi), %xmm1, %xmm1
@@ -42167,7 +42167,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultd_v4i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -42175,7 +42175,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -42247,7 +42247,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultd_v4i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -42255,7 +42255,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm1 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rsi), %xmm1, %xmm1
@@ -42329,14 +42329,14 @@ entry:
define zeroext i16 @test_vpcmpultd_v4i1_v16i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rdi), %xmm1
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -42390,7 +42390,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultd_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -42398,7 +42398,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastd (%rsi), %xmm1
; NoVLX-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -42474,13 +42474,13 @@ entry:
define zeroext i32 @test_vpcmpultd_v4i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42518,13 +42518,13 @@ entry:
define zeroext i32 @test_vpcmpultd_v4i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42563,14 +42563,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v4i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42629,14 +42629,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v4i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42697,13 +42697,13 @@ entry:
define zeroext i32 @test_vpcmpultd_v4i1_v32i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42744,14 +42744,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42814,13 +42814,13 @@ entry:
define zeroext i64 @test_vpcmpultd_v4i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42864,13 +42864,13 @@ entry:
define zeroext i64 @test_vpcmpultd_v4i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42915,14 +42915,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v4i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -42987,14 +42987,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v4i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43061,13 +43061,13 @@ entry:
define zeroext i64 @test_vpcmpultd_v4i1_v64i1_mask_mem_b(<2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43114,14 +43114,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to4}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43190,7 +43190,7 @@ entry:
define zeroext i16 @test_vpcmpultd_v8i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -43198,7 +43198,7 @@ define zeroext i16 @test_vpcmpultd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0
@@ -43219,7 +43219,7 @@ entry:
define zeroext i16 @test_vpcmpultd_v8i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -43227,7 +43227,7 @@ define zeroext i16 @test_vpcmpultd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rdi), %ymm1
; NoVLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0
@@ -43249,7 +43249,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultd_v8i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -43258,7 +43258,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: kmovw %edi, %k1
@@ -43282,7 +43282,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultd_v8i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -43291,7 +43291,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovdqa (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -43317,7 +43317,7 @@ entry:
define zeroext i16 @test_vpcmpultd_v8i1_v16i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -43325,7 +43325,7 @@ define zeroext i16 @test_vpcmpultd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rdi), %ymm1
; NoVLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0
@@ -43348,7 +43348,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultd_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -43357,7 +43357,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vpbroadcastd (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -43384,14 +43384,14 @@ entry:
define zeroext i32 @test_vpcmpultd_v8i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43457,14 +43457,14 @@ entry:
define zeroext i32 @test_vpcmpultd_v8i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43531,7 +43531,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v8i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -43539,7 +43539,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43608,7 +43608,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v8i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -43616,7 +43616,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43687,14 +43687,14 @@ entry:
define zeroext i32 @test_vpcmpultd_v8i1_v32i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43762,7 +43762,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -43770,7 +43770,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43842,14 +43842,14 @@ entry:
define zeroext i64 @test_vpcmpultd_v8i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43920,14 +43920,14 @@ entry:
define zeroext i64 @test_vpcmpultd_v8i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -43999,7 +43999,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v8i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -44007,7 +44007,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44081,7 +44081,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v8i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -44089,7 +44089,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44165,14 +44165,14 @@ entry:
define zeroext i64 @test_vpcmpultd_v8i1_v64i1_mask_mem_b(<4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44245,7 +44245,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -44253,7 +44253,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44330,14 +44330,14 @@ entry:
define zeroext i32 @test_vpcmpultd_v16i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44446,14 +44446,14 @@ entry:
define zeroext i32 @test_vpcmpultd_v16i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44563,7 +44563,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v16i1_v32i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -44571,7 +44571,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44683,7 +44683,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v16i1_v32i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -44691,7 +44691,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44805,14 +44805,14 @@ entry:
define zeroext i32 @test_vpcmpultd_v16i1_v32i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -44923,7 +44923,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultd_v16i1_v32i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -44931,7 +44931,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -45046,14 +45046,14 @@ entry:
define zeroext i64 @test_vpcmpultd_v16i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -45167,14 +45167,14 @@ entry:
define zeroext i64 @test_vpcmpultd_v16i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -45289,7 +45289,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v16i1_v64i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -45297,7 +45297,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -45414,7 +45414,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v16i1_v64i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -45422,7 +45422,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -45541,14 +45541,14 @@ entry:
define zeroext i64 @test_vpcmpultd_v16i1_v64i1_mask_mem_b(<8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultd_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltud (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultd_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -45664,7 +45664,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultd_v16i1_v64i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, i32* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultd_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltud (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -45672,7 +45672,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultd_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -45792,14 +45792,14 @@ entry:
define zeroext i4 @test_vpcmpultq_v2i1_v4i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -45823,14 +45823,14 @@ entry:
define zeroext i4 @test_vpcmpultq_v2i1_v4i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rdi), %xmm1, %xmm1
@@ -45855,7 +45855,7 @@ entry:
define zeroext i4 @test_masked_vpcmpultq_v2i1_v4i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -45863,7 +45863,7 @@ define zeroext i4 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -45900,7 +45900,7 @@ entry:
define zeroext i4 @test_masked_vpcmpultq_v2i1_v4i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -45908,7 +45908,7 @@ define zeroext i4 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rsi), %xmm1, %xmm1
@@ -45947,14 +45947,14 @@ entry:
define zeroext i4 @test_vpcmpultq_v2i1_v4i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -45981,7 +45981,7 @@ entry:
define zeroext i4 @test_masked_vpcmpultq_v2i1_v4i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
@@ -45989,7 +45989,7 @@ define zeroext i4 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -46030,14 +46030,14 @@ entry:
define zeroext i8 @test_vpcmpultq_v2i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -46073,14 +46073,14 @@ entry:
define zeroext i8 @test_vpcmpultq_v2i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rdi), %xmm1, %xmm1
@@ -46117,7 +46117,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultq_v2i1_v8i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -46125,7 +46125,7 @@ define zeroext i8 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -46174,7 +46174,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultq_v2i1_v8i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -46182,7 +46182,7 @@ define zeroext i8 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rsi), %xmm1, %xmm1
@@ -46233,14 +46233,14 @@ entry:
define zeroext i8 @test_vpcmpultq_v2i1_v8i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -46279,7 +46279,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultq_v2i1_v8i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -46287,7 +46287,7 @@ define zeroext i8 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -46340,14 +46340,14 @@ entry:
define zeroext i16 @test_vpcmpultq_v2i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -46382,14 +46382,14 @@ entry:
define zeroext i16 @test_vpcmpultq_v2i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rdi), %xmm1, %xmm1
@@ -46425,7 +46425,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v2i1_v16i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -46433,7 +46433,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
; NoVLX-NEXT: vpxor %xmm2, %xmm1, %xmm1
@@ -46481,7 +46481,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v2i1_v16i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -46489,7 +46489,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm1 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpxor (%rsi), %xmm1, %xmm1
@@ -46539,14 +46539,14 @@ entry:
define zeroext i16 @test_vpcmpultq_v2i1_v16i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %xmm1
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -46584,7 +46584,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v2i1_v16i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -46592,7 +46592,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %xmm1
; NoVLX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %xmm2, %xmm0, %xmm0
@@ -46644,13 +46644,13 @@ entry:
define zeroext i32 @test_vpcmpultq_v2i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -46688,13 +46688,13 @@ entry:
define zeroext i32 @test_vpcmpultq_v2i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -46733,14 +46733,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v2i1_v32i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -46791,14 +46791,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v2i1_v32i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -46851,13 +46851,13 @@ entry:
define zeroext i32 @test_vpcmpultq_v2i1_v32i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -46898,14 +46898,14 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v2i1_v32i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -46960,13 +46960,13 @@ entry:
define zeroext i64 @test_vpcmpultq_v2i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -47010,13 +47010,13 @@ entry:
define zeroext i64 @test_vpcmpultq_v2i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -47061,14 +47061,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v2i1_v64i1_mask(i8 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %xmm1, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -47125,14 +47125,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v2i1_v64i1_mask_mem(i8 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -47191,13 +47191,13 @@ entry:
define zeroext i64 @test_vpcmpultq_v2i1_v64i1_mask_mem_b(<2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -47244,14 +47244,14 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v2i1_v64i1_mask_mem_b(i8 zeroext %__u, <2 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to2}, %xmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -47312,7 +47312,7 @@ entry:
define zeroext i8 @test_vpcmpultq_v4i1_v8i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -47320,7 +47320,7 @@ define zeroext i8 @test_vpcmpultq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
; NoVLX-NEXT: vpxor %ymm2, %ymm1, %ymm1
@@ -47373,7 +47373,7 @@ entry:
define zeroext i8 @test_vpcmpultq_v4i1_v8i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -47381,7 +47381,7 @@ define zeroext i8 @test_vpcmpultq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm1 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpxor (%rdi), %ymm1, %ymm1
@@ -47435,7 +47435,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultq_v4i1_v8i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -47444,7 +47444,7 @@ define zeroext i8 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
; NoVLX-NEXT: vpxor %ymm2, %ymm1, %ymm1
@@ -47518,7 +47518,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultq_v4i1_v8i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -47527,7 +47527,7 @@ define zeroext i8 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm1 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpxor (%rsi), %ymm1, %ymm1
@@ -47603,7 +47603,7 @@ entry:
define zeroext i8 @test_vpcmpultq_v4i1_v8i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -47611,7 +47611,7 @@ define zeroext i8 @test_vpcmpultq_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
@@ -47667,7 +47667,7 @@ entry:
define zeroext i8 @test_masked_vpcmpultq_v4i1_v8i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -47676,7 +47676,7 @@ define zeroext i8 @test_masked_vpcmpultq
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
@@ -47754,7 +47754,7 @@ entry:
define zeroext i16 @test_vpcmpultq_v4i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -47762,7 +47762,7 @@ define zeroext i16 @test_vpcmpultq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
; NoVLX-NEXT: vpxor %ymm2, %ymm1, %ymm1
@@ -47814,7 +47814,7 @@ entry:
define zeroext i16 @test_vpcmpultq_v4i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -47822,7 +47822,7 @@ define zeroext i16 @test_vpcmpultq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm1 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpxor (%rdi), %ymm1, %ymm1
@@ -47875,7 +47875,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v4i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -47884,7 +47884,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
; NoVLX-NEXT: vpxor %ymm2, %ymm1, %ymm1
@@ -47957,7 +47957,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v4i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -47966,7 +47966,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm1 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpxor (%rsi), %ymm1, %ymm1
@@ -48041,7 +48041,7 @@ entry:
define zeroext i16 @test_vpcmpultq_v4i1_v16i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -48049,7 +48049,7 @@ define zeroext i16 @test_vpcmpultq_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rdi), %ymm1
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
@@ -48104,7 +48104,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v4i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -48113,7 +48113,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpbroadcastq (%rsi), %ymm1
; NoVLX-NEXT: vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
; NoVLX-NEXT: vpxor %ymm2, %ymm0, %ymm0
@@ -48190,14 +48190,14 @@ entry:
define zeroext i32 @test_vpcmpultq_v4i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48236,14 +48236,14 @@ entry:
define zeroext i32 @test_vpcmpultq_v4i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48283,7 +48283,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v4i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -48291,7 +48291,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48351,7 +48351,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v4i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -48359,7 +48359,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48421,14 +48421,14 @@ entry:
define zeroext i32 @test_vpcmpultq_v4i1_v32i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48470,7 +48470,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v4i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -48478,7 +48478,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48542,14 +48542,14 @@ entry:
define zeroext i64 @test_vpcmpultq_v4i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48594,14 +48594,14 @@ entry:
define zeroext i64 @test_vpcmpultq_v4i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48647,7 +48647,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v4i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -48655,7 +48655,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48721,7 +48721,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v4i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -48729,7 +48729,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48797,14 +48797,14 @@ entry:
define zeroext i64 @test_vpcmpultq_v4i1_v64i1_mask_mem_b(<4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48852,7 +48852,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v4i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to4}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -48860,7 +48860,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -48930,7 +48930,7 @@ entry:
define zeroext i16 @test_vpcmpultq_v8i1_v16i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -48938,7 +48938,7 @@ define zeroext i16 @test_vpcmpultq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -48955,7 +48955,7 @@ entry:
define zeroext i16 @test_vpcmpultq_v8i1_v16i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -48963,7 +48963,7 @@ define zeroext i16 @test_vpcmpultq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpltuq (%rdi), %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -48981,7 +48981,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v8i1_v16i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -48990,7 +48990,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -49010,7 +49010,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v8i1_v16i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -49019,7 +49019,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpltuq (%rsi), %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -49041,7 +49041,7 @@ entry:
define zeroext i16 @test_vpcmpultq_v8i1_v16i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -49049,7 +49049,7 @@ define zeroext i16 @test_vpcmpultq_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vpcmpltuq (%rdi){1to8}, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -49068,7 +49068,7 @@ entry:
define zeroext i16 @test_masked_vpcmpultq_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -49077,7 +49077,7 @@ define zeroext i16 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vpcmpltuq (%rsi){1to8}, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -49100,14 +49100,14 @@ entry:
define zeroext i32 @test_vpcmpultq_v8i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49171,14 +49171,14 @@ entry:
define zeroext i32 @test_vpcmpultq_v8i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49243,7 +49243,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v8i1_v32i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -49251,7 +49251,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49318,7 +49318,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v8i1_v32i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -49326,7 +49326,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49395,14 +49395,14 @@ entry:
define zeroext i32 @test_vpcmpultq_v8i1_v32i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49468,7 +49468,7 @@ entry:
define zeroext i32 @test_masked_vpcmpultq_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -49476,7 +49476,7 @@ define zeroext i32 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49546,14 +49546,14 @@ entry:
define zeroext i64 @test_vpcmpultq_v8i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49622,14 +49622,14 @@ entry:
define zeroext i64 @test_vpcmpultq_v8i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49699,7 +49699,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v8i1_v64i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -49707,7 +49707,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49779,7 +49779,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v8i1_v64i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -49787,7 +49787,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49861,14 +49861,14 @@ entry:
define zeroext i64 @test_vpcmpultq_v8i1_v64i1_mask_mem_b(<8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_vpcmpultq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vpcmpltuq (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vpcmpultq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -49939,7 +49939,7 @@ entry:
define zeroext i64 @test_masked_vpcmpultq_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, i64* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vpcmpultq_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vpcmpltuq (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -49947,7 +49947,7 @@ define zeroext i64 @test_masked_vpcmpult
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vpcmpultq_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -50023,14 +50023,14 @@ entry:
declare i16 @llvm.x86.avx512.mask.cmp.ps.512(<16 x float> , <16 x float> , i32, i16, i32)
define zeroext i8 @test_vcmpoeqps_v4i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50079,14 +50079,14 @@ entry:
define zeroext i8 @test_vcmpoeqps_v4i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqps (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50136,14 +50136,14 @@ entry:
define zeroext i8 @test_vcmpoeqps_v4i1_v8i1_mask_mem_b(<2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vbroadcastss (%rdi), %xmm1
; NoVLX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -50195,7 +50195,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqps_v4i1_v8i1_mask(i4 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0 {%k1}
@@ -50204,7 +50204,7 @@ define zeroext i8 @test_masked_vcmpoeqps
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50261,7 +50261,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqps_v4i1_v8i1_mask_mem(i4 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi), %xmm0, %k0 {%k1}
@@ -50270,7 +50270,7 @@ define zeroext i8 @test_masked_vcmpoeqps
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50328,7 +50328,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqps_v4i1_v8i1_mask_mem_b(i4 zeroext %__u, <2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi){1to4}, %xmm0, %k0 {%k1}
@@ -50337,7 +50337,7 @@ define zeroext i8 @test_masked_vcmpoeqps
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50399,14 +50399,14 @@ entry:
define zeroext i16 @test_vcmpoeqps_v4i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50454,14 +50454,14 @@ entry:
define zeroext i16 @test_vcmpoeqps_v4i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqps (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50510,14 +50510,14 @@ entry:
define zeroext i16 @test_vcmpoeqps_v4i1_v16i1_mask_mem_b(<2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vbroadcastss (%rdi), %xmm1
; NoVLX-NEXT: vcmpeqps %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -50568,7 +50568,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqps_v4i1_v16i1_mask(i4 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0 {%k1}
@@ -50577,7 +50577,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50633,7 +50633,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqps_v4i1_v16i1_mask_mem(i4 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi), %xmm0, %k0 {%k1}
@@ -50642,7 +50642,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50699,7 +50699,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqps_v4i1_v16i1_mask_mem_b(i4 zeroext %__u, <2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi){1to4}, %xmm0, %k0 {%k1}
@@ -50708,7 +50708,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -50769,13 +50769,13 @@ entry:
define zeroext i32 @test_vcmpoeqps_v4i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -50810,13 +50810,13 @@ entry:
define zeroext i32 @test_vcmpoeqps_v4i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -50852,13 +50852,13 @@ entry:
define zeroext i32 @test_vcmpoeqps_v4i1_v32i1_mask_mem_b(<2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -50896,7 +50896,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v4i1_v32i1_mask(i4 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0 {%k1}
@@ -50904,7 +50904,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -50947,7 +50947,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v4i1_v32i1_mask_mem(i4 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi), %xmm0, %k0 {%k1}
@@ -50955,7 +50955,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -50999,7 +50999,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v4i1_v32i1_mask_mem_b(i4 zeroext %__u, <2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi){1to4}, %xmm0, %k0 {%k1}
@@ -51007,7 +51007,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51055,13 +51055,13 @@ entry:
define zeroext i64 @test_vcmpoeqps_v4i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51102,13 +51102,13 @@ entry:
define zeroext i64 @test_vcmpoeqps_v4i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51150,13 +51150,13 @@ entry:
define zeroext i64 @test_vcmpoeqps_v4i1_v64i1_mask_mem_b(<2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to4}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51200,7 +51200,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v4i1_v64i1_mask(i4 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps %xmm1, %xmm0, %k0 {%k1}
@@ -51208,7 +51208,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51257,7 +51257,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v4i1_v64i1_mask_mem(i4 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi), %xmm0, %k0 {%k1}
@@ -51265,7 +51265,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51315,7 +51315,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v4i1_v64i1_mask_mem_b(i4 zeroext %__u, <2 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqps (%rsi){1to4}, %xmm0, %k0 {%k1}
@@ -51323,7 +51323,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51377,7 +51377,7 @@ entry:
define zeroext i16 @test_vcmpoeqps_v8i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -51385,7 +51385,7 @@ define zeroext i16 @test_vcmpoeqps_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0
@@ -51406,7 +51406,7 @@ entry:
define zeroext i16 @test_vcmpoeqps_v8i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -51414,7 +51414,7 @@ define zeroext i16 @test_vcmpoeqps_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovaps (%rdi), %ymm1
; NoVLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0
@@ -51436,7 +51436,7 @@ entry:
define zeroext i16 @test_vcmpoeqps_v8i1_v16i1_mask_mem_b(<4 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -51444,7 +51444,7 @@ define zeroext i16 @test_vcmpoeqps_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vbroadcastss (%rdi), %ymm1
; NoVLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0
@@ -51467,7 +51467,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqps_v8i1_v16i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -51476,7 +51476,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: kmovw %edi, %k1
@@ -51500,7 +51500,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqps_v8i1_v16i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -51509,7 +51509,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vmovaps (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -51534,7 +51534,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqps_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -51543,7 +51543,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; NoVLX-NEXT: vbroadcastss (%rsi), %ymm1
; NoVLX-NEXT: kmovw %edi, %k1
@@ -51571,14 +51571,14 @@ entry:
define zeroext i32 @test_vcmpoeqps_v8i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51644,14 +51644,14 @@ entry:
define zeroext i32 @test_vcmpoeqps_v8i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51718,14 +51718,14 @@ entry:
define zeroext i32 @test_vcmpoeqps_v8i1_v32i1_mask_mem_b(<4 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51793,7 +51793,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v8i1_v32i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -51801,7 +51801,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51870,7 +51870,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v8i1_v32i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -51878,7 +51878,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -51948,7 +51948,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -51956,7 +51956,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52029,14 +52029,14 @@ entry:
define zeroext i64 @test_vcmpoeqps_v8i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52107,14 +52107,14 @@ entry:
define zeroext i64 @test_vcmpoeqps_v8i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52186,14 +52186,14 @@ entry:
define zeroext i64 @test_vcmpoeqps_v8i1_v64i1_mask_mem_b(<4 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to8}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52266,7 +52266,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v8i1_v64i1_mask(i8 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps %ymm1, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -52274,7 +52274,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52348,7 +52348,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v8i1_v64i1_mask_mem(i8 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi), %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -52356,7 +52356,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52431,7 +52431,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <4 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi){1to8}, %ymm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -52439,7 +52439,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52517,14 +52517,14 @@ entry:
define zeroext i32 @test_vcmpoeqps_v16i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52633,14 +52633,14 @@ entry:
define zeroext i32 @test_vcmpoeqps_v16i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52750,14 +52750,14 @@ entry:
define zeroext i32 @test_vcmpoeqps_v16i1_v32i1_mask_mem_b(<8 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52868,7 +52868,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v16i1_v32i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -52876,7 +52876,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -52988,7 +52988,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v16i1_v32i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -52996,7 +52996,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -53109,7 +53109,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v16i1_v32i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -53117,7 +53117,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -53233,7 +53233,7 @@ entry:
define zeroext i32 @test_vcmpoeqps_v16i1_v32i1_sae_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; CHECK-LABEL: test_vcmpoeqps_v16i1_v32i1_sae_mask:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0
; CHECK-NEXT: kmovw %k0, %eax
; CHECK-NEXT: vzeroupper
@@ -53248,7 +53248,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqps_v16i1_v32i1_sae_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovw %k0, %eax
@@ -53256,7 +53256,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v32i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -53274,14 +53274,14 @@ entry:
define zeroext i64 @test_vcmpoeqps_v16i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -53395,14 +53395,14 @@ entry:
define zeroext i64 @test_vcmpoeqps_v16i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -53517,14 +53517,14 @@ entry:
define zeroext i64 @test_vcmpoeqps_v16i1_v64i1_mask_mem_b(<8 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqps (%rdi){1to16}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -53640,7 +53640,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v16i1_v64i1_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -53648,7 +53648,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -53765,7 +53765,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v16i1_v64i1_mask_mem(i16 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -53773,7 +53773,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -53891,7 +53891,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v16i1_v64i1_mask_mem_b(i16 zeroext %__u, <8 x i64> %__a, float* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqps (%rsi){1to16}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -53899,7 +53899,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -54020,7 +54020,7 @@ entry:
define zeroext i64 @test_vcmpoeqps_v16i1_v64i1_sae_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqps_v16i1_v64i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: movzwl %ax, %eax
@@ -54028,7 +54028,7 @@ define zeroext i64 @test_vcmpoeqps_v16i1
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqps_v16i1_v64i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: movzwl %ax, %eax
@@ -54044,7 +54044,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqps_v16i1_v64i1_sae_mask(i16 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -54053,7 +54053,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqps_v16i1_v64i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -54073,14 +54073,14 @@ entry:
declare i8 @llvm.x86.avx512.mask.cmp.pd.512(<8 x double> , <8 x double> , i32, i8, i32)
define zeroext i4 @test_vcmpoeqpd_v2i1_v4i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; NoVLX-NEXT: vpslld $31, %ymm0, %ymm0
@@ -54101,14 +54101,14 @@ entry:
define zeroext i4 @test_vcmpoeqpd_v2i1_v4i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
; NoVLX-NEXT: vpslld $31, %ymm0, %ymm0
@@ -54130,14 +54130,14 @@ entry:
define zeroext i4 @test_vcmpoeqpd_v2i1_v4i1_mask_mem_b(<2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovb %k0, -{{[0-9]+}}(%rsp)
; VLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; NoVLX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,2],zero,zero
@@ -54161,7 +54161,7 @@ entry:
define zeroext i4 @test_masked_vcmpoeqpd_v2i1_v4i1_mask(i2 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v4i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0 {%k1}
@@ -54170,7 +54170,7 @@ define zeroext i4 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v4i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54198,7 +54198,7 @@ entry:
define zeroext i4 @test_masked_vcmpoeqpd_v2i1_v4i1_mask_mem(i2 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v4i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %xmm0, %k0 {%k1}
@@ -54207,7 +54207,7 @@ define zeroext i4 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v4i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54236,7 +54236,7 @@ entry:
define zeroext i4 @test_masked_vcmpoeqpd_v2i1_v4i1_mask_mem_b(i2 zeroext %__u, <2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v4i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to2}, %xmm0, %k0 {%k1}
@@ -54245,7 +54245,7 @@ define zeroext i4 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v4i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54278,14 +54278,14 @@ entry:
define zeroext i8 @test_vcmpoeqpd_v2i1_v8i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54318,14 +54318,14 @@ entry:
define zeroext i8 @test_vcmpoeqpd_v2i1_v8i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54359,14 +54359,14 @@ entry:
define zeroext i8 @test_vcmpoeqpd_v2i1_v8i1_mask_mem_b(<2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; NoVLX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
@@ -54402,7 +54402,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqpd_v2i1_v8i1_mask(i2 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0 {%k1}
@@ -54411,7 +54411,7 @@ define zeroext i8 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54451,7 +54451,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqpd_v2i1_v8i1_mask_mem(i2 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %xmm0, %k0 {%k1}
@@ -54460,7 +54460,7 @@ define zeroext i8 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54501,7 +54501,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqpd_v2i1_v8i1_mask_mem_b(i2 zeroext %__u, <2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to2}, %xmm0, %k0 {%k1}
@@ -54510,7 +54510,7 @@ define zeroext i8 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54555,14 +54555,14 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v2i1_v16i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54594,14 +54594,14 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v2i1_v16i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd (%rdi), %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54634,14 +54634,14 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v2i1_v16i1_mask_mem_b(<2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; NoVLX-NEXT: vcmpeqpd %xmm1, %xmm0, %xmm0
; NoVLX-NEXT: vpextrb $8, %xmm0, %eax
@@ -54676,7 +54676,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v2i1_v16i1_mask(i2 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0 {%k1}
@@ -54685,7 +54685,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54724,7 +54724,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v2i1_v16i1_mask_mem(i2 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %xmm0, %k0 {%k1}
@@ -54733,7 +54733,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54773,7 +54773,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v2i1_v16i1_mask_mem_b(i2 zeroext %__u, <2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to2}, %xmm0, %k0 {%k1}
@@ -54782,7 +54782,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -54826,13 +54826,13 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v2i1_v32i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -54867,13 +54867,13 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v2i1_v32i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -54909,13 +54909,13 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v2i1_v32i1_mask_mem_b(<2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -54953,7 +54953,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v2i1_v32i1_mask(i2 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0 {%k1}
@@ -54961,7 +54961,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55003,7 +55003,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v2i1_v32i1_mask_mem(i2 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %xmm0, %k0 {%k1}
@@ -55011,7 +55011,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55054,7 +55054,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v2i1_v32i1_mask_mem_b(i2 zeroext %__u, <2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to2}, %xmm0, %k0 {%k1}
@@ -55062,7 +55062,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55109,13 +55109,13 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v2i1_v64i1_mask(<2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55156,13 +55156,13 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v2i1_v64i1_mask_mem(<2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55204,13 +55204,13 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v2i1_v64i1_mask_mem_b(<2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to2}, %xmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55254,7 +55254,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v2i1_v64i1_mask(i2 zeroext %__u, <2 x i64> %__a, <2 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %xmm1, %xmm0, %k0 {%k1}
@@ -55262,7 +55262,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55310,7 +55310,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v2i1_v64i1_mask_mem(i2 zeroext %__u, <2 x i64> %__a, <2 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %xmm0, %k0 {%k1}
@@ -55318,7 +55318,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55367,7 +55367,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v2i1_v64i1_mask_mem_b(i2 zeroext %__u, <2 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v2i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to2}, %xmm0, %k0 {%k1}
@@ -55375,7 +55375,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v2i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -55428,7 +55428,7 @@ entry:
define zeroext i8 @test_vcmpoeqpd_v4i1_v8i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -55436,7 +55436,7 @@ define zeroext i8 @test_vcmpoeqpd_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -55486,7 +55486,7 @@ entry:
define zeroext i8 @test_vcmpoeqpd_v4i1_v8i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -55494,7 +55494,7 @@ define zeroext i8 @test_vcmpoeqpd_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd (%rdi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -55545,7 +55545,7 @@ entry:
define zeroext i8 @test_vcmpoeqpd_v4i1_v8i1_mask_mem_b(<4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -55553,7 +55553,7 @@ define zeroext i8 @test_vcmpoeqpd_v4i1_v
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vbroadcastsd (%rdi), %ymm1
; NoVLX-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -55606,7 +55606,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqpd_v4i1_v8i1_mask(i4 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v8i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0 {%k1}
@@ -55616,7 +55616,7 @@ define zeroext i8 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v8i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -55674,7 +55674,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqpd_v4i1_v8i1_mask_mem(i4 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v8i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %ymm0, %k0 {%k1}
@@ -55684,7 +55684,7 @@ define zeroext i8 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v8i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -55743,7 +55743,7 @@ entry:
define zeroext i8 @test_masked_vcmpoeqpd_v4i1_v8i1_mask_mem_b(i4 zeroext %__u, <4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v8i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to4}, %ymm0, %k0 {%k1}
@@ -55753,7 +55753,7 @@ define zeroext i8 @test_masked_vcmpoeqpd
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v8i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -55816,7 +55816,7 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v4i1_v16i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -55824,7 +55824,7 @@ define zeroext i16 @test_vcmpoeqpd_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -55873,7 +55873,7 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v4i1_v16i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -55881,7 +55881,7 @@ define zeroext i16 @test_vcmpoeqpd_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd (%rdi), %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
; NoVLX-NEXT: vpextrb $4, %xmm0, %eax
@@ -55931,7 +55931,7 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v4i1_v16i1_mask_mem_b(<4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -55939,7 +55939,7 @@ define zeroext i16 @test_vcmpoeqpd_v4i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vbroadcastsd (%rdi), %ymm1
; NoVLX-NEXT: vcmpeqpd %ymm1, %ymm0, %ymm0
; NoVLX-NEXT: vpmovqd %zmm0, %ymm0
@@ -55991,7 +55991,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v4i1_v16i1_mask(i4 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0 {%k1}
@@ -56001,7 +56001,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -56058,7 +56058,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v4i1_v16i1_mask_mem(i4 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %ymm0, %k0 {%k1}
@@ -56068,7 +56068,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -56126,7 +56126,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v4i1_v16i1_mask_mem_b(i4 zeroext %__u, <4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to4}, %ymm0, %k0 {%k1}
@@ -56136,7 +56136,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; NoVLX-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; NoVLX-NEXT: kmovw %eax, %k1
@@ -56198,14 +56198,14 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v4i1_v32i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56241,14 +56241,14 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v4i1_v32i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56285,14 +56285,14 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v4i1_v32i1_mask_mem_b(<4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56331,7 +56331,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v4i1_v32i1_mask(i4 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0 {%k1}
@@ -56340,7 +56340,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56384,7 +56384,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v4i1_v32i1_mask_mem(i4 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %ymm0, %k0 {%k1}
@@ -56393,7 +56393,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56438,7 +56438,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v4i1_v32i1_mask_mem_b(i4 zeroext %__u, <4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to4}, %ymm0, %k0 {%k1}
@@ -56447,7 +56447,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56496,14 +56496,14 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v4i1_v64i1_mask(<4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56545,14 +56545,14 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v4i1_v64i1_mask_mem(<4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56595,14 +56595,14 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v4i1_v64i1_mask_mem_b(<4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to4}, %ymm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56647,7 +56647,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v4i1_v64i1_mask(i4 zeroext %__u, <4 x i64> %__a, <4 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd %ymm1, %ymm0, %k0 {%k1}
@@ -56656,7 +56656,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56706,7 +56706,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v4i1_v64i1_mask_mem(i4 zeroext %__u, <4 x i64> %__a, <4 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi), %ymm0, %k0 {%k1}
@@ -56715,7 +56715,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56766,7 +56766,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v4i1_v64i1_mask_mem_b(i4 zeroext %__u, <4 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v4i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; VLX-NEXT: kmovb -{{[0-9]+}}(%rsp), %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to4}, %ymm0, %k0 {%k1}
@@ -56775,7 +56775,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v4i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -56830,7 +56830,7 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v8i1_v16i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -56838,7 +56838,7 @@ define zeroext i16 @test_vcmpoeqpd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -56855,7 +56855,7 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v8i1_v16i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -56863,7 +56863,7 @@ define zeroext i16 @test_vcmpoeqpd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd (%rdi), %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -56881,7 +56881,7 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v8i1_v16i1_mask_mem_b(<8 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -56889,7 +56889,7 @@ define zeroext i16 @test_vcmpoeqpd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmpeqpd (%rdi){1to8}, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -56908,7 +56908,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v8i1_v16i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -56917,7 +56917,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -56937,7 +56937,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v8i1_v16i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -56946,7 +56946,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmpeqpd (%rsi), %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -56967,7 +56967,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v8i1_v16i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -56976,7 +56976,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmpeqpd (%rsi){1to8}, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -57000,7 +57000,7 @@ entry:
define zeroext i16 @test_vcmpoeqpd_v8i1_v16i1_sae_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: movzbl %al, %eax
@@ -57009,7 +57009,7 @@ define zeroext i16 @test_vcmpoeqpd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v16i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: movzbl %al, %eax
@@ -57026,7 +57026,7 @@ entry:
define zeroext i16 @test_masked_vcmpoeqpd_v8i1_v16i1_sae_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -57036,7 +57036,7 @@ define zeroext i16 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v16i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -57056,14 +57056,14 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v8i1_v32i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57127,14 +57127,14 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v8i1_v32i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57199,14 +57199,14 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v8i1_v32i1_mask_mem_b(<8 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57272,7 +57272,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v8i1_v32i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -57280,7 +57280,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57347,7 +57347,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v8i1_v32i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -57355,7 +57355,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57423,7 +57423,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v8i1_v32i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -57431,7 +57431,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57502,14 +57502,14 @@ entry:
define zeroext i32 @test_vcmpoeqpd_v8i1_v32i1_sae_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0
; VLX-NEXT: kmovb %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v32i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: movzbl %al, %eax
@@ -57525,7 +57525,7 @@ entry:
define zeroext i32 @test_masked_vcmpoeqpd_v8i1_v32i1_sae_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovb %k0, %eax
@@ -57533,7 +57533,7 @@ define zeroext i32 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v32i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -57552,14 +57552,14 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v8i1_v64i1_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57628,14 +57628,14 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v8i1_v64i1_mask_mem(<8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi), %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57705,14 +57705,14 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v8i1_v64i1_mask_mem_b(<8 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmpeqpd (%rdi){1to8}, %zmm0, %k0
; VLX-NEXT: kmovq %k0, %rax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57783,7 +57783,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v8i1_v64i1_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -57791,7 +57791,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57863,7 +57863,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v8i1_v64i1_mask_mem(i8 zeroext %__u, <8 x i64> %__a, <8 x i64>* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_mask_mem:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd (%rsi), %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -57871,7 +57871,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_mask_mem:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -57944,7 +57944,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v8i1_v64i1_mask_mem_b(i8 zeroext %__u, <8 x i64> %__a, double* %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_mask_mem_b:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmpeqpd (%rsi){1to8}, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovq %k0, %rax
@@ -57952,7 +57952,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_mask_mem_b:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
@@ -58028,7 +58028,7 @@ entry:
define zeroext i64 @test_vcmpoeqpd_v8i1_v64i1_sae_mask(<8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: movzbl %al, %eax
@@ -58036,7 +58036,7 @@ define zeroext i64 @test_vcmpoeqpd_v8i1_
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_vcmpoeqpd_v8i1_v64i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0
; NoVLX-NEXT: kmovw %k0, %eax
; NoVLX-NEXT: movzbl %al, %eax
@@ -58052,7 +58052,7 @@ entry:
define zeroext i64 @test_masked_vcmpoeqpd_v8i1_v64i1_sae_mask(i8 zeroext %__u, <8 x i64> %__a, <8 x i64> %__b) local_unnamed_addr {
; VLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_sae_mask:
-; VLX: # BB#0: # %entry
+; VLX: # %bb.0: # %entry
; VLX-NEXT: kmovd %edi, %k1
; VLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0 {%k1}
; VLX-NEXT: kmovd %k0, %eax
@@ -58061,7 +58061,7 @@ define zeroext i64 @test_masked_vcmpoeqp
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_masked_vcmpoeqpd_v8i1_v64i1_sae_mask:
-; NoVLX: # BB#0: # %entry
+; NoVLX: # %bb.0: # %entry
; NoVLX-NEXT: kmovw %edi, %k1
; NoVLX-NEXT: vcmplepd {sae}, %zmm1, %zmm0, %k0 {%k1}
; NoVLX-NEXT: kmovw %k0, %eax
@@ -58079,14 +58079,14 @@ entry:
; Test that we understand that cmpps with rounding zeros the upper bits of the mask register.
define i32 @test_cmpm_rnd_zero(<16 x float> %a, <16 x float> %b) {
; VLX-LABEL: test_cmpm_rnd_zero:
-; VLX: # BB#0:
+; VLX: # %bb.0:
; VLX-NEXT: vcmpleps {sae}, %zmm1, %zmm0, %k0
; VLX-NEXT: kmovd %k0, %eax
; VLX-NEXT: vzeroupper
; VLX-NEXT: retq
;
; NoVLX-LABEL: test_cmpm_rnd_zero:
-; NoVLX: # BB#0:
+; NoVLX: # %bb.0:
; NoVLX-NEXT: pushq %rbp
; NoVLX-NEXT: .cfi_def_cfa_offset 16
; NoVLX-NEXT: .cfi_offset %rbp, -16
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-vec-test-testn.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-vec-test-testn.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl-vec-test-testn.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl-vec-test-testn.ll Mon Dec 4 09:18:51 2017
@@ -5,14 +5,14 @@
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_test_epi64_mask(<2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_test_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestmq %xmm0, %xmm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_test_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestmq %xmm0, %xmm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -28,14 +28,14 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_test_epi32_mask(<2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_test_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestmd %xmm0, %xmm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_test_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestmd %xmm0, %xmm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -52,7 +52,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_test_epi64_mask(<4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_test_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestmq %ymm0, %ymm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -60,7 +60,7 @@ define zeroext i8 @TEST_mm256_test_epi64
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_test_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestmq %ymm0, %ymm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -77,7 +77,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_test_epi32_mask(<4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_test_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestmd %ymm0, %ymm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -85,7 +85,7 @@ define zeroext i8 @TEST_mm256_test_epi32
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_test_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestmd %ymm0, %ymm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -102,7 +102,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_mask_test_epi64_mask(i8 %__U, <2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_mask_test_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestmq %xmm0, %xmm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -110,7 +110,7 @@ define zeroext i8 @TEST_mm_mask_test_epi
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_mask_test_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestmq %xmm0, %xmm1, %k0 {%k1}
@@ -131,7 +131,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_mask_test_epi32_mask(i8 %__U, <2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_mask_test_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestmd %xmm0, %xmm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -139,7 +139,7 @@ define zeroext i8 @TEST_mm_mask_test_epi
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_mask_test_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestmd %xmm0, %xmm1, %k0 {%k1}
@@ -162,7 +162,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_mask_test_epi64_mask(i8 %__U, <4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_mask_test_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestmq %ymm0, %ymm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -171,7 +171,7 @@ define zeroext i8 @TEST_mm256_mask_test_
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_mask_test_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestmq %ymm0, %ymm1, %k0 {%k1}
@@ -193,7 +193,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_mask_test_epi32_mask(i8 %__U, <4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_mask_test_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestmd %ymm0, %ymm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -202,7 +202,7 @@ define zeroext i8 @TEST_mm256_mask_test_
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_mask_test_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestmd %ymm0, %ymm1, %k0 {%k1}
@@ -223,14 +223,14 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_testn_epi64_mask(<2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_testn_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestnmq %xmm0, %xmm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_testn_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestnmq %xmm0, %xmm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -246,14 +246,14 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_testn_epi32_mask(<2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_testn_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestnmd %xmm0, %xmm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_testn_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestnmd %xmm0, %xmm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -270,7 +270,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_testn_epi64_mask(<4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_testn_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestnmq %ymm0, %ymm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -278,7 +278,7 @@ define zeroext i8 @TEST_mm256_testn_epi6
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_testn_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestnmq %ymm0, %ymm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -295,7 +295,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_testn_epi32_mask(<4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_testn_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: vptestnmd %ymm0, %ymm1, %k0
; X86_64-NEXT: kmovw %k0, %eax
; X86_64-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -303,7 +303,7 @@ define zeroext i8 @TEST_mm256_testn_epi3
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_testn_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: vptestnmd %ymm0, %ymm1, %k0
; I386-NEXT: kmovw %k0, %eax
; I386-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -320,7 +320,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_mask_testn_epi64_mask(i8 %__U, <2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_mask_testn_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestnmq %xmm0, %xmm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -328,7 +328,7 @@ define zeroext i8 @TEST_mm_mask_testn_ep
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_mask_testn_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestnmq %xmm0, %xmm1, %k0 {%k1}
@@ -349,7 +349,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_mask_testn_epi32_mask(i8 %__U, <2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm_mask_testn_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestnmd %xmm0, %xmm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -357,7 +357,7 @@ define zeroext i8 @TEST_mm_mask_testn_ep
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm_mask_testn_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestnmd %xmm0, %xmm1, %k0 {%k1}
@@ -380,7 +380,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_mask_testn_epi64_mask(i8 %__U, <4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_mask_testn_epi64_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestnmq %ymm0, %ymm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -389,7 +389,7 @@ define zeroext i8 @TEST_mm256_mask_testn
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_mask_testn_epi64_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestnmq %ymm0, %ymm1, %k0 {%k1}
@@ -411,7 +411,7 @@ entry:
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm256_mask_testn_epi32_mask(i8 %__U, <4 x i64> %__A, <4 x i64> %__B) local_unnamed_addr #0 {
; X86_64-LABEL: TEST_mm256_mask_testn_epi32_mask:
-; X86_64: # BB#0: # %entry
+; X86_64: # %bb.0: # %entry
; X86_64-NEXT: kmovw %edi, %k1
; X86_64-NEXT: vptestnmd %ymm0, %ymm1, %k0 {%k1}
; X86_64-NEXT: kmovw %k0, %eax
@@ -420,7 +420,7 @@ define zeroext i8 @TEST_mm256_mask_testn
; X86_64-NEXT: retq
;
; I386-LABEL: TEST_mm256_mask_testn_epi32_mask:
-; I386: # BB#0: # %entry
+; I386: # %bb.0: # %entry
; I386-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; I386-NEXT: kmovw %eax, %k1
; I386-NEXT: vptestnmd %ymm0, %ymm1, %k0 {%k1}
Modified: llvm/trunk/test/CodeGen/X86/avx512vl-vpclmulqdq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl-vpclmulqdq.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl-vpclmulqdq.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl-vpclmulqdq.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <2 x i64> @test_x86_pclmulqdq(<2 x i64> %a0, <2 x i64> %a1) {
; AVX512VL_VPCLMULQDQ-LABEL: test_x86_pclmulqdq:
-; AVX512VL_VPCLMULQDQ: # BB#0:
+; AVX512VL_VPCLMULQDQ: # %bb.0:
; AVX512VL_VPCLMULQDQ-NEXT: vpclmulqdq $1, %xmm1, %xmm0, %xmm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x44,0xc1,0x01]
; AVX512VL_VPCLMULQDQ-NEXT: retq # encoding: [0xc3]
%res = call <2 x i64> @llvm.x86.pclmulqdq(<2 x i64> %a0, <2 x i64> %a1, i8 1)
@@ -13,7 +13,7 @@ declare <2 x i64> @llvm.x86.pclmulqdq(<2
define <4 x i64> @test_x86_pclmulqdq_256(<4 x i64> %a0, <4 x i64> %a1) {
; AVX512VL_VPCLMULQDQ-LABEL: test_x86_pclmulqdq_256:
-; AVX512VL_VPCLMULQDQ: # BB#0:
+; AVX512VL_VPCLMULQDQ: # %bb.0:
; AVX512VL_VPCLMULQDQ-NEXT: vpclmulqdq $16, %ymm1, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x44,0xc1,0x10]
; AVX512VL_VPCLMULQDQ-NEXT: retq # encoding: [0xc3]
%res = call <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64> %a0, <4 x i64> %a1, i8 16)
Modified: llvm/trunk/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@ declare <8 x i32> @llvm.x86.avx512.maskz
define <8 x i32>@test_int_x86_avx512_mask_vpdpbusd_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32>* %x2p, <8 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpbusd_256:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %ymm0, %ymm3
; CHECK-NEXT: vpdpbusd (%rdi), %ymm1, %ymm3 {%k1}
@@ -29,7 +29,7 @@ declare <4 x i32> @llvm.x86.avx512.maskz
define <4 x i32>@test_int_x86_avx512_mask_vpdpbusd_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32>* %x2p, <4 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpbusd_128:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %xmm0, %xmm3
; CHECK-NEXT: vpdpbusd (%rdi), %xmm1, %xmm3 {%k1}
@@ -53,7 +53,7 @@ declare <8 x i32> @llvm.x86.avx512.maskz
define <8 x i32>@test_int_x86_avx512_mask_vpdpbusds_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32>* %x2p, <8 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpbusds_256:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %ymm0, %ymm3
; CHECK-NEXT: vpdpbusds (%rdi), %ymm1, %ymm3 {%k1}
@@ -77,7 +77,7 @@ declare <4 x i32> @llvm.x86.avx512.maskz
define <4 x i32>@test_int_x86_avx512_mask_vpdpbusds_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32>* %x2p, <4 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpbusds_128:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %xmm0, %xmm3
; CHECK-NEXT: vpdpbusds (%rdi), %xmm1, %xmm3 {%k1}
@@ -101,7 +101,7 @@ declare <8 x i32> @llvm.x86.avx512.maskz
define <8 x i32>@test_int_x86_avx512_mask_vpdpwssd_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32>* %x2p, <8 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpwssd_256:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %ymm0, %ymm3
; CHECK-NEXT: vpdpwssd (%rdi), %ymm1, %ymm3 {%k1}
@@ -125,7 +125,7 @@ declare <4 x i32> @llvm.x86.avx512.maskz
define <4 x i32>@test_int_x86_avx512_mask_vpdpwssd_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32>* %x2p, <4 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpwssd_128:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %xmm0, %xmm3
; CHECK-NEXT: vpdpwssd (%rdi), %xmm1, %xmm3 {%k1}
@@ -150,7 +150,7 @@ declare <8 x i32> @llvm.x86.avx512.maskz
define <8 x i32>@test_int_x86_avx512_mask_vpdpwssds_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32>* %x2p, <8 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpwssds_256:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %ymm0, %ymm3
; CHECK-NEXT: vpdpwssds (%rdi), %ymm1, %ymm3 {%k1}
@@ -174,7 +174,7 @@ declare <4 x i32> @llvm.x86.avx512.maskz
define <4 x i32>@test_int_x86_avx512_mask_vpdpwssds_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32>* %x2p, <4 x i32> %x4, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpwssds_128:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %xmm0, %xmm3
; CHECK-NEXT: vpdpwssds (%rdi), %xmm1, %xmm3 {%k1}
Modified: llvm/trunk/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define <2 x i64> @test_mm_broadcastmb_epi64(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: test_mm_broadcastmb_epi64:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %k0
; CHECK-NEXT: vpbroadcastmb2q %k0, %xmm0
; CHECK-NEXT: retq
@@ -21,7 +21,7 @@ entry:
define <4 x i64> @test_mm256_broadcastmb_epi64(<4 x i64> %a, <4 x i64> %b) {
; CHECK-LABEL: test_mm256_broadcastmb_epi64:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vpcmpeqq %ymm1, %ymm0, %k0
; CHECK-NEXT: vpbroadcastmb2q %k0, %ymm0
; CHECK-NEXT: retq
@@ -37,7 +37,7 @@ entry:
define <2 x i64> @test_mm_broadcastmw_epi32(<8 x i64> %a, <8 x i64> %b) {
; CHECK-LABEL: test_mm_broadcastmw_epi32:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
; CHECK-NEXT: vpbroadcastmw2d %k0, %xmm0
; CHECK-NEXT: vzeroupper
@@ -56,7 +56,7 @@ entry:
define <4 x i64> @test_mm256_broadcastmw_epi32(<8 x i64> %a, <8 x i64> %b) {
; CHECK-LABEL: test_mm256_broadcastmw_epi32:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
; CHECK-NEXT: vpbroadcastmw2d %k0, %ymm0
; CHECK-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/avx512vnni-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vnni-intrinsics.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vnni-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vnni-intrinsics.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@ declare <16 x i32> @llvm.x86.avx512.mask
define <16 x i32>@test_int_x86_avx512_mask_vpdpbusd_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32>* %x2p, <16 x i32> %x4, i16 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpbusd_512:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %zmm0, %zmm3
; CHECK-NEXT: vpdpbusd (%rdi), %zmm1, %zmm3 {%k1}
@@ -29,7 +29,7 @@ declare <16 x i32> @llvm.x86.avx512.mask
define <16 x i32>@test_int_x86_avx512_mask_vpdpbusds_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32>* %x2p, <16 x i32> %x4, i16 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpbusds_512:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %zmm0, %zmm3
; CHECK-NEXT: vpdpbusds (%rdi), %zmm1, %zmm3 {%k1}
@@ -53,7 +53,7 @@ declare <16 x i32> @llvm.x86.avx512.mask
define <16 x i32>@test_int_x86_avx512_mask_vpdpwssd_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32>* %x2p, <16 x i32> %x4, i16 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpwssd_512:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %zmm0, %zmm3
; CHECK-NEXT: vpdpwssd (%rdi), %zmm1, %zmm3 {%k1}
@@ -77,7 +77,7 @@ declare <16 x i32> @llvm.x86.avx512.mask
define <16 x i32>@test_int_x86_avx512_mask_vpdpwssds_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32>* %x2p, <16 x i32> %x4, i16 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_vpdpwssds_512:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: kmovw %esi, %k1
; CHECK-NEXT: vmovaps %zmm0, %zmm3
; CHECK-NEXT: vpdpwssds (%rdi), %zmm1, %zmm3 {%k1}
Modified: llvm/trunk/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll Mon Dec 4 09:18:51 2017
@@ -10,13 +10,13 @@
define <16 x i32> @test_mask_vpopcnt_d(<16 x i32> %a, i16 %mask, <16 x i32> %b) {
; X86_64-LABEL: test_mask_vpopcnt_d:
-; X86_64: # BB#0:
+; X86_64: # %bb.0:
; X86_64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
; X86_64-NEXT: vpopcntd %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x7d,0x49,0x55,0xc1]
; X86_64-NEXT: retq # encoding: [0xc3]
;
; X86-LABEL: test_mask_vpopcnt_d:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
; X86-NEXT: vpopcntd %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x7d,0x49,0x55,0xc1]
; X86-NEXT: retl # encoding: [0xc3]
@@ -28,13 +28,13 @@ define <16 x i32> @test_mask_vpopcnt_d(<
define <16 x i32> @test_maskz_vpopcnt_d(i16 %mask, <16 x i32> %a) {
; X86_64-LABEL: test_maskz_vpopcnt_d:
-; X86_64: # BB#0:
+; X86_64: # %bb.0:
; X86_64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
; X86_64-NEXT: vpopcntd %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0xc9,0x55,0xc0]
; X86_64-NEXT: retq # encoding: [0xc3]
;
; X86-LABEL: test_maskz_vpopcnt_d:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
; X86-NEXT: vpopcntd %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0xc9,0x55,0xc0]
; X86-NEXT: retl # encoding: [0xc3]
@@ -46,14 +46,14 @@ define <16 x i32> @test_maskz_vpopcnt_d(
define <8 x i64> @test_mask_vpopcnt_q(<8 x i64> %a, <8 x i64> %b, i8 %mask) {
; X86_64-LABEL: test_mask_vpopcnt_q:
-; X86_64: # BB#0:
+; X86_64: # %bb.0:
; X86_64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
; X86_64-NEXT: vpopcntq %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x49,0x55,0xc8]
; X86_64-NEXT: vmovdqa64 %zmm1, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
; X86_64-NEXT: retq # encoding: [0xc3]
;
; X86-LABEL: test_mask_vpopcnt_q:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 # encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vpopcntq %zmm0, %zmm1 {%k1} # encoding: [0x62,0xf2,0xfd,0x49,0x55,0xc8]
@@ -67,13 +67,13 @@ define <8 x i64> @test_mask_vpopcnt_q(<8
define <8 x i64> @test_maskz_vpopcnt_q(<8 x i64> %a, i8 %mask) {
; X86_64-LABEL: test_maskz_vpopcnt_q:
-; X86_64: # BB#0:
+; X86_64: # %bb.0:
; X86_64-NEXT: kmovw %edi, %k1 # encoding: [0xc5,0xf8,0x92,0xcf]
; X86_64-NEXT: vpopcntq %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xc9,0x55,0xc0]
; X86_64-NEXT: retq # encoding: [0xc3]
;
; X86-LABEL: test_maskz_vpopcnt_q:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax # encoding: [0x0f,0xb6,0x44,0x24,0x04]
; X86-NEXT: kmovw %eax, %k1 # encoding: [0xc5,0xf8,0x92,0xc8]
; X86-NEXT: vpopcntq %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0xfd,0xc9,0x55,0xc0]
Modified: llvm/trunk/test/CodeGen/X86/bc-extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bc-extract.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bc-extract.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bc-extract.ll Mon Dec 4 09:18:51 2017
@@ -4,12 +4,12 @@
define float @extractFloat1() nounwind {
; X32-LABEL: extractFloat1:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: fld1
; X32-NEXT: retl
;
; X64-LABEL: extractFloat1:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X64-NEXT: retq
entry:
@@ -20,12 +20,12 @@ entry:
define float @extractFloat2() nounwind {
; X32-LABEL: extractFloat2:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: fldz
; X32-NEXT: retl
;
; X64-LABEL: extractFloat2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xorps %xmm0, %xmm0
; X64-NEXT: retq
entry:
@@ -36,12 +36,12 @@ entry:
define i32 @extractInt2() nounwind {
; X32-LABEL: extractInt2:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: retl
;
; X64-LABEL: extractInt2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: retq
entry:
Modified: llvm/trunk/test/CodeGen/X86/bigstructret.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bigstructret.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bigstructret.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bigstructret.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define fastcc %0 @ReturnBigStruct() nounwind readnone {
; X86-LABEL: ReturnBigStruct:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl $24601, 12(%ecx) # imm = 0x6019
; X86-NEXT: movl $48, 8(%ecx)
; X86-NEXT: movl $24, 4(%ecx)
@@ -16,7 +16,7 @@ define fastcc %0 @ReturnBigStruct() noun
; X86-NEXT: retl
;
; X64-LABEL: ReturnBigStruct:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movabsq $105660490448944, %rax # imm = 0x601900000030
; X64-NEXT: movq %rax, 8(%rdi)
; X64-NEXT: movabsq $103079215116, %rax # imm = 0x180000000C
@@ -34,7 +34,7 @@ entry:
define fastcc %1 @ReturnBigStruct2() nounwind readnone {
; X86-LABEL: ReturnBigStruct2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl $48, 4(%ecx)
; X86-NEXT: movb $1, 2(%ecx)
; X86-NEXT: movw $256, (%ecx) # imm = 0x100
@@ -42,7 +42,7 @@ define fastcc %1 @ReturnBigStruct2() nou
; X86-NEXT: retl
;
; X64-LABEL: ReturnBigStruct2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movl $48, 4(%rdi)
; X64-NEXT: movb $1, 2(%rdi)
; X64-NEXT: movw $256, (%rdi) # imm = 0x100
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define i8 @v8i16(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, <8 x i16> %d) {
; SSE2-SSSE3-LABEL: v8i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtw %xmm1, %xmm0
; SSE2-SSSE3-NEXT: pcmpgtw %xmm3, %xmm2
; SSE2-SSSE3-NEXT: pand %xmm0, %xmm2
@@ -18,7 +18,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v8i16:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpcmpgtw %xmm3, %xmm2, %xmm1
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -28,7 +28,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v8i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vpmovsxwq %xmm0, %zmm0
; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -43,7 +43,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtw %xmm1, %xmm0, %k1
; AVX512BW-NEXT: vpcmpgtw %xmm3, %xmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -58,7 +58,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
define i4 @v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) {
; SSE2-SSSE3-LABEL: v4i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtd %xmm1, %xmm0
; SSE2-SSSE3-NEXT: pcmpgtd %xmm3, %xmm2
; SSE2-SSSE3-NEXT: pand %xmm0, %xmm2
@@ -67,7 +67,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4i32:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm1
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -76,7 +76,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtd %xmm1, %xmm0, %k1
; AVX512F-NEXT: vpcmpgtd %xmm3, %xmm2, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -85,7 +85,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtd %xmm1, %xmm0, %k1
; AVX512BW-NEXT: vpcmpgtd %xmm3, %xmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -101,7 +101,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
define i4 @v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) {
; SSE2-SSSE3-LABEL: v4f32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltps %xmm0, %xmm1
; SSE2-SSSE3-NEXT: cmpltps %xmm2, %xmm3
; SSE2-SSSE3-NEXT: andps %xmm1, %xmm3
@@ -110,7 +110,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4f32:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
; AVX12-NEXT: vcmpltps %xmm2, %xmm3, %xmm1
; AVX12-NEXT: vandps %xmm1, %xmm0, %xmm0
@@ -119,7 +119,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4f32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltps %xmm0, %xmm1, %k1
; AVX512F-NEXT: vcmpltps %xmm2, %xmm3, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -128,7 +128,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4f32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltps %xmm0, %xmm1, %k1
; AVX512BW-NEXT: vcmpltps %xmm2, %xmm3, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -144,7 +144,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
define i16 @v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) {
; SSE2-SSSE3-LABEL: v16i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtb %xmm1, %xmm0
; SSE2-SSSE3-NEXT: pcmpgtb %xmm3, %xmm2
; SSE2-SSSE3-NEXT: pand %xmm0, %xmm2
@@ -153,7 +153,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v16i8:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpcmpgtb %xmm3, %xmm2, %xmm1
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -162,7 +162,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v16i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
@@ -177,7 +177,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtb %xmm1, %xmm0, %k1
; AVX512BW-NEXT: vpcmpgtb %xmm3, %xmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -192,7 +192,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
define i2 @v2i8(<2 x i8> %a, <2 x i8> %b, <2 x i8> %c, <2 x i8> %d) {
; SSE2-SSSE3-LABEL: v2i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllq $56, %xmm2
; SSE2-SSSE3-NEXT: movdqa %xmm2, %xmm4
; SSE2-SSSE3-NEXT: psrad $31, %xmm4
@@ -248,7 +248,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v2i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpsllq $56, %xmm3, %xmm3
; AVX1-NEXT: vpsrad $31, %xmm3, %xmm4
; AVX1-NEXT: vpsrad $24, %xmm3, %xmm3
@@ -277,7 +277,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX1-NEXT: retq
;
; AVX2-LABEL: v2i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $56, %xmm3, %xmm3
; AVX2-NEXT: vpsrad $31, %xmm3, %xmm4
; AVX2-NEXT: vpsrad $24, %xmm3, %xmm3
@@ -306,7 +306,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v2i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllq $56, %xmm3, %xmm3
; AVX512F-NEXT: vpsraq $56, %xmm3, %xmm3
; AVX512F-NEXT: vpsllq $56, %xmm2, %xmm2
@@ -323,7 +323,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllq $56, %xmm3, %xmm3
; AVX512BW-NEXT: vpsraq $56, %xmm3, %xmm3
; AVX512BW-NEXT: vpsllq $56, %xmm2, %xmm2
@@ -347,7 +347,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
define i2 @v2i16(<2 x i16> %a, <2 x i16> %b, <2 x i16> %c, <2 x i16> %d) {
; SSE2-SSSE3-LABEL: v2i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllq $48, %xmm2
; SSE2-SSSE3-NEXT: movdqa %xmm2, %xmm4
; SSE2-SSSE3-NEXT: psrad $31, %xmm4
@@ -403,7 +403,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v2i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpsllq $48, %xmm3, %xmm3
; AVX1-NEXT: vpsrad $31, %xmm3, %xmm4
; AVX1-NEXT: vpsrad $16, %xmm3, %xmm3
@@ -432,7 +432,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v2i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $48, %xmm3, %xmm3
; AVX2-NEXT: vpsrad $31, %xmm3, %xmm4
; AVX2-NEXT: vpsrad $16, %xmm3, %xmm3
@@ -461,7 +461,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v2i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllq $48, %xmm3, %xmm3
; AVX512F-NEXT: vpsraq $48, %xmm3, %xmm3
; AVX512F-NEXT: vpsllq $48, %xmm2, %xmm2
@@ -478,7 +478,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllq $48, %xmm3, %xmm3
; AVX512BW-NEXT: vpsraq $48, %xmm3, %xmm3
; AVX512BW-NEXT: vpsllq $48, %xmm2, %xmm2
@@ -502,7 +502,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
define i2 @v2i32(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c, <2 x i32> %d) {
; SSE2-SSSE3-LABEL: v2i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllq $32, %xmm2
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,3,2,3]
; SSE2-SSSE3-NEXT: psrad $31, %xmm2
@@ -550,7 +550,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v2i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3
; AVX1-NEXT: vpsrad $31, %xmm3, %xmm4
; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
@@ -575,7 +575,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v2i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
; AVX2-NEXT: vpsrad $31, %xmm3, %xmm4
; AVX2-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
@@ -600,7 +600,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v2i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllq $32, %xmm3, %xmm3
; AVX512F-NEXT: vpsraq $32, %xmm3, %xmm3
; AVX512F-NEXT: vpsllq $32, %xmm2, %xmm2
@@ -617,7 +617,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllq $32, %xmm3, %xmm3
; AVX512BW-NEXT: vpsraq $32, %xmm3, %xmm3
; AVX512BW-NEXT: vpsllq $32, %xmm2, %xmm2
@@ -641,7 +641,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
define i2 @v2i64(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, <2 x i64> %d) {
; SSE2-SSSE3-LABEL: v2i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,0,2147483648,0]
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm1
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm0
@@ -669,7 +669,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v2i64:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm1
; AVX12-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -678,7 +678,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v2i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtq %xmm1, %xmm0, %k1
; AVX512F-NEXT: vpcmpgtq %xmm3, %xmm2, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -687,7 +687,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtq %xmm1, %xmm0, %k1
; AVX512BW-NEXT: vpcmpgtq %xmm3, %xmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -703,7 +703,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
define i2 @v2f64(<2 x double> %a, <2 x double> %b, <2 x double> %c, <2 x double> %d) {
; SSE2-SSSE3-LABEL: v2f64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltpd %xmm0, %xmm1
; SSE2-SSSE3-NEXT: cmpltpd %xmm2, %xmm3
; SSE2-SSSE3-NEXT: andpd %xmm1, %xmm3
@@ -712,7 +712,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v2f64:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
; AVX12-NEXT: vcmpltpd %xmm2, %xmm3, %xmm1
; AVX12-NEXT: vandpd %xmm1, %xmm0, %xmm0
@@ -721,7 +721,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v2f64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltpd %xmm0, %xmm1, %k1
; AVX512F-NEXT: vcmpltpd %xmm2, %xmm3, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -730,7 +730,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2f64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltpd %xmm0, %xmm1, %k1
; AVX512BW-NEXT: vcmpltpd %xmm2, %xmm3, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -746,7 +746,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
define i4 @v4i8(<4 x i8> %a, <4 x i8> %b, <4 x i8> %c, <4 x i8> %d) {
; SSE2-SSSE3-LABEL: v4i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pslld $24, %xmm3
; SSE2-SSSE3-NEXT: psrad $24, %xmm3
; SSE2-SSSE3-NEXT: pslld $24, %xmm2
@@ -763,7 +763,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4i8:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpslld $24, %xmm3, %xmm3
; AVX12-NEXT: vpsrad $24, %xmm3, %xmm3
; AVX12-NEXT: vpslld $24, %xmm2, %xmm2
@@ -780,7 +780,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpslld $24, %xmm3, %xmm3
; AVX512F-NEXT: vpsrad $24, %xmm3, %xmm3
; AVX512F-NEXT: vpslld $24, %xmm2, %xmm2
@@ -797,7 +797,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpslld $24, %xmm3, %xmm3
; AVX512BW-NEXT: vpsrad $24, %xmm3, %xmm3
; AVX512BW-NEXT: vpslld $24, %xmm2, %xmm2
@@ -821,7 +821,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
define i4 @v4i16(<4 x i16> %a, <4 x i16> %b, <4 x i16> %c, <4 x i16> %d) {
; SSE2-SSSE3-LABEL: v4i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pslld $16, %xmm3
; SSE2-SSSE3-NEXT: psrad $16, %xmm3
; SSE2-SSSE3-NEXT: pslld $16, %xmm2
@@ -838,7 +838,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4i16:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpslld $16, %xmm3, %xmm3
; AVX12-NEXT: vpsrad $16, %xmm3, %xmm3
; AVX12-NEXT: vpslld $16, %xmm2, %xmm2
@@ -855,7 +855,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpslld $16, %xmm3, %xmm3
; AVX512F-NEXT: vpsrad $16, %xmm3, %xmm3
; AVX512F-NEXT: vpslld $16, %xmm2, %xmm2
@@ -872,7 +872,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpslld $16, %xmm3, %xmm3
; AVX512BW-NEXT: vpsrad $16, %xmm3, %xmm3
; AVX512BW-NEXT: vpslld $16, %xmm2, %xmm2
@@ -896,7 +896,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
define i8 @v8i8(<8 x i8> %a, <8 x i8> %b, <8 x i8> %c, <8 x i8> %d) {
; SSE2-SSSE3-LABEL: v8i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllw $8, %xmm3
; SSE2-SSSE3-NEXT: psraw $8, %xmm3
; SSE2-SSSE3-NEXT: psllw $8, %xmm2
@@ -914,7 +914,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v8i8:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpsllw $8, %xmm3, %xmm3
; AVX12-NEXT: vpsraw $8, %xmm3, %xmm3
; AVX12-NEXT: vpsllw $8, %xmm2, %xmm2
@@ -932,7 +932,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v8i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllw $8, %xmm3, %xmm3
; AVX512F-NEXT: vpsraw $8, %xmm3, %xmm3
; AVX512F-NEXT: vpsllw $8, %xmm2, %xmm2
@@ -955,7 +955,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllw $8, %xmm3, %xmm3
; AVX512BW-NEXT: vpsraw $8, %xmm3, %xmm3
; AVX512BW-NEXT: vpsllw $8, %xmm2, %xmm2
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define i4 @v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d) {
; SSE2-SSSE3-LABEL: v4i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [2147483648,0,2147483648,0]
; SSE2-SSSE3-NEXT: pxor %xmm8, %xmm3
; SSE2-SSSE3-NEXT: pxor %xmm8, %xmm1
@@ -58,7 +58,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm5, %xmm4
@@ -76,7 +76,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
@@ -90,7 +90,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v4i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtq %ymm1, %ymm0, %k1
; AVX512F-NEXT: vpcmpgtq %ymm3, %ymm2, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -100,7 +100,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtq %ymm1, %ymm0, %k1
; AVX512BW-NEXT: vpcmpgtq %ymm3, %ymm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -117,7 +117,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
define i4 @v4f64(<4 x double> %a, <4 x double> %b, <4 x double> %c, <4 x double> %d) {
; SSE2-SSSE3-LABEL: v4f64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltpd %xmm1, %xmm3
; SSE2-SSSE3-NEXT: cmpltpd %xmm0, %xmm2
; SSE2-SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
@@ -130,7 +130,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4f64:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX12-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX12-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
@@ -144,7 +144,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4f64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltpd %ymm0, %ymm1, %k1
; AVX512F-NEXT: vcmpltpd %ymm2, %ymm3, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -154,7 +154,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4f64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltpd %ymm0, %ymm1, %k1
; AVX512BW-NEXT: vcmpltpd %ymm2, %ymm3, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -171,7 +171,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
define i16 @v16i16(<16 x i16> %a, <16 x i16> %b, <16 x i16> %c, <16 x i16> %d) {
; SSE2-SSSE3-LABEL: v16i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtw %xmm3, %xmm1
; SSE2-SSSE3-NEXT: pcmpgtw %xmm2, %xmm0
; SSE2-SSSE3-NEXT: packsswb %xmm1, %xmm0
@@ -184,7 +184,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v16i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
; AVX1-NEXT: vpcmpgtw %xmm4, %xmm5, %xmm4
@@ -202,7 +202,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: v16i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
@@ -216,7 +216,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v16i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0
; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
@@ -231,7 +231,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtw %ymm1, %ymm0, %k1
; AVX512BW-NEXT: vpcmpgtw %ymm3, %ymm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -247,7 +247,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
define i8 @v8i32(<8 x i32> %a, <8 x i32> %b, <8 x i32> %c, <8 x i32> %d) {
; SSE2-SSSE3-LABEL: v8i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtd %xmm3, %xmm1
; SSE2-SSSE3-NEXT: pcmpgtd %xmm2, %xmm0
; SSE2-SSSE3-NEXT: packssdw %xmm1, %xmm0
@@ -261,7 +261,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
; AVX1-NEXT: vpcmpgtd %xmm4, %xmm5, %xmm4
@@ -280,7 +280,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
@@ -295,7 +295,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v8i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtd %ymm1, %ymm0, %k1
; AVX512F-NEXT: vpcmpgtd %ymm3, %ymm2, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -304,7 +304,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtd %ymm1, %ymm0, %k1
; AVX512BW-NEXT: vpcmpgtd %ymm3, %ymm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -320,7 +320,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
define i8 @v8f32(<8 x float> %a, <8 x float> %b, <8 x float> %c, <8 x float> %d) {
; SSE2-SSSE3-LABEL: v8f32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltps %xmm1, %xmm3
; SSE2-SSSE3-NEXT: cmpltps %xmm0, %xmm2
; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
@@ -334,7 +334,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v8f32:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX12-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX12-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
@@ -349,7 +349,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v8f32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltps %ymm0, %ymm1, %k1
; AVX512F-NEXT: vcmpltps %ymm2, %ymm3, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -358,7 +358,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8f32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltps %ymm0, %ymm1, %k1
; AVX512BW-NEXT: vcmpltps %ymm2, %ymm3, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -374,7 +374,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
define i32 @v32i8(<32 x i8> %a, <32 x i8> %b, <32 x i8> %c, <32 x i8> %d) {
; SSE2-SSSE3-LABEL: v32i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtb %xmm2, %xmm0
; SSE2-SSSE3-NEXT: pcmpgtb %xmm3, %xmm1
; SSE2-SSSE3-NEXT: pcmpgtb %xmm6, %xmm4
@@ -388,7 +388,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v32i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
; AVX1-NEXT: vpcmpgtb %xmm4, %xmm5, %xmm4
@@ -407,7 +407,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX1-NEXT: retq
;
; AVX2-LABEL: v32i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpcmpgtb %ymm3, %ymm2, %ymm1
; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0
@@ -416,7 +416,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v32i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -443,7 +443,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v32i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtb %ymm1, %ymm0, %k1
; AVX512BW-NEXT: vpcmpgtb %ymm3, %ymm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
Modified: llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define i8 @v8i64(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c, <8 x i64> %d) {
; SSE-LABEL: v8i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
@@ -45,7 +45,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; SSE-NEXT: retq
;
; AVX1-LABEL: v8i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm8
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm9
; AVX1-NEXT: vpcmpgtq %xmm8, %xmm9, %xmm8
@@ -81,7 +81,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v8i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm3, %ymm1, %ymm1
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
; AVX2-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
@@ -109,7 +109,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v8i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtq %zmm1, %zmm0, %k1
; AVX512F-NEXT: vpcmpgtq %zmm3, %zmm2, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -118,7 +118,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtq %zmm1, %zmm0, %k1
; AVX512BW-NEXT: vpcmpgtq %zmm3, %zmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -134,7 +134,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
define i8 @v8f64(<8 x double> %a, <8 x double> %b, <8 x double> %c, <8 x double> %d) {
; SSE-LABEL: v8f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm10
@@ -172,7 +172,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; SSE-NEXT: retq
;
; AVX12-LABEL: v8f64:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltpd %ymm1, %ymm3, %ymm1
; AVX12-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX12-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
@@ -200,7 +200,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v8f64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltpd %zmm0, %zmm1, %k1
; AVX512F-NEXT: vcmpltpd %zmm2, %zmm3, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -209,7 +209,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8f64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltpd %zmm0, %zmm1, %k1
; AVX512BW-NEXT: vcmpltpd %zmm2, %zmm3, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -225,7 +225,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
define i32 @v32i16(<32 x i16> %a, <32 x i16> %b, <32 x i16> %c, <32 x i16> %d) {
; SSE-LABEL: v32i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
@@ -251,7 +251,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; SSE-NEXT: retq
;
; AVX1-LABEL: v32i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm8
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm9
; AVX1-NEXT: vpcmpgtw %xmm8, %xmm9, %xmm8
@@ -282,7 +282,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: v32i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
; AVX2-NEXT: vpacksswb %xmm3, %xmm1, %xmm1
@@ -303,7 +303,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v32i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -598,7 +598,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v32i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtw %zmm1, %zmm0, %k1
; AVX512BW-NEXT: vpcmpgtw %zmm3, %zmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -613,7 +613,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
define i16 @v16i32(<16 x i32> %a, <16 x i32> %b, <16 x i32> %c, <16 x i32> %d) {
; SSE-LABEL: v16i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
@@ -638,7 +638,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; SSE-NEXT: retq
;
; AVX1-LABEL: v16i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm8
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm9
; AVX1-NEXT: vpcmpgtd %xmm8, %xmm9, %xmm8
@@ -668,7 +668,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: v16i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3
; AVX2-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
@@ -690,7 +690,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v16i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtd %zmm1, %zmm0, %k1
; AVX512F-NEXT: vpcmpgtd %zmm3, %zmm2, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -699,7 +699,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtd %zmm1, %zmm0, %k1
; AVX512BW-NEXT: vpcmpgtd %zmm3, %zmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -715,7 +715,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
define i16 @v16f32(<16 x float> %a, <16 x float> %b, <16 x float> %c, <16 x float> %d) {
; SSE-LABEL: v16f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movaps {{[0-9]+}}(%rsp), %xmm10
@@ -740,7 +740,7 @@ define i16 @v16f32(<16 x float> %a, <16
; SSE-NEXT: retq
;
; AVX12-LABEL: v16f32:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltps %ymm1, %ymm3, %ymm1
; AVX12-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX12-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
@@ -762,7 +762,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v16f32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltps %zmm0, %zmm1, %k1
; AVX512F-NEXT: vcmpltps %zmm2, %zmm3, %k0 {%k1}
; AVX512F-NEXT: kmovw %k0, %eax
@@ -771,7 +771,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16f32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltps %zmm0, %zmm1, %k1
; AVX512BW-NEXT: vcmpltps %zmm2, %zmm3, %k0 {%k1}
; AVX512BW-NEXT: kmovd %k0, %eax
@@ -787,7 +787,7 @@ define i16 @v16f32(<16 x float> %a, <16
define i64 @v64i8(<64 x i8> %a, <64 x i8> %b, <64 x i8> %c, <64 x i8> %d) {
; SSE-LABEL: v64i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9
@@ -1009,7 +1009,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; SSE-NEXT: retq
;
; AVX1-LABEL: v64i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
; AVX1-NEXT: .cfi_def_cfa_offset 16
; AVX1-NEXT: .cfi_offset %rbp, -16
@@ -1243,7 +1243,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX1-NEXT: retq
;
; AVX2-LABEL: v64i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: pushq %rbp
; AVX2-NEXT: .cfi_def_cfa_offset 16
; AVX2-NEXT: .cfi_offset %rbp, -16
@@ -1461,7 +1461,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v64i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -1503,7 +1503,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v64i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtb %zmm1, %zmm0, %k1
; AVX512BW-NEXT: vpcmpgtb %zmm3, %zmm2, %k0 {%k1}
; AVX512BW-NEXT: kmovq %k0, %rax
Modified: llvm/trunk/test/CodeGen/X86/bitcast-i256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-i256.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-i256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-i256.ll Mon Dec 4 09:18:51 2017
@@ -4,14 +4,14 @@
define i256 @foo(<8 x i32> %a) {
; FAST-LABEL: foo:
-; FAST: # BB#0:
+; FAST: # %bb.0:
; FAST-NEXT: vmovups %ymm0, (%rdi)
; FAST-NEXT: movq %rdi, %rax
; FAST-NEXT: vzeroupper
; FAST-NEXT: retq
;
; SLOW-LABEL: foo:
-; SLOW: # BB#0:
+; SLOW: # %bb.0:
; SLOW-NEXT: vextractf128 $1, %ymm0, 16(%rdi)
; SLOW-NEXT: vmovups %xmm0, (%rdi)
; SLOW-NEXT: movq %rdi, %rax
Modified: llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll Mon Dec 4 09:18:51 2017
@@ -11,7 +11,7 @@
define <2 x i64> @ext_i2_2i64(i2 %a0) {
; SSE2-SSSE3-LABEL: ext_i2_2i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-SSSE3-NEXT: movq %rdi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
@@ -23,7 +23,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i2_2i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
@@ -33,7 +33,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i2_2i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
@@ -43,7 +43,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i2_2i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: andb $3, %dil
; AVX512-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -59,7 +59,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
define <4 x i32> @ext_i4_4i32(i4 %a0) {
; SSE2-SSSE3-LABEL: ext_i4_4i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -68,7 +68,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i4_4i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -77,7 +77,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i4_4i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastd %xmm0, %xmm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -86,7 +86,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i4_4i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: andb $15, %dil
; AVX512-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -103,7 +103,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
define <8 x i16> @ext_i8_8i16(i8 %a0) {
; SSE2-SSSE3-LABEL: ext_i8_8i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -113,7 +113,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i8_8i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -123,7 +123,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i8_8i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %xmm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128]
@@ -132,7 +132,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i8_8i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2w %k0, %xmm0
; AVX512-NEXT: retq
@@ -143,7 +143,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
define <16 x i8> @ext_i16_16i8(i16 %a0) {
; SSE2-LABEL: ext_i16_16i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movd %edi, %xmm0
; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,1,1,4,5,6,7]
@@ -154,7 +154,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; SSE2-NEXT: retq
;
; SSSE3-LABEL: ext_i16_16i8:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: movd %edi, %xmm0
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
@@ -163,7 +163,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i16_16i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; AVX1-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
@@ -172,7 +172,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i16_16i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm1 = [9241421688590303745,9241421688590303745]
@@ -181,7 +181,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i16_16i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2b %k0, %xmm0
; AVX512-NEXT: retq
@@ -196,7 +196,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
define <4 x i64> @ext_i4_4i64(i4 %a0) {
; SSE2-SSSE3-LABEL: ext_i4_4i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-SSSE3-NEXT: movq %rdi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,1,0,1]
@@ -214,7 +214,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i4_4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
@@ -231,7 +231,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i4_4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpbroadcastq %xmm0, %ymm0
@@ -241,7 +241,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i4_4i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: andb $15, %dil
; AVX512-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -256,7 +256,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
define <8 x i32> @ext_i8_8i32(i8 %a0) {
; SSE2-SSSE3-LABEL: ext_i8_8i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8]
@@ -269,7 +269,7 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i8_8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
@@ -285,7 +285,7 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i8_8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastd %xmm0, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128]
@@ -294,7 +294,7 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i8_8i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k1
; AVX512-NEXT: vpcmpeqd %ymm0, %ymm0, %ymm0
; AVX512-NEXT: vmovdqa32 %ymm0, %ymm0 {%k1} {z}
@@ -306,7 +306,7 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
define <16 x i16> @ext_i16_16i16(i16 %a0) {
; SSE2-SSSE3-LABEL: ext_i16_16i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,1]
@@ -320,7 +320,7 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i16_16i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -337,7 +337,7 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i16_16i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768]
@@ -346,7 +346,7 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i16_16i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2w %k0, %ymm0
; AVX512-NEXT: retq
@@ -357,7 +357,7 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
define <32 x i8> @ext_i32_32i8(i32 %a0) {
; SSE2-SSSE3-LABEL: ext_i32_32i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm1
; SSE2-SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[0,0,1,1,4,5,6,7]
@@ -372,7 +372,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i32_32i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[0,0,1,1,4,5,6,7]
@@ -392,7 +392,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i32_32i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[0,0,1,1,4,5,6,7]
@@ -406,7 +406,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i32_32i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2b %k0, %ymm0
; AVX512-NEXT: retq
@@ -421,7 +421,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
define <8 x i64> @ext_i8_8i64(i8 %a0) {
; SSE2-SSSE3-LABEL: ext_i8_8i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-SSSE3-NEXT: movq %rdi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,1,0,1]
@@ -451,7 +451,7 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i8_8i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
@@ -475,7 +475,7 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i8_8i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpbroadcastq %xmm0, %ymm1
@@ -488,7 +488,7 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i8_8i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k1
; AVX512-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; AVX512-NEXT: retq
@@ -499,7 +499,7 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
define <16 x i32> @ext_i16_16i32(i16 %a0) {
; SSE2-SSSE3-LABEL: ext_i16_16i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,0,0]
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -520,7 +520,7 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i16_16i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
@@ -543,7 +543,7 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i16_16i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastd %xmm0, %ymm1
; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [1,2,4,8,16,32,64,128]
@@ -555,7 +555,7 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i16_16i32:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k1
; AVX512-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
; AVX512-NEXT: retq
@@ -566,7 +566,7 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
define <32 x i16> @ext_i32_32i16(i32 %a0) {
; SSE2-SSSE3-LABEL: ext_i32_32i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm2
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm2[0,0,0,0,4,5,6,7]
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,1]
@@ -587,7 +587,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i32_32i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm1
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm1[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -615,7 +615,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i32_32i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768]
@@ -629,7 +629,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i32_32i16:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2w %k0, %zmm0
; AVX512-NEXT: retq
@@ -640,7 +640,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
define <64 x i8> @ext_i64_64i8(i64 %a0) {
; SSE2-SSSE3-LABEL: ext_i64_64i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movq %rdi, %xmm3
; SSE2-SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm3[0,0,1,1,4,5,6,7]
@@ -663,7 +663,7 @@ define <64 x i8> @ext_i64_64i8(i64 %a0)
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i64_64i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm1[0,0,1,1,4,5,6,7]
@@ -696,7 +696,7 @@ define <64 x i8> @ext_i64_64i8(i64 %a0)
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i64_64i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm1[0,0,1,1,4,5,6,7]
@@ -717,7 +717,7 @@ define <64 x i8> @ext_i64_64i8(i64 %a0)
; AVX2-NEXT: retq
;
; AVX512-LABEL: ext_i64_64i8:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovq %rdi, %k0
; AVX512-NEXT: vpmovm2b %k0, %zmm0
; AVX512-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll Mon Dec 4 09:18:51 2017
@@ -12,7 +12,7 @@
define <2 x i64> @ext_i2_2i64(i2 %a0) {
; SSE2-SSSE3-LABEL: ext_i2_2i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-SSSE3-NEXT: movq %rdi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
@@ -25,7 +25,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i2_2i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
@@ -36,7 +36,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i2_2i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
@@ -47,7 +47,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i2_2i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: andb $3, %dil
; AVX512F-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512F-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -58,7 +58,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i2_2i64:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: andb $3, %dil
; AVX512VLBW-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512VLBW-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -74,7 +74,7 @@ define <2 x i64> @ext_i2_2i64(i2 %a0) {
define <4 x i32> @ext_i4_4i32(i4 %a0) {
; SSE2-SSSE3-LABEL: ext_i4_4i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -84,7 +84,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i4_4i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -94,7 +94,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i4_4i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastd %xmm0, %xmm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -104,7 +104,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i4_4i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: andb $15, %dil
; AVX512F-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512F-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -116,7 +116,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i4_4i32:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: andb $15, %dil
; AVX512VLBW-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512VLBW-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -132,7 +132,7 @@ define <4 x i32> @ext_i4_4i32(i4 %a0) {
define <8 x i16> @ext_i8_8i16(i8 %a0) {
; SSE2-SSSE3-LABEL: ext_i8_8i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -143,7 +143,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i8_8i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -154,7 +154,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i8_8i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %xmm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128]
@@ -164,7 +164,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i8_8i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: kmovw %edi, %k1
; AVX512F-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512F-NEXT: vpmovqw %zmm0, %xmm0
@@ -172,7 +172,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i8_8i16:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vmovdqu16 {{.*}}(%rip), %xmm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -183,7 +183,7 @@ define <8 x i16> @ext_i8_8i16(i8 %a0) {
define <16 x i8> @ext_i16_16i8(i16 %a0) {
; SSE2-LABEL: ext_i16_16i8:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movd %edi, %xmm0
; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,1,1,4,5,6,7]
@@ -196,7 +196,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; SSE2-NEXT: retq
;
; SSSE3-LABEL: ext_i16_16i8:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: movd %edi, %xmm0
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
@@ -207,7 +207,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i16_16i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; AVX1-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
@@ -218,7 +218,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i16_16i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm1 = [9241421688590303745,9241421688590303745]
@@ -229,7 +229,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i16_16i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: kmovw %edi, %k1
; AVX512F-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
@@ -237,7 +237,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i16_16i8:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vmovdqu8 {{.*}}(%rip), %xmm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -252,7 +252,7 @@ define <16 x i8> @ext_i16_16i8(i16 %a0)
define <4 x i64> @ext_i4_4i64(i4 %a0) {
; SSE2-SSSE3-LABEL: ext_i4_4i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-SSSE3-NEXT: movq %rdi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,1,0,1]
@@ -272,7 +272,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i4_4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
@@ -291,7 +291,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i4_4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpbroadcastq %xmm0, %ymm0
@@ -302,7 +302,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i4_4i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: andb $15, %dil
; AVX512F-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512F-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -312,7 +312,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i4_4i64:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: andb $15, %dil
; AVX512VLBW-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512VLBW-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
@@ -327,7 +327,7 @@ define <4 x i64> @ext_i4_4i64(i4 %a0) {
define <8 x i32> @ext_i8_8i32(i8 %a0) {
; SSE2-SSSE3-LABEL: ext_i8_8i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,0,0]
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8]
@@ -342,7 +342,7 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i8_8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
@@ -360,7 +360,7 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i8_8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastd %xmm0, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128]
@@ -370,14 +370,14 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i8_8i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: kmovw %edi, %k1
; AVX512F-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512F-NEXT: vpmovqd %zmm0, %ymm0
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i8_8i32:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vpbroadcastd {{.*}}(%rip), %ymm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -388,7 +388,7 @@ define <8 x i32> @ext_i8_8i32(i8 %a0) {
define <16 x i16> @ext_i16_16i16(i16 %a0) {
; SSE2-SSSE3-LABEL: ext_i16_16i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,1]
@@ -404,7 +404,7 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i16_16i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -423,7 +423,7 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i16_16i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768]
@@ -433,14 +433,14 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i16_16i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: kmovw %edi, %k1
; AVX512F-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i16_16i16:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vmovdqu16 {{.*}}(%rip), %ymm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -451,7 +451,7 @@ define <16 x i16> @ext_i16_16i16(i16 %a0
define <32 x i8> @ext_i32_32i8(i32 %a0) {
; SSE2-SSSE3-LABEL: ext_i32_32i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm1
; SSE2-SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[0,0,1,1,4,5,6,7]
@@ -471,7 +471,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i32_32i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[0,0,1,1,4,5,6,7]
@@ -496,7 +496,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i32_32i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[0,0,1,1,4,5,6,7]
@@ -512,7 +512,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i32_32i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -534,7 +534,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i32_32i8:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vmovdqu8 {{.*}}(%rip), %ymm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -549,7 +549,7 @@ define <32 x i8> @ext_i32_32i8(i32 %a0)
define <8 x i64> @ext_i8_8i64(i8 %a0) {
; SSE2-SSSE3-LABEL: ext_i8_8i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-SSSE3-NEXT: movq %rdi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,1,0,1]
@@ -583,7 +583,7 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i8_8i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
@@ -611,7 +611,7 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i8_8i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpbroadcastq %xmm0, %ymm1
@@ -626,13 +626,13 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i8_8i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: kmovw %edi, %k1
; AVX512F-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i8_8i64:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -643,7 +643,7 @@ define <8 x i64> @ext_i8_8i64(i8 %a0) {
define <16 x i32> @ext_i16_16i32(i16 %a0) {
; SSE2-SSSE3-LABEL: ext_i16_16i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,0,0]
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -668,7 +668,7 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i16_16i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
@@ -695,7 +695,7 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i16_16i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastd %xmm0, %ymm1
; AVX2-NEXT: vmovdqa {{.*#+}} ymm0 = [1,2,4,8,16,32,64,128]
@@ -709,13 +709,13 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i16_16i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: kmovw %edi, %k1
; AVX512F-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i16_16i32:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -726,7 +726,7 @@ define <16 x i32> @ext_i16_16i32(i16 %a0
define <32 x i16> @ext_i32_32i16(i32 %a0) {
; SSE2-SSSE3-LABEL: ext_i32_32i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm2
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm2[0,0,0,0,4,5,6,7]
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,1]
@@ -751,7 +751,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i32_32i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm1
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm1[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -783,7 +783,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i32_32i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %ymm0
; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768]
@@ -799,7 +799,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i32_32i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -824,7 +824,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i32_32i16:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovd %edi, %k1
; AVX512VLBW-NEXT: vmovdqu16 {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
@@ -835,7 +835,7 @@ define <32 x i16> @ext_i32_32i16(i32 %a0
define <64 x i8> @ext_i64_64i8(i64 %a0) {
; SSE2-SSSE3-LABEL: ext_i64_64i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movq %rdi, %xmm3
; SSE2-SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm3[0,0,1,1,4,5,6,7]
@@ -867,7 +867,7 @@ define <64 x i8> @ext_i64_64i8(i64 %a0)
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: ext_i64_64i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm1[0,0,1,1,4,5,6,7]
@@ -909,7 +909,7 @@ define <64 x i8> @ext_i64_64i8(i64 %a0)
; AVX1-NEXT: retq
;
; AVX2-LABEL: ext_i64_64i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX2-NEXT: vpshuflw {{.*#+}} xmm0 = xmm1[0,0,1,1,4,5,6,7]
@@ -935,7 +935,7 @@ define <64 x i8> @ext_i64_64i8(i64 %a0)
; AVX2-NEXT: retq
;
; AVX512F-LABEL: ext_i64_64i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -966,7 +966,7 @@ define <64 x i8> @ext_i64_64i8(i64 %a0)
; AVX512F-NEXT: retq
;
; AVX512VLBW-LABEL: ext_i64_64i8:
-; AVX512VLBW: # BB#0:
+; AVX512VLBW: # %bb.0:
; AVX512VLBW-NEXT: kmovq %rdi, %k1
; AVX512VLBW-NEXT: vmovdqu8 {{.*}}(%rip), %zmm0 {%k1} {z}
; AVX512VLBW-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define <2 x i1> @bitcast_i2_2i1(i2 zeroext %a0) {
; SSE2-SSSE3-LABEL: bitcast_i2_2i1:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; SSE2-SSSE3-NEXT: movq %rdi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,1,0,1]
@@ -20,7 +20,7 @@ define <2 x i1> @bitcast_i2_2i1(i2 zeroe
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: bitcast_i2_2i1:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX1-NEXT: vmovq %rdi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
@@ -31,7 +31,7 @@ define <2 x i1> @bitcast_i2_2i1(i2 zeroe
; AVX1-NEXT: retq
;
; AVX2-LABEL: bitcast_i2_2i1:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; AVX2-NEXT: vmovq %rdi, %xmm0
; AVX2-NEXT: vpbroadcastq %xmm0, %xmm0
@@ -42,7 +42,7 @@ define <2 x i1> @bitcast_i2_2i1(i2 zeroe
; AVX2-NEXT: retq
;
; AVX512-LABEL: bitcast_i2_2i1:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; AVX512-NEXT: kmovd %eax, %k1
@@ -56,7 +56,7 @@ define <2 x i1> @bitcast_i2_2i1(i2 zeroe
define <4 x i1> @bitcast_i4_4i1(i4 zeroext %a0) {
; SSE2-SSSE3-LABEL: bitcast_i4_4i1:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -66,7 +66,7 @@ define <4 x i1> @bitcast_i4_4i1(i4 zeroe
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: bitcast_i4_4i1:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -76,7 +76,7 @@ define <4 x i1> @bitcast_i4_4i1(i4 zeroe
; AVX1-NEXT: retq
;
; AVX2-LABEL: bitcast_i4_4i1:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastd %xmm0, %xmm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8]
@@ -86,7 +86,7 @@ define <4 x i1> @bitcast_i4_4i1(i4 zeroe
; AVX2-NEXT: retq
;
; AVX512-LABEL: bitcast_i4_4i1:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: movb %dil, -{{[0-9]+}}(%rsp)
; AVX512-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax
; AVX512-NEXT: kmovd %eax, %k1
@@ -101,7 +101,7 @@ define <4 x i1> @bitcast_i4_4i1(i4 zeroe
define <8 x i1> @bitcast_i8_8i1(i8 zeroext %a0) {
; SSE2-SSSE3-LABEL: bitcast_i8_8i1:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movd %edi, %xmm0
; SSE2-SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -112,7 +112,7 @@ define <8 x i1> @bitcast_i8_8i1(i8 zeroe
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: bitcast_i8_8i1:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -123,7 +123,7 @@ define <8 x i1> @bitcast_i8_8i1(i8 zeroe
; AVX1-NEXT: retq
;
; AVX2-LABEL: bitcast_i8_8i1:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %xmm0
; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128]
@@ -133,7 +133,7 @@ define <8 x i1> @bitcast_i8_8i1(i8 zeroe
; AVX2-NEXT: retq
;
; AVX512-LABEL: bitcast_i8_8i1:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2w %k0, %xmm0
; AVX512-NEXT: retq
@@ -143,7 +143,7 @@ define <8 x i1> @bitcast_i8_8i1(i8 zeroe
define <16 x i1> @bitcast_i16_16i1(i16 zeroext %a0) {
; SSE2-LABEL: bitcast_i16_16i1:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movd %edi, %xmm0
; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,1,1,4,5,6,7]
@@ -156,7 +156,7 @@ define <16 x i1> @bitcast_i16_16i1(i16 z
; SSE2-NEXT: retq
;
; SSSE3-LABEL: bitcast_i16_16i1:
-; SSSE3: # BB#0:
+; SSSE3: # %bb.0:
; SSSE3-NEXT: movd %edi, %xmm0
; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128]
@@ -167,7 +167,7 @@ define <16 x i1> @bitcast_i16_16i1(i16 z
; SSSE3-NEXT: retq
;
; AVX1-LABEL: bitcast_i16_16i1:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; AVX1-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
@@ -178,7 +178,7 @@ define <16 x i1> @bitcast_i16_16i1(i16 z
; AVX1-NEXT: retq
;
; AVX2-LABEL: bitcast_i16_16i1:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1]
; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm1 = [9241421688590303745,9241421688590303745]
@@ -189,7 +189,7 @@ define <16 x i1> @bitcast_i16_16i1(i16 z
; AVX2-NEXT: retq
;
; AVX512-LABEL: bitcast_i16_16i1:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2b %k0, %xmm0
; AVX512-NEXT: retq
@@ -199,13 +199,13 @@ define <16 x i1> @bitcast_i16_16i1(i16 z
define <32 x i1> @bitcast_i32_32i1(i32 %a0) {
; SSE2-SSSE3-LABEL: bitcast_i32_32i1:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movl %esi, (%rdi)
; SSE2-SSSE3-NEXT: movq %rdi, %rax
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: bitcast_i32_32i1:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[0,0,1,1,4,5,6,7]
@@ -230,7 +230,7 @@ define <32 x i1> @bitcast_i32_32i1(i32 %
; AVX1-NEXT: retq
;
; AVX2-LABEL: bitcast_i32_32i1:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; AVX2-NEXT: vpshuflw {{.*#+}} xmm1 = xmm0[0,0,1,1,4,5,6,7]
@@ -246,7 +246,7 @@ define <32 x i1> @bitcast_i32_32i1(i32 %
; AVX2-NEXT: retq
;
; AVX512-LABEL: bitcast_i32_32i1:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovd %edi, %k0
; AVX512-NEXT: vpmovm2b %k0, %ymm0
; AVX512-NEXT: retq
@@ -256,19 +256,19 @@ define <32 x i1> @bitcast_i32_32i1(i32 %
define <64 x i1> @bitcast_i64_64i1(i64 %a0) {
; SSE2-SSSE3-LABEL: bitcast_i64_64i1:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movq %rsi, (%rdi)
; SSE2-SSSE3-NEXT: movq %rdi, %rax
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: bitcast_i64_64i1:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: movq %rsi, (%rdi)
; AVX12-NEXT: movq %rdi, %rax
; AVX12-NEXT: retq
;
; AVX512-LABEL: bitcast_i64_64i1:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: kmovq %rdi, %k0
; AVX512-NEXT: vpmovm2b %k0, %zmm0
; AVX512-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define i1 @foo(i64 %a) {
; X86-LABEL: foo:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: flds {{[0-9]+}}(%esp)
; X86-NEXT: flds {{[0-9]+}}(%esp)
; X86-NEXT: fucompp
@@ -16,14 +16,14 @@ define i1 @foo(i64 %a) {
; X86-NEXT: retl
;
; X86-SSE-LABEL: foo:
-; X86-SSE: # BB#0:
+; X86-SSE: # %bb.0:
; X86-SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; X86-SSE-NEXT: ucomiss {{[0-9]+}}(%esp), %xmm0
; X86-SSE-NEXT: setp %al
; X86-SSE-NEXT: retl
;
; X64-LABEL: foo:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdi, %xmm0
; X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
; X64-NEXT: ucomiss %xmm1, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/bitcast-mmx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-mmx.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-mmx.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-mmx.ll Mon Dec 4 09:18:51 2017
@@ -4,13 +4,13 @@
define i32 @t0(i64 %x) nounwind {
; X86-LABEL: t0:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: pshufw $238, {{[0-9]+}}(%esp), %mm0 # mm0 = mem[2,3,2,3]
; X86-NEXT: movd %mm0, %eax
; X86-NEXT: retl
;
; X64-LABEL: t0:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movd %rdi, %mm0
; X64-NEXT: pshufw $238, %mm0, %mm0 # mm0 = mm0[2,3,2,3]
; X64-NEXT: movd %mm0, %eax
@@ -29,7 +29,7 @@ entry:
define i64 @t1(i64 %x, i32 %n) nounwind {
; X86-LABEL: t1:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp
@@ -45,7 +45,7 @@ define i64 @t1(i64 %x, i32 %n) nounwind
; X86-NEXT: retl
;
; X64-LABEL: t1:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movd %esi, %mm0
; X64-NEXT: movd %rdi, %mm1
; X64-NEXT: psllq %mm0, %mm1
@@ -60,7 +60,7 @@ entry:
define i64 @t2(i64 %x, i32 %n, i32 %w) nounwind {
; X86-LABEL: t2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp
@@ -77,7 +77,7 @@ define i64 @t2(i64 %x, i32 %n, i32 %w) n
; X86-NEXT: retl
;
; X64-LABEL: t2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movd %esi, %mm0
; X64-NEXT: movd %edx, %mm1
; X64-NEXT: psllq %mm0, %mm1
@@ -98,7 +98,7 @@ entry:
define i64 @t3(<1 x i64>* %y, i32* %n) nounwind {
; X86-LABEL: t3:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
; X86-NEXT: andl $-8, %esp
@@ -116,7 +116,7 @@ define i64 @t3(<1 x i64>* %y, i32* %n) n
; X86-NEXT: retl
;
; X64-LABEL: t3:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: movq (%rdi), %mm0
; X64-NEXT: movd (%rsi), %mm1
; X64-NEXT: psllq %mm1, %mm0
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define i8 @v8i16(<8 x i16> %a, <8 x i16> %b) {
; SSE2-SSSE3-LABEL: v8i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtw %xmm1, %xmm0
; SSE2-SSSE3-NEXT: packsswb %xmm0, %xmm0
; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
@@ -16,7 +16,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v8i16:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
; AVX12-NEXT: vpmovmskb %xmm0, %eax
@@ -24,7 +24,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v8i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vpmovsxwq %xmm0, %zmm0
; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -35,7 +35,7 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtw %xmm1, %xmm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -47,21 +47,21 @@ define i8 @v8i16(<8 x i16> %a, <8 x i16>
define i4 @v4i32(<4 x i32> %a, <4 x i32> %b) {
; SSE2-SSSE3-LABEL: v4i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtd %xmm1, %xmm0
; SSE2-SSSE3-NEXT: movmskps %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4i32:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vmovmskps %xmm0, %eax
; AVX12-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -69,7 +69,7 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtd %xmm1, %xmm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -82,21 +82,21 @@ define i4 @v4i32(<4 x i32> %a, <4 x i32>
define i4 @v4f32(<4 x float> %a, <4 x float> %b) {
; SSE2-SSSE3-LABEL: v4f32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltps %xmm0, %xmm1
; SSE2-SSSE3-NEXT: movmskps %xmm1, %eax
; SSE2-SSSE3-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4f32:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltps %xmm0, %xmm1, %xmm0
; AVX12-NEXT: vmovmskps %xmm0, %eax
; AVX12-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4f32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltps %xmm0, %xmm1, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -104,7 +104,7 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4f32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltps %xmm0, %xmm1, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -117,21 +117,21 @@ define i4 @v4f32(<4 x float> %a, <4 x fl
define i16 @v16i8(<16 x i8> %a, <16 x i8> %b) {
; SSE2-SSSE3-LABEL: v16i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtb %xmm1, %xmm0
; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %eax
; SSE2-SSSE3-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v16i8:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vpmovmskb %xmm0, %eax
; AVX12-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v16i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0
; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
@@ -142,7 +142,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtb %xmm1, %xmm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -154,7 +154,7 @@ define i16 @v16i8(<16 x i8> %a, <16 x i8
define i2 @v2i8(<2 x i8> %a, <2 x i8> %b) {
; SSE2-SSSE3-LABEL: v2i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllq $56, %xmm0
; SSE2-SSSE3-NEXT: movdqa %xmm0, %xmm2
; SSE2-SSSE3-NEXT: psrad $31, %xmm2
@@ -185,7 +185,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v2i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpsllq $56, %xmm1, %xmm1
; AVX1-NEXT: vpsrad $31, %xmm1, %xmm2
; AVX1-NEXT: vpsrad $24, %xmm1, %xmm1
@@ -202,7 +202,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX1-NEXT: retq
;
; AVX2-LABEL: v2i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $56, %xmm1, %xmm1
; AVX2-NEXT: vpsrad $31, %xmm1, %xmm2
; AVX2-NEXT: vpsrad $24, %xmm1, %xmm1
@@ -219,7 +219,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v2i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllq $56, %xmm1, %xmm1
; AVX512F-NEXT: vpsraq $56, %xmm1, %xmm1
; AVX512F-NEXT: vpsllq $56, %xmm0, %xmm0
@@ -231,7 +231,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllq $56, %xmm1, %xmm1
; AVX512BW-NEXT: vpsraq $56, %xmm1, %xmm1
; AVX512BW-NEXT: vpsllq $56, %xmm0, %xmm0
@@ -248,7 +248,7 @@ define i2 @v2i8(<2 x i8> %a, <2 x i8> %b
define i2 @v2i16(<2 x i16> %a, <2 x i16> %b) {
; SSE2-SSSE3-LABEL: v2i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllq $48, %xmm0
; SSE2-SSSE3-NEXT: movdqa %xmm0, %xmm2
; SSE2-SSSE3-NEXT: psrad $31, %xmm2
@@ -279,7 +279,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v2i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpsllq $48, %xmm1, %xmm1
; AVX1-NEXT: vpsrad $31, %xmm1, %xmm2
; AVX1-NEXT: vpsrad $16, %xmm1, %xmm1
@@ -296,7 +296,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v2i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $48, %xmm1, %xmm1
; AVX2-NEXT: vpsrad $31, %xmm1, %xmm2
; AVX2-NEXT: vpsrad $16, %xmm1, %xmm1
@@ -313,7 +313,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v2i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllq $48, %xmm1, %xmm1
; AVX512F-NEXT: vpsraq $48, %xmm1, %xmm1
; AVX512F-NEXT: vpsllq $48, %xmm0, %xmm0
@@ -325,7 +325,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllq $48, %xmm1, %xmm1
; AVX512BW-NEXT: vpsraq $48, %xmm1, %xmm1
; AVX512BW-NEXT: vpsllq $48, %xmm0, %xmm0
@@ -342,7 +342,7 @@ define i2 @v2i16(<2 x i16> %a, <2 x i16>
define i2 @v2i32(<2 x i32> %a, <2 x i32> %b) {
; SSE2-SSSE3-LABEL: v2i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllq $32, %xmm0
; SSE2-SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,3,2,3]
; SSE2-SSSE3-NEXT: psrad $31, %xmm0
@@ -369,7 +369,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v2i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1
; AVX1-NEXT: vpsrad $31, %xmm1, %xmm2
; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -384,7 +384,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v2i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpsllq $32, %xmm1, %xmm1
; AVX2-NEXT: vpsrad $31, %xmm1, %xmm2
; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
@@ -399,7 +399,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v2i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllq $32, %xmm1, %xmm1
; AVX512F-NEXT: vpsraq $32, %xmm1, %xmm1
; AVX512F-NEXT: vpsllq $32, %xmm0, %xmm0
@@ -411,7 +411,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllq $32, %xmm1, %xmm1
; AVX512BW-NEXT: vpsraq $32, %xmm1, %xmm1
; AVX512BW-NEXT: vpsllq $32, %xmm0, %xmm0
@@ -428,7 +428,7 @@ define i2 @v2i32(<2 x i32> %a, <2 x i32>
define i2 @v2i64(<2 x i64> %a, <2 x i64> %b) {
; SSE2-SSSE3-LABEL: v2i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0]
; SSE2-SSSE3-NEXT: pxor %xmm2, %xmm1
; SSE2-SSSE3-NEXT: pxor %xmm2, %xmm0
@@ -445,14 +445,14 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v2i64:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0
; AVX12-NEXT: vmovmskpd %xmm0, %eax
; AVX12-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v2i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -460,7 +460,7 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtq %xmm1, %xmm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -473,21 +473,21 @@ define i2 @v2i64(<2 x i64> %a, <2 x i64>
define i2 @v2f64(<2 x double> %a, <2 x double> %b) {
; SSE2-SSSE3-LABEL: v2f64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltpd %xmm0, %xmm1
; SSE2-SSSE3-NEXT: movmskpd %xmm1, %eax
; SSE2-SSSE3-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v2f64:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltpd %xmm0, %xmm1, %xmm0
; AVX12-NEXT: vmovmskpd %xmm0, %eax
; AVX12-NEXT: # kill: %al<def> %al<kill> %eax<kill>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v2f64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltpd %xmm0, %xmm1, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -495,7 +495,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v2f64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltpd %xmm0, %xmm1, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -508,7 +508,7 @@ define i2 @v2f64(<2 x double> %a, <2 x d
define i4 @v4i8(<4 x i8> %a, <4 x i8> %b) {
; SSE2-SSSE3-LABEL: v4i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pslld $24, %xmm1
; SSE2-SSSE3-NEXT: psrad $24, %xmm1
; SSE2-SSSE3-NEXT: pslld $24, %xmm0
@@ -519,7 +519,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4i8:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpslld $24, %xmm1, %xmm1
; AVX12-NEXT: vpsrad $24, %xmm1, %xmm1
; AVX12-NEXT: vpslld $24, %xmm0, %xmm0
@@ -530,7 +530,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpslld $24, %xmm1, %xmm1
; AVX512F-NEXT: vpsrad $24, %xmm1, %xmm1
; AVX512F-NEXT: vpslld $24, %xmm0, %xmm0
@@ -542,7 +542,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpslld $24, %xmm1, %xmm1
; AVX512BW-NEXT: vpsrad $24, %xmm1, %xmm1
; AVX512BW-NEXT: vpslld $24, %xmm0, %xmm0
@@ -559,7 +559,7 @@ define i4 @v4i8(<4 x i8> %a, <4 x i8> %b
define i4 @v4i16(<4 x i16> %a, <4 x i16> %b) {
; SSE2-SSSE3-LABEL: v4i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pslld $16, %xmm1
; SSE2-SSSE3-NEXT: psrad $16, %xmm1
; SSE2-SSSE3-NEXT: pslld $16, %xmm0
@@ -570,7 +570,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4i16:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpslld $16, %xmm1, %xmm1
; AVX12-NEXT: vpsrad $16, %xmm1, %xmm1
; AVX12-NEXT: vpslld $16, %xmm0, %xmm0
@@ -581,7 +581,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpslld $16, %xmm1, %xmm1
; AVX512F-NEXT: vpsrad $16, %xmm1, %xmm1
; AVX512F-NEXT: vpslld $16, %xmm0, %xmm0
@@ -593,7 +593,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpslld $16, %xmm1, %xmm1
; AVX512BW-NEXT: vpsrad $16, %xmm1, %xmm1
; AVX512BW-NEXT: vpslld $16, %xmm0, %xmm0
@@ -610,7 +610,7 @@ define i4 @v4i16(<4 x i16> %a, <4 x i16>
define i8 @v8i8(<8 x i8> %a, <8 x i8> %b) {
; SSE2-SSSE3-LABEL: v8i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: psllw $8, %xmm1
; SSE2-SSSE3-NEXT: psraw $8, %xmm1
; SSE2-SSSE3-NEXT: psllw $8, %xmm0
@@ -622,7 +622,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v8i8:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vpsllw $8, %xmm1, %xmm1
; AVX12-NEXT: vpsraw $8, %xmm1, %xmm1
; AVX12-NEXT: vpsllw $8, %xmm0, %xmm0
@@ -634,7 +634,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v8i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpsllw $8, %xmm1, %xmm1
; AVX512F-NEXT: vpsraw $8, %xmm1, %xmm1
; AVX512F-NEXT: vpsllw $8, %xmm0, %xmm0
@@ -649,7 +649,7 @@ define i8 @v8i8(<8 x i8> %a, <8 x i8> %b
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpsllw $8, %xmm1, %xmm1
; AVX512BW-NEXT: vpsraw $8, %xmm1, %xmm1
; AVX512BW-NEXT: vpsllw $8, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define i16 @v16i16(<16 x i16> %a, <16 x i16> %b) {
; SSE2-SSSE3-LABEL: v16i16:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtw %xmm3, %xmm1
; SSE2-SSSE3-NEXT: pcmpgtw %xmm2, %xmm0
; SSE2-SSSE3-NEXT: packsswb %xmm1, %xmm0
@@ -17,7 +17,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v16i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtw %xmm2, %xmm3, %xmm2
@@ -29,7 +29,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: v16i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0
@@ -39,7 +39,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v16i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0
; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0
; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0
@@ -50,7 +50,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtw %ymm1, %ymm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -63,7 +63,7 @@ define i16 @v16i16(<16 x i16> %a, <16 x
define i8 @v8i32(<8 x i32> %a, <8 x i32> %b) {
; SSE2-SSSE3-LABEL: v8i32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtd %xmm3, %xmm1
; SSE2-SSSE3-NEXT: pcmpgtd %xmm2, %xmm0
; SSE2-SSSE3-NEXT: packssdw %xmm1, %xmm0
@@ -73,7 +73,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v8i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2
@@ -85,7 +85,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v8i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskps %ymm0, %eax
; AVX2-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -93,7 +93,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v8i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -101,7 +101,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtd %ymm1, %ymm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -114,7 +114,7 @@ define i8 @v8i32(<8 x i32> %a, <8 x i32>
define i8 @v8f32(<8 x float> %a, <8 x float> %b) {
; SSE2-SSSE3-LABEL: v8f32:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltps %xmm1, %xmm3
; SSE2-SSSE3-NEXT: cmpltps %xmm0, %xmm2
; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
@@ -124,7 +124,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v8f32:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltps %ymm0, %ymm1, %ymm0
; AVX12-NEXT: vmovmskps %ymm0, %eax
; AVX12-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -132,7 +132,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v8f32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltps %ymm0, %ymm1, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -140,7 +140,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8f32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltps %ymm0, %ymm1, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -153,7 +153,7 @@ define i8 @v8f32(<8 x float> %a, <8 x fl
define i32 @v32i8(<32 x i8> %a, <32 x i8> %b) {
; SSE2-SSSE3-LABEL: v32i8:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: pcmpgtb %xmm2, %xmm0
; SSE2-SSSE3-NEXT: pmovmskb %xmm0, %ecx
; SSE2-SSSE3-NEXT: pcmpgtb %xmm3, %xmm1
@@ -163,7 +163,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v32i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm2
; AVX1-NEXT: vpmovmskb %xmm2, %ecx
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
@@ -176,14 +176,14 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX1-NEXT: retq
;
; AVX2-LABEL: v32i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovmskb %ymm0, %eax
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v32i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -208,7 +208,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v32i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtb %ymm1, %ymm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: vzeroupper
@@ -220,7 +220,7 @@ define i32 @v32i8(<32 x i8> %a, <32 x i8
define i4 @v4i64(<4 x i64> %a, <4 x i64> %b) {
; SSE2-SSSE3-LABEL: v4i64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,0,2147483648,0]
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm3
; SSE2-SSSE3-NEXT: pxor %xmm4, %xmm1
@@ -248,7 +248,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; SSE2-SSSE3-NEXT: retq
;
; AVX1-LABEL: v4i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2
@@ -260,7 +260,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v4i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vmovmskpd %ymm0, %eax
; AVX2-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -268,7 +268,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v4i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -277,7 +277,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtq %ymm1, %ymm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -291,7 +291,7 @@ define i4 @v4i64(<4 x i64> %a, <4 x i64>
define i4 @v4f64(<4 x double> %a, <4 x double> %b) {
; SSE2-SSSE3-LABEL: v4f64:
-; SSE2-SSSE3: # BB#0:
+; SSE2-SSSE3: # %bb.0:
; SSE2-SSSE3-NEXT: cmpltpd %xmm1, %xmm3
; SSE2-SSSE3-NEXT: cmpltpd %xmm0, %xmm2
; SSE2-SSSE3-NEXT: packssdw %xmm3, %xmm2
@@ -300,7 +300,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; SSE2-SSSE3-NEXT: retq
;
; AVX12-LABEL: v4f64:
-; AVX12: # BB#0:
+; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltpd %ymm0, %ymm1, %ymm0
; AVX12-NEXT: vmovmskpd %ymm0, %eax
; AVX12-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -308,7 +308,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; AVX12-NEXT: retq
;
; AVX512F-LABEL: v4f64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltpd %ymm0, %ymm1, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: movb %al, -{{[0-9]+}}(%rsp)
@@ -317,7 +317,7 @@ define i4 @v4f64(<4 x double> %a, <4 x d
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v4f64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltpd %ymm0, %ymm1, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: movb %al, -{{[0-9]+}}(%rsp)
Modified: llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll Mon Dec 4 09:18:51 2017
@@ -7,7 +7,7 @@
define i32 @v32i16(<32 x i16> %a, <32 x i16> %b) {
; SSE-LABEL: v32i16:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: pcmpgtw %xmm5, %xmm1
; SSE-NEXT: pcmpgtw %xmm4, %xmm0
; SSE-NEXT: packsswb %xmm1, %xmm0
@@ -21,7 +21,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; SSE-NEXT: retq
;
; AVX1-LABEL: v32i16:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5
; AVX1-NEXT: vpcmpgtw %xmm4, %xmm5, %xmm4
@@ -40,7 +40,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: v32i16:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtw %ymm3, %ymm1, %ymm1
; AVX2-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
@@ -50,7 +50,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v32i16:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -207,7 +207,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v32i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtw %zmm1, %zmm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: vzeroupper
@@ -219,7 +219,7 @@ define i32 @v32i16(<32 x i16> %a, <32 x
define i16 @v16i32(<16 x i32> %a, <16 x i32> %b) {
; SSE-LABEL: v16i32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm7, %xmm3
; SSE-NEXT: pcmpgtd %xmm6, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2
@@ -232,7 +232,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; SSE-NEXT: retq
;
; AVX1-LABEL: v16i32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
; AVX1-NEXT: vpcmpgtd %xmm4, %xmm5, %xmm4
@@ -250,7 +250,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX1-NEXT: retq
;
; AVX2-LABEL: v16i32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtd %ymm3, %ymm1, %ymm1
; AVX2-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
@@ -263,7 +263,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v16i32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -271,7 +271,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtd %zmm1, %zmm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -284,7 +284,7 @@ define i16 @v16i32(<16 x i32> %a, <16 x
define i16 @v16f32(<16 x float> %a, <16 x float> %b) {
; SSE-LABEL: v16f32:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: cmpltps %xmm3, %xmm7
; SSE-NEXT: cmpltps %xmm2, %xmm6
; SSE-NEXT: packssdw %xmm7, %xmm6
@@ -297,7 +297,7 @@ define i16 @v16f32(<16 x float> %a, <16
; SSE-NEXT: retq
;
; AVX1-LABEL: v16f32:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vcmpltps %ymm1, %ymm3, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
@@ -311,7 +311,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX1-NEXT: retq
;
; AVX2-LABEL: v16f32:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vcmpltps %ymm1, %ymm3, %ymm1
; AVX2-NEXT: vcmpltps %ymm0, %ymm2, %ymm0
; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0
@@ -324,7 +324,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v16f32:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltps %zmm0, %zmm1, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -332,7 +332,7 @@ define i16 @v16f32(<16 x float> %a, <16
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v16f32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltps %zmm0, %zmm1, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %ax<def> %ax<kill> %eax<kill>
@@ -345,7 +345,7 @@ define i16 @v16f32(<16 x float> %a, <16
define i64 @v64i8(<64 x i8> %a, <64 x i8> %b) {
; SSE-LABEL: v64i8:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: pcmpgtb %xmm5, %xmm1
; SSE-NEXT: pextrb $15, %xmm1, %eax
; SSE-NEXT: andb $1, %al
@@ -555,7 +555,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; SSE-NEXT: retq
;
; AVX1-LABEL: v64i8:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: pushq %rbp
; AVX1-NEXT: .cfi_def_cfa_offset 16
; AVX1-NEXT: .cfi_offset %rbp, -16
@@ -773,7 +773,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX1-NEXT: retq
;
; AVX2-LABEL: v64i8:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: pushq %rbp
; AVX2-NEXT: .cfi_def_cfa_offset 16
; AVX2-NEXT: .cfi_offset %rbp, -16
@@ -987,7 +987,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v64i8:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: pushq %rbp
; AVX512F-NEXT: .cfi_def_cfa_offset 16
; AVX512F-NEXT: .cfi_offset %rbp, -16
@@ -1025,7 +1025,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v64i8:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtb %zmm1, %zmm0, %k0
; AVX512BW-NEXT: kmovq %k0, %rax
; AVX512BW-NEXT: vzeroupper
@@ -1037,7 +1037,7 @@ define i64 @v64i8(<64 x i8> %a, <64 x i8
define i8 @v8i64(<8 x i64> %a, <8 x i64> %b) {
; SSE-LABEL: v8i64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: pcmpgtq %xmm7, %xmm3
; SSE-NEXT: pcmpgtq %xmm6, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2
@@ -1051,7 +1051,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; SSE-NEXT: retq
;
; AVX1-LABEL: v8i64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5
; AVX1-NEXT: vpcmpgtq %xmm4, %xmm5, %xmm4
@@ -1069,7 +1069,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX1-NEXT: retq
;
; AVX2-LABEL: v8i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpgtq %ymm3, %ymm1, %ymm1
; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0
; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0
@@ -1080,7 +1080,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v8i64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vpcmpgtq %zmm1, %zmm0, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -1088,7 +1088,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpcmpgtq %zmm1, %zmm0, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -1101,7 +1101,7 @@ define i8 @v8i64(<8 x i64> %a, <8 x i64>
define i8 @v8f64(<8 x double> %a, <8 x double> %b) {
; SSE-LABEL: v8f64:
-; SSE: # BB#0:
+; SSE: # %bb.0:
; SSE-NEXT: cmpltpd %xmm3, %xmm7
; SSE-NEXT: cmpltpd %xmm2, %xmm6
; SSE-NEXT: packssdw %xmm7, %xmm6
@@ -1115,7 +1115,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; SSE-NEXT: retq
;
; AVX1-LABEL: v8f64:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vcmpltpd %ymm1, %ymm3, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
@@ -1129,7 +1129,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX1-NEXT: retq
;
; AVX2-LABEL: v8f64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vcmpltpd %ymm1, %ymm3, %ymm1
; AVX2-NEXT: vcmpltpd %ymm0, %ymm2, %ymm0
; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0
@@ -1140,7 +1140,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX2-NEXT: retq
;
; AVX512F-LABEL: v8f64:
-; AVX512F: # BB#0:
+; AVX512F: # %bb.0:
; AVX512F-NEXT: vcmpltpd %zmm0, %zmm1, %k0
; AVX512F-NEXT: kmovw %k0, %eax
; AVX512F-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -1148,7 +1148,7 @@ define i8 @v8f64(<8 x double> %a, <8 x d
; AVX512F-NEXT: retq
;
; AVX512BW-LABEL: v8f64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vcmpltpd %zmm0, %zmm1, %k0
; AVX512BW-NEXT: kmovd %k0, %eax
; AVX512BW-NEXT: # kill: %al<def> %al<kill> %eax<kill>
Modified: llvm/trunk/test/CodeGen/X86/bitreverse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bitreverse.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bitreverse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bitreverse.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@ declare <2 x i16> @llvm.bitreverse.v2i16
define <2 x i16> @test_bitreverse_v2i16(<2 x i16> %a) nounwind {
; X86-LABEL: test_bitreverse_v2i16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: rolw $8, %ax
@@ -51,7 +51,7 @@ define <2 x i16> @test_bitreverse_v2i16(
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_v2i16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: pxor %xmm1, %xmm1
; X64-NEXT: movdqa %xmm0, %xmm2
; X64-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
@@ -98,7 +98,7 @@ declare i64 @llvm.bitreverse.i64(i64) re
define i64 @test_bitreverse_i64(i64 %a) nounwind {
; X86-LABEL: test_bitreverse_i64:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
@@ -138,7 +138,7 @@ define i64 @test_bitreverse_i64(i64 %a)
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_i64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bswapq %rdi
; X64-NEXT: movabsq $1085102592571150095, %rax # imm = 0xF0F0F0F0F0F0F0F
; X64-NEXT: andq %rdi, %rax
@@ -168,7 +168,7 @@ declare i32 @llvm.bitreverse.i32(i32) re
define i32 @test_bitreverse_i32(i32 %a) nounwind {
; X86-LABEL: test_bitreverse_i32:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
@@ -190,7 +190,7 @@ define i32 @test_bitreverse_i32(i32 %a)
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_i32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: bswapl %edi
; X64-NEXT: movl %edi, %eax
@@ -218,7 +218,7 @@ declare i24 @llvm.bitreverse.i24(i24) re
define i24 @test_bitreverse_i24(i24 %a) nounwind {
; X86-LABEL: test_bitreverse_i24:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
; X86-NEXT: movl %eax, %ecx
@@ -241,7 +241,7 @@ define i24 @test_bitreverse_i24(i24 %a)
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_i24:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: bswapl %edi
; X64-NEXT: movl %edi, %eax
@@ -270,7 +270,7 @@ declare i16 @llvm.bitreverse.i16(i16) re
define i16 @test_bitreverse_i16(i16 %a) nounwind {
; X86-LABEL: test_bitreverse_i16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: rolw $8, %ax
; X86-NEXT: movl %eax, %ecx
@@ -293,7 +293,7 @@ define i16 @test_bitreverse_i16(i16 %a)
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_i16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: # kill: %edi<def> %edi<kill> %rdi<def>
; X64-NEXT: rolw $8, %di
; X64-NEXT: movl %edi, %eax
@@ -322,7 +322,7 @@ declare i8 @llvm.bitreverse.i8(i8) readn
define i8 @test_bitreverse_i8(i8 %a) {
; X86-LABEL: test_bitreverse_i8:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: rolb $4, %al
; X86-NEXT: movl %eax, %ecx
@@ -340,7 +340,7 @@ define i8 @test_bitreverse_i8(i8 %a) {
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_i8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rolb $4, %dil
; X64-NEXT: movl %edi, %eax
; X64-NEXT: andb $51, %al
@@ -364,7 +364,7 @@ declare i4 @llvm.bitreverse.i4(i4) readn
define i4 @test_bitreverse_i4(i4 %a) {
; X86-LABEL: test_bitreverse_i4:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: rolb $4, %al
; X86-NEXT: movl %eax, %ecx
@@ -383,7 +383,7 @@ define i4 @test_bitreverse_i4(i4 %a) {
; X86-NEXT: retl
;
; X64-LABEL: test_bitreverse_i4:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rolb $4, %dil
; X64-NEXT: movl %edi, %eax
; X64-NEXT: andb $51, %al
@@ -408,13 +408,13 @@ define i4 @test_bitreverse_i4(i4 %a) {
define <2 x i16> @fold_v2i16() {
; X86-LABEL: fold_v2i16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movw $-4096, %ax # imm = 0xF000
; X86-NEXT: movw $240, %dx
; X86-NEXT: retl
;
; X64-LABEL: fold_v2i16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movaps {{.*#+}} xmm0 = [61440,240]
; X64-NEXT: retq
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> <i16 15, i16 3840>)
@@ -423,12 +423,12 @@ define <2 x i16> @fold_v2i16() {
define i24 @fold_i24() {
; X86-LABEL: fold_i24:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl $2048, %eax # imm = 0x800
; X86-NEXT: retl
;
; X64-LABEL: fold_i24:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl $2048, %eax # imm = 0x800
; X64-NEXT: retq
%b = call i24 @llvm.bitreverse.i24(i24 4096)
@@ -437,12 +437,12 @@ define i24 @fold_i24() {
define i8 @fold_i8() {
; X86-LABEL: fold_i8:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movb $-16, %al
; X86-NEXT: retl
;
; X64-LABEL: fold_i8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movb $-16, %al
; X64-NEXT: retq
%b = call i8 @llvm.bitreverse.i8(i8 15)
@@ -451,12 +451,12 @@ define i8 @fold_i8() {
define i4 @fold_i4() {
; X86-LABEL: fold_i4:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movb $1, %al
; X86-NEXT: retl
;
; X64-LABEL: fold_i4:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movb $1, %al
; X64-NEXT: retq
%b = call i4 @llvm.bitreverse.i4(i4 8)
@@ -467,12 +467,12 @@ define i4 @fold_i4() {
define i8 @identity_i8(i8 %a) {
; X86-LABEL: identity_i8:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movb {{[0-9]+}}(%esp), %al
; X86-NEXT: retl
;
; X64-LABEL: identity_i8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
%b = call i8 @llvm.bitreverse.i8(i8 %a)
@@ -482,13 +482,13 @@ define i8 @identity_i8(i8 %a) {
define <2 x i16> @identity_v2i16(<2 x i16> %a) {
; X86-LABEL: identity_v2i16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
;
; X64-LABEL: identity_v2i16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: retq
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
%c = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %b)
@@ -499,11 +499,11 @@ define <2 x i16> @identity_v2i16(<2 x i1
define i8 @undef_i8() {
; X86-LABEL: undef_i8:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: retl
;
; X64-LABEL: undef_i8:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: retq
%b = call i8 @llvm.bitreverse.i8(i8 undef)
ret i8 %b
@@ -511,11 +511,11 @@ define i8 @undef_i8() {
define <2 x i16> @undef_v2i16() {
; X86-LABEL: undef_v2i16:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: retl
;
; X64-LABEL: undef_v2i16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: retq
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> undef)
ret <2 x i16> %b
Modified: llvm/trunk/test/CodeGen/X86/block-placement.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/block-placement.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/block-placement.ll (original)
+++ llvm/trunk/test/CodeGen/X86/block-placement.ll Mon Dec 4 09:18:51 2017
@@ -474,11 +474,11 @@ define void @fpcmp_unanalyzable_branch(i
; edge in 'entry' -> 'entry.if.then_crit_edge' -> 'if.then' -> 'if.end' is
; fall-through.
; CHECK-LABEL: fpcmp_unanalyzable_branch:
-; CHECK: # BB#0: # %entry
-; CHECK: # BB#1: # %entry.if.then_crit_edge
+; CHECK: # %bb.0: # %entry
+; CHECK: # %bb.1: # %entry.if.then_crit_edge
; CHECK: .LBB10_5: # %if.then
; CHECK: .LBB10_6: # %if.end
-; CHECK: # BB#3: # %exit
+; CHECK: # %bb.3: # %exit
; CHECK: jne .LBB10_4
; CHECK-NEXT: jnp .LBB10_6
; CHECK: jmp .LBB10_5
Modified: llvm/trunk/test/CodeGen/X86/block-placement.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/block-placement.mir?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/block-placement.mir (original)
+++ llvm/trunk/test/CodeGen/X86/block-placement.mir Mon Dec 4 09:18:51 2017
@@ -46,28 +46,28 @@ liveins:
- { reg: '%rdi' }
- { reg: '%esi' }
-# CHECK: %eax = FAULTING_OP 1, %bb.3.null, 1684, killed %rdi, 1, %noreg, 0, %noreg :: (load 4 from %ir.ptr)
-# CHECK-NEXT: JMP_1 %bb.2.not_null
+# CHECK: %eax = FAULTING_OP 1, %bb.3, 1684, killed %rdi, 1, %noreg, 0, %noreg :: (load 4 from %ir.ptr)
+# CHECK-NEXT: JMP_1 %bb.2
# CHECK: bb.3.null:
# CHECK: bb.4.right:
# CHECK: bb.2.not_null:
body: |
bb.0.entry:
- successors: %bb.1.left(0x7ffff800), %bb.3.right(0x00000800)
+ successors: %bb.1(0x7ffff800), %bb.3(0x00000800)
liveins: %esi, %rdi
frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION def_cfa_offset 16
TEST8ri %sil, 1, implicit-def %eflags, implicit killed %esi
- JE_1 %bb.3.right, implicit killed %eflags
+ JE_1 %bb.3, implicit killed %eflags
bb.1.left:
- successors: %bb.2.null(0x7ffff800), %bb.4.not_null(0x00000800)
+ successors: %bb.2(0x7ffff800), %bb.4(0x00000800)
liveins: %rdi
- %eax = FAULTING_OP 1, %bb.2.null, 1684, killed %rdi, 1, %noreg, 0, %noreg :: (load 4 from %ir.ptr)
- JMP_1 %bb.4.not_null
+ %eax = FAULTING_OP 1, %bb.2, 1684, killed %rdi, 1, %noreg, 0, %noreg :: (load 4 from %ir.ptr)
+ JMP_1 %bb.4
bb.4.not_null:
liveins: %rdi, %eax
Modified: llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@
define i64 @test__andn_u64(i64 %a0, i64 %a1) {
; X64-LABEL: test__andn_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorq $-1, %rdi
; X64-NEXT: andq %rsi, %rdi
; X64-NEXT: movq %rdi, %rax
@@ -21,7 +21,7 @@ define i64 @test__andn_u64(i64 %a0, i64
define i64 @test__bextr_u64(i64 %a0, i64 %a1) {
; X64-LABEL: test__bextr_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bextrq %rsi, %rdi, %rax
; X64-NEXT: retq
%res = call i64 @llvm.x86.bmi.bextr.64(i64 %a0, i64 %a1)
@@ -30,7 +30,7 @@ define i64 @test__bextr_u64(i64 %a0, i64
define i64 @test__blsi_u64(i64 %a0) {
; X64-LABEL: test__blsi_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: subq %rdi, %rax
; X64-NEXT: andq %rdi, %rax
@@ -42,7 +42,7 @@ define i64 @test__blsi_u64(i64 %a0) {
define i64 @test__blsmsk_u64(i64 %a0) {
; X64-LABEL: test__blsmsk_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: subq $1, %rax
; X64-NEXT: xorq %rdi, %rax
@@ -54,7 +54,7 @@ define i64 @test__blsmsk_u64(i64 %a0) {
define i64 @test__blsr_u64(i64 %a0) {
; X64-LABEL: test__blsr_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: subq $1, %rax
; X64-NEXT: andq %rdi, %rax
@@ -66,7 +66,7 @@ define i64 @test__blsr_u64(i64 %a0) {
define i64 @test__tzcnt_u64(i64 %a0) {
; X64-LABEL: test__tzcnt_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl $64, %ecx
; X64-NEXT: tzcntq %rdi, %rax
; X64-NEXT: cmovbq %rcx, %rax
@@ -83,7 +83,7 @@ define i64 @test__tzcnt_u64(i64 %a0) {
define i64 @test_andn_u64(i64 %a0, i64 %a1) {
; X64-LABEL: test_andn_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorq $-1, %rdi
; X64-NEXT: andq %rsi, %rdi
; X64-NEXT: movq %rdi, %rax
@@ -95,7 +95,7 @@ define i64 @test_andn_u64(i64 %a0, i64 %
define i64 @test_bextr_u64(i64 %a0, i32 %a1, i32 %a2) {
; X64-LABEL: test_bextr_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: andl $255, %esi
; X64-NEXT: andl $255, %edx
; X64-NEXT: shll $8, %edx
@@ -114,7 +114,7 @@ define i64 @test_bextr_u64(i64 %a0, i32
define i64 @test_blsi_u64(i64 %a0) {
; X64-LABEL: test_blsi_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: subq %rdi, %rax
; X64-NEXT: andq %rdi, %rax
@@ -126,7 +126,7 @@ define i64 @test_blsi_u64(i64 %a0) {
define i64 @test_blsmsk_u64(i64 %a0) {
; X64-LABEL: test_blsmsk_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: subq $1, %rax
; X64-NEXT: xorq %rdi, %rax
@@ -138,7 +138,7 @@ define i64 @test_blsmsk_u64(i64 %a0) {
define i64 @test_blsr_u64(i64 %a0) {
; X64-LABEL: test_blsr_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: subq $1, %rax
; X64-NEXT: andq %rdi, %rax
@@ -150,7 +150,7 @@ define i64 @test_blsr_u64(i64 %a0) {
define i64 @test_tzcnt_u64(i64 %a0) {
; X64-LABEL: test_tzcnt_u64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl $64, %ecx
; X64-NEXT: tzcntq %rdi, %rax
; X64-NEXT: cmovbq %rcx, %rax
Modified: llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll Mon Dec 4 09:18:51 2017
@@ -10,12 +10,12 @@
define i16 @test__tzcnt_u16(i16 %a0) {
; X32-LABEL: test__tzcnt_u16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movzwl %ax, %ecx
; X32-NEXT: cmpl $0, %ecx
; X32-NEXT: jne .LBB0_1
-; X32-NEXT: # BB#2:
+; X32-NEXT: # %bb.2:
; X32-NEXT: movw $16, %ax
; X32-NEXT: retl
; X32-NEXT: .LBB0_1:
@@ -23,7 +23,7 @@ define i16 @test__tzcnt_u16(i16 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test__tzcnt_u16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movw $16, %cx
; X64-NEXT: movzwl %di, %edx
; X64-NEXT: tzcntw %dx, %ax
@@ -39,14 +39,14 @@ define i16 @test__tzcnt_u16(i16 %a0) {
define i32 @test__andn_u32(i32 %a0, i32 %a1) {
; X32-LABEL: test__andn_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: xorl $-1, %eax
; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: test__andn_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl $-1, %edi
; X64-NEXT: andl %esi, %edi
; X64-NEXT: movl %edi, %eax
@@ -58,13 +58,13 @@ define i32 @test__andn_u32(i32 %a0, i32
define i32 @test__bextr_u32(i32 %a0, i32 %a1) {
; X32-LABEL: test__bextr_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: test__bextr_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bextrl %esi, %edi, %eax
; X64-NEXT: retq
%res = call i32 @llvm.x86.bmi.bextr.32(i32 %a0, i32 %a1)
@@ -73,7 +73,7 @@ define i32 @test__bextr_u32(i32 %a0, i32
define i32 @test__blsi_u32(i32 %a0) {
; X32-LABEL: test__blsi_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: subl %ecx, %eax
@@ -81,7 +81,7 @@ define i32 @test__blsi_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test__blsi_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: subl %edi, %eax
; X64-NEXT: andl %edi, %eax
@@ -93,7 +93,7 @@ define i32 @test__blsi_u32(i32 %a0) {
define i32 @test__blsmsk_u32(i32 %a0) {
; X32-LABEL: test__blsmsk_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: subl $1, %eax
@@ -101,7 +101,7 @@ define i32 @test__blsmsk_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test__blsmsk_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: subl $1, %eax
; X64-NEXT: xorl %edi, %eax
@@ -113,7 +113,7 @@ define i32 @test__blsmsk_u32(i32 %a0) {
define i32 @test__blsr_u32(i32 %a0) {
; X32-LABEL: test__blsr_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: subl $1, %eax
@@ -121,7 +121,7 @@ define i32 @test__blsr_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test__blsr_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: subl $1, %eax
; X64-NEXT: andl %edi, %eax
@@ -133,11 +133,11 @@ define i32 @test__blsr_u32(i32 %a0) {
define i32 @test__tzcnt_u32(i32 %a0) {
; X32-LABEL: test__tzcnt_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: cmpl $0, %eax
; X32-NEXT: jne .LBB6_1
-; X32-NEXT: # BB#2:
+; X32-NEXT: # %bb.2:
; X32-NEXT: movl $32, %eax
; X32-NEXT: retl
; X32-NEXT: .LBB6_1:
@@ -145,7 +145,7 @@ define i32 @test__tzcnt_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test__tzcnt_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl $32, %ecx
; X64-NEXT: tzcntl %edi, %eax
; X64-NEXT: cmovbl %ecx, %eax
@@ -162,12 +162,12 @@ define i32 @test__tzcnt_u32(i32 %a0) {
define i16 @test_tzcnt_u16(i16 %a0) {
; X32-LABEL: test_tzcnt_u16:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movzwl %ax, %ecx
; X32-NEXT: cmpl $0, %ecx
; X32-NEXT: jne .LBB7_1
-; X32-NEXT: # BB#2:
+; X32-NEXT: # %bb.2:
; X32-NEXT: movw $16, %ax
; X32-NEXT: retl
; X32-NEXT: .LBB7_1:
@@ -175,7 +175,7 @@ define i16 @test_tzcnt_u16(i16 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test_tzcnt_u16:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movw $16, %cx
; X64-NEXT: movzwl %di, %edx
; X64-NEXT: tzcntw %dx, %ax
@@ -191,14 +191,14 @@ define i16 @test_tzcnt_u16(i16 %a0) {
define i32 @test_andn_u32(i32 %a0, i32 %a1) {
; X32-LABEL: test_andn_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: xorl $-1, %eax
; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: test_andn_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl $-1, %edi
; X64-NEXT: andl %esi, %edi
; X64-NEXT: movl %edi, %eax
@@ -210,7 +210,7 @@ define i32 @test_andn_u32(i32 %a0, i32 %
define i32 @test_bextr_u32(i32 %a0, i32 %a1, i32 %a2) {
; X32-LABEL: test_bextr_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: andl $255, %ecx
@@ -221,7 +221,7 @@ define i32 @test_bextr_u32(i32 %a0, i32
; X32-NEXT: retl
;
; X64-LABEL: test_bextr_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: andl $255, %esi
; X64-NEXT: andl $255, %edx
; X64-NEXT: shll $8, %edx
@@ -238,7 +238,7 @@ define i32 @test_bextr_u32(i32 %a0, i32
define i32 @test_blsi_u32(i32 %a0) {
; X32-LABEL: test_blsi_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: xorl %eax, %eax
; X32-NEXT: subl %ecx, %eax
@@ -246,7 +246,7 @@ define i32 @test_blsi_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test_blsi_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: subl %edi, %eax
; X64-NEXT: andl %edi, %eax
@@ -258,7 +258,7 @@ define i32 @test_blsi_u32(i32 %a0) {
define i32 @test_blsmsk_u32(i32 %a0) {
; X32-LABEL: test_blsmsk_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: subl $1, %eax
@@ -266,7 +266,7 @@ define i32 @test_blsmsk_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test_blsmsk_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: subl $1, %eax
; X64-NEXT: xorl %edi, %eax
@@ -278,7 +278,7 @@ define i32 @test_blsmsk_u32(i32 %a0) {
define i32 @test_blsr_u32(i32 %a0) {
; X32-LABEL: test_blsr_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X32-NEXT: movl %ecx, %eax
; X32-NEXT: subl $1, %eax
@@ -286,7 +286,7 @@ define i32 @test_blsr_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test_blsr_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: subl $1, %eax
; X64-NEXT: andl %edi, %eax
@@ -298,11 +298,11 @@ define i32 @test_blsr_u32(i32 %a0) {
define i32 @test_tzcnt_u32(i32 %a0) {
; X32-LABEL: test_tzcnt_u32:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
; X32-NEXT: cmpl $0, %eax
; X32-NEXT: jne .LBB13_1
-; X32-NEXT: # BB#2:
+; X32-NEXT: # %bb.2:
; X32-NEXT: movl $32, %eax
; X32-NEXT: retl
; X32-NEXT: .LBB13_1:
@@ -310,7 +310,7 @@ define i32 @test_tzcnt_u32(i32 %a0) {
; X32-NEXT: retl
;
; X64-LABEL: test_tzcnt_u32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl $32, %ecx
; X64-NEXT: tzcntl %edi, %eax
; X64-NEXT: cmovbl %ecx, %eax
Modified: llvm/trunk/test/CodeGen/X86/bmi-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi-schedule.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi-schedule.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@
define i16 @test_andn_i16(i16 zeroext %a0, i16 zeroext %a1, i16 *%a2) {
; GENERIC-LABEL: test_andn_i16:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: andnl %esi, %edi, %eax # sched: [1:0.33]
; GENERIC-NEXT: notl %edi # sched: [1:0.33]
; GENERIC-NEXT: andw (%rdx), %di # sched: [6:0.50]
@@ -18,7 +18,7 @@ define i16 @test_andn_i16(i16 zeroext %a
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_andn_i16:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
; HASWELL-NEXT: notl %edi # sched: [1:0.25]
; HASWELL-NEXT: andw (%rdx), %di # sched: [1:0.50]
@@ -27,7 +27,7 @@ define i16 @test_andn_i16(i16 zeroext %a
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_andn_i16:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
; BROADWELL-NEXT: notl %edi # sched: [1:0.25]
; BROADWELL-NEXT: andw (%rdx), %di # sched: [6:0.50]
@@ -36,7 +36,7 @@ define i16 @test_andn_i16(i16 zeroext %a
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_andn_i16:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
; SKYLAKE-NEXT: notl %edi # sched: [1:0.25]
; SKYLAKE-NEXT: andw (%rdx), %di # sched: [6:0.50]
@@ -45,7 +45,7 @@ define i16 @test_andn_i16(i16 zeroext %a
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_andn_i16:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: andnl %esi, %edi, %eax # sched: [1:0.50]
; BTVER2-NEXT: notl %edi # sched: [1:0.50]
; BTVER2-NEXT: andw (%rdx), %di # sched: [4:1.00]
@@ -54,7 +54,7 @@ define i16 @test_andn_i16(i16 zeroext %a
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_andn_i16:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: andnl %esi, %edi, %eax # sched: [1:0.25]
; ZNVER1-NEXT: notl %edi # sched: [1:0.25]
; ZNVER1-NEXT: andw (%rdx), %di # sched: [5:0.50]
@@ -71,42 +71,42 @@ define i16 @test_andn_i16(i16 zeroext %a
define i32 @test_andn_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_andn_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.33]
; GENERIC-NEXT: andnl (%rdx), %edi, %eax # sched: [5:0.50]
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_andn_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
; HASWELL-NEXT: andnl (%rdx), %edi, %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_andn_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
; BROADWELL-NEXT: andnl (%rdx), %edi, %eax # sched: [6:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_andn_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
; SKYLAKE-NEXT: andnl (%rdx), %edi, %eax # sched: [6:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_andn_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: andnl (%rdx), %edi, %eax # sched: [4:1.00]
; BTVER2-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.50]
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_andn_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: andnl (%rdx), %edi, %eax # sched: [5:0.50]
; ZNVER1-NEXT: andnl %esi, %edi, %ecx # sched: [1:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -121,42 +121,42 @@ define i32 @test_andn_i32(i32 %a0, i32 %
define i64 @test_andn_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_andn_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.33]
; GENERIC-NEXT: andnq (%rdx), %rdi, %rax # sched: [5:0.50]
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_andn_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
; HASWELL-NEXT: andnq (%rdx), %rdi, %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_andn_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
; BROADWELL-NEXT: andnq (%rdx), %rdi, %rax # sched: [6:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_andn_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
; SKYLAKE-NEXT: andnq (%rdx), %rdi, %rax # sched: [6:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_andn_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: andnq (%rdx), %rdi, %rax # sched: [4:1.00]
; BTVER2-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.50]
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_andn_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: andnq (%rdx), %rdi, %rax # sched: [5:0.50]
; ZNVER1-NEXT: andnq %rsi, %rdi, %rcx # sched: [1:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -171,42 +171,42 @@ define i64 @test_andn_i64(i64 %a0, i64 %
define i32 @test_bextr_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_bextr_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: bextrl %edi, (%rdx), %ecx
; GENERIC-NEXT: bextrl %edi, %esi, %eax
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_bextr_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: bextrl %edi, (%rdx), %ecx # sched: [2:0.50]
; HASWELL-NEXT: bextrl %edi, %esi, %eax # sched: [2:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_bextr_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: bextrl %edi, (%rdx), %ecx # sched: [7:0.50]
; BROADWELL-NEXT: bextrl %edi, %esi, %eax # sched: [2:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_bextr_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: bextrl %edi, (%rdx), %ecx # sched: [7:0.50]
; SKYLAKE-NEXT: bextrl %edi, %esi, %eax # sched: [2:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_bextr_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: bextrl %edi, (%rdx), %ecx
; BTVER2-NEXT: bextrl %edi, %esi, %eax
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_bextr_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: bextrl %edi, (%rdx), %ecx # sched: [5:0.50]
; ZNVER1-NEXT: bextrl %edi, %esi, %eax # sched: [1:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -221,42 +221,42 @@ declare i32 @llvm.x86.bmi.bextr.32(i32,
define i64 @test_bextr_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_bextr_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: bextrq %rdi, (%rdx), %rcx
; GENERIC-NEXT: bextrq %rdi, %rsi, %rax
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_bextr_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [2:0.50]
; HASWELL-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_bextr_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [7:0.50]
; BROADWELL-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_bextr_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [7:0.50]
; SKYLAKE-NEXT: bextrq %rdi, %rsi, %rax # sched: [2:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_bextr_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: bextrq %rdi, (%rdx), %rcx
; BTVER2-NEXT: bextrq %rdi, %rsi, %rax
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_bextr_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: bextrq %rdi, (%rdx), %rcx # sched: [5:0.50]
; ZNVER1-NEXT: bextrq %rdi, %rsi, %rax # sched: [1:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -271,42 +271,42 @@ declare i64 @llvm.x86.bmi.bextr.64(i64,
define i32 @test_blsi_i32(i32 %a0, i32 *%a1) {
; GENERIC-LABEL: test_blsi_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: blsil (%rsi), %ecx
; GENERIC-NEXT: blsil %edi, %eax
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_blsi_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: blsil (%rsi), %ecx # sched: [1:0.50]
; HASWELL-NEXT: blsil %edi, %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_blsi_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: blsil (%rsi), %ecx # sched: [6:0.50]
; BROADWELL-NEXT: blsil %edi, %eax # sched: [1:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_blsi_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: blsil (%rsi), %ecx # sched: [6:0.50]
; SKYLAKE-NEXT: blsil %edi, %eax # sched: [1:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_blsi_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: blsil (%rsi), %ecx
; BTVER2-NEXT: blsil %edi, %eax
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_blsi_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: blsil (%rsi), %ecx # sched: [6:0.50]
; ZNVER1-NEXT: blsil %edi, %eax # sched: [2:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -322,42 +322,42 @@ define i32 @test_blsi_i32(i32 %a0, i32 *
define i64 @test_blsi_i64(i64 %a0, i64 *%a1) {
; GENERIC-LABEL: test_blsi_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: blsiq (%rsi), %rcx
; GENERIC-NEXT: blsiq %rdi, %rax
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_blsi_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: blsiq (%rsi), %rcx # sched: [1:0.50]
; HASWELL-NEXT: blsiq %rdi, %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_blsi_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: blsiq (%rsi), %rcx # sched: [6:0.50]
; BROADWELL-NEXT: blsiq %rdi, %rax # sched: [1:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_blsi_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: blsiq (%rsi), %rcx # sched: [6:0.50]
; SKYLAKE-NEXT: blsiq %rdi, %rax # sched: [1:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_blsi_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: blsiq (%rsi), %rcx
; BTVER2-NEXT: blsiq %rdi, %rax
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_blsi_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: blsiq (%rsi), %rcx # sched: [6:0.50]
; ZNVER1-NEXT: blsiq %rdi, %rax # sched: [2:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -373,42 +373,42 @@ define i64 @test_blsi_i64(i64 %a0, i64 *
define i32 @test_blsmsk_i32(i32 %a0, i32 *%a1) {
; GENERIC-LABEL: test_blsmsk_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: blsmskl (%rsi), %ecx
; GENERIC-NEXT: blsmskl %edi, %eax
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_blsmsk_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: blsmskl (%rsi), %ecx # sched: [1:0.50]
; HASWELL-NEXT: blsmskl %edi, %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_blsmsk_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: blsmskl (%rsi), %ecx # sched: [6:0.50]
; BROADWELL-NEXT: blsmskl %edi, %eax # sched: [1:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_blsmsk_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: blsmskl (%rsi), %ecx # sched: [6:0.50]
; SKYLAKE-NEXT: blsmskl %edi, %eax # sched: [1:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_blsmsk_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: blsmskl (%rsi), %ecx
; BTVER2-NEXT: blsmskl %edi, %eax
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_blsmsk_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: blsmskl (%rsi), %ecx # sched: [6:0.50]
; ZNVER1-NEXT: blsmskl %edi, %eax # sched: [2:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -424,42 +424,42 @@ define i32 @test_blsmsk_i32(i32 %a0, i32
define i64 @test_blsmsk_i64(i64 %a0, i64 *%a1) {
; GENERIC-LABEL: test_blsmsk_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: blsmskq (%rsi), %rcx
; GENERIC-NEXT: blsmskq %rdi, %rax
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_blsmsk_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: blsmskq (%rsi), %rcx # sched: [1:0.50]
; HASWELL-NEXT: blsmskq %rdi, %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_blsmsk_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: blsmskq (%rsi), %rcx # sched: [6:0.50]
; BROADWELL-NEXT: blsmskq %rdi, %rax # sched: [1:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_blsmsk_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: blsmskq (%rsi), %rcx # sched: [6:0.50]
; SKYLAKE-NEXT: blsmskq %rdi, %rax # sched: [1:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_blsmsk_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: blsmskq (%rsi), %rcx
; BTVER2-NEXT: blsmskq %rdi, %rax
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_blsmsk_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: blsmskq (%rsi), %rcx # sched: [6:0.50]
; ZNVER1-NEXT: blsmskq %rdi, %rax # sched: [2:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -475,42 +475,42 @@ define i64 @test_blsmsk_i64(i64 %a0, i64
define i32 @test_blsr_i32(i32 %a0, i32 *%a1) {
; GENERIC-LABEL: test_blsr_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: blsrl (%rsi), %ecx
; GENERIC-NEXT: blsrl %edi, %eax
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_blsr_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: blsrl (%rsi), %ecx # sched: [1:0.50]
; HASWELL-NEXT: blsrl %edi, %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_blsr_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: blsrl (%rsi), %ecx # sched: [6:0.50]
; BROADWELL-NEXT: blsrl %edi, %eax # sched: [1:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_blsr_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: blsrl (%rsi), %ecx # sched: [6:0.50]
; SKYLAKE-NEXT: blsrl %edi, %eax # sched: [1:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_blsr_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: blsrl (%rsi), %ecx
; BTVER2-NEXT: blsrl %edi, %eax
; BTVER2-NEXT: addl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_blsr_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: blsrl (%rsi), %ecx # sched: [6:0.50]
; ZNVER1-NEXT: blsrl %edi, %eax # sched: [2:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -526,42 +526,42 @@ define i32 @test_blsr_i32(i32 %a0, i32 *
define i64 @test_blsr_i64(i64 %a0, i64 *%a1) {
; GENERIC-LABEL: test_blsr_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: blsrq (%rsi), %rcx
; GENERIC-NEXT: blsrq %rdi, %rax
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_blsr_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: blsrq (%rsi), %rcx # sched: [1:0.50]
; HASWELL-NEXT: blsrq %rdi, %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_blsr_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: blsrq (%rsi), %rcx # sched: [6:0.50]
; BROADWELL-NEXT: blsrq %rdi, %rax # sched: [1:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_blsr_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: blsrq (%rsi), %rcx # sched: [6:0.50]
; SKYLAKE-NEXT: blsrq %rdi, %rax # sched: [1:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_blsr_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: blsrq (%rsi), %rcx
; BTVER2-NEXT: blsrq %rdi, %rax
; BTVER2-NEXT: addq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_blsr_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: blsrq (%rsi), %rcx # sched: [6:0.50]
; ZNVER1-NEXT: blsrq %rdi, %rax # sched: [2:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -577,7 +577,7 @@ define i64 @test_blsr_i64(i64 %a0, i64 *
define i16 @test_cttz_i16(i16 zeroext %a0, i16 *%a1) {
; GENERIC-LABEL: test_cttz_i16:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: tzcntw (%rsi), %cx
; GENERIC-NEXT: tzcntw %di, %ax
; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
@@ -585,7 +585,7 @@ define i16 @test_cttz_i16(i16 zeroext %a
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cttz_i16:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: tzcntw (%rsi), %cx # sched: [3:1.00]
; HASWELL-NEXT: tzcntw %di, %ax # sched: [3:1.00]
; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -593,7 +593,7 @@ define i16 @test_cttz_i16(i16 zeroext %a
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cttz_i16:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: tzcntw (%rsi), %cx # sched: [8:1.00]
; BROADWELL-NEXT: tzcntw %di, %ax # sched: [3:1.00]
; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -601,7 +601,7 @@ define i16 @test_cttz_i16(i16 zeroext %a
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cttz_i16:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: tzcntw (%rsi), %cx # sched: [8:1.00]
; SKYLAKE-NEXT: tzcntw %di, %ax # sched: [3:1.00]
; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -609,7 +609,7 @@ define i16 @test_cttz_i16(i16 zeroext %a
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cttz_i16:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: tzcntw (%rsi), %cx
; BTVER2-NEXT: tzcntw %di, %ax
; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
@@ -617,7 +617,7 @@ define i16 @test_cttz_i16(i16 zeroext %a
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cttz_i16:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: tzcntw (%rsi), %cx # sched: [6:0.50]
; ZNVER1-NEXT: tzcntw %di, %ax # sched: [2:0.25]
; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -633,42 +633,42 @@ declare i16 @llvm.cttz.i16(i16, i1)
define i32 @test_cttz_i32(i32 %a0, i32 *%a1) {
; GENERIC-LABEL: test_cttz_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: tzcntl (%rsi), %ecx
; GENERIC-NEXT: tzcntl %edi, %eax
; GENERIC-NEXT: orl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cttz_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: tzcntl (%rsi), %ecx # sched: [3:1.00]
; HASWELL-NEXT: tzcntl %edi, %eax # sched: [3:1.00]
; HASWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cttz_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: tzcntl (%rsi), %ecx # sched: [8:1.00]
; BROADWELL-NEXT: tzcntl %edi, %eax # sched: [3:1.00]
; BROADWELL-NEXT: orl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cttz_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: tzcntl (%rsi), %ecx # sched: [8:1.00]
; SKYLAKE-NEXT: tzcntl %edi, %eax # sched: [3:1.00]
; SKYLAKE-NEXT: orl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cttz_i32:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: tzcntl (%rsi), %ecx
; BTVER2-NEXT: tzcntl %edi, %eax
; BTVER2-NEXT: orl %ecx, %eax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cttz_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: tzcntl (%rsi), %ecx # sched: [6:0.50]
; ZNVER1-NEXT: tzcntl %edi, %eax # sched: [2:0.25]
; ZNVER1-NEXT: orl %ecx, %eax # sched: [1:0.25]
@@ -683,42 +683,42 @@ declare i32 @llvm.cttz.i32(i32, i1)
define i64 @test_cttz_i64(i64 %a0, i64 *%a1) {
; GENERIC-LABEL: test_cttz_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: tzcntq (%rsi), %rcx
; GENERIC-NEXT: tzcntq %rdi, %rax
; GENERIC-NEXT: orq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_cttz_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: tzcntq (%rsi), %rcx # sched: [3:1.00]
; HASWELL-NEXT: tzcntq %rdi, %rax # sched: [3:1.00]
; HASWELL-NEXT: orq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_cttz_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: tzcntq (%rsi), %rcx # sched: [8:1.00]
; BROADWELL-NEXT: tzcntq %rdi, %rax # sched: [3:1.00]
; BROADWELL-NEXT: orq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_cttz_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: tzcntq (%rsi), %rcx # sched: [8:1.00]
; SKYLAKE-NEXT: tzcntq %rdi, %rax # sched: [3:1.00]
; SKYLAKE-NEXT: orq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; BTVER2-LABEL: test_cttz_i64:
-; BTVER2: # BB#0:
+; BTVER2: # %bb.0:
; BTVER2-NEXT: tzcntq (%rsi), %rcx
; BTVER2-NEXT: tzcntq %rdi, %rax
; BTVER2-NEXT: orq %rcx, %rax # sched: [1:0.50]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_cttz_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: tzcntq (%rsi), %rcx # sched: [6:0.50]
; ZNVER1-NEXT: tzcntq %rdi, %rax # sched: [2:0.25]
; ZNVER1-NEXT: orq %rcx, %rax # sched: [1:0.25]
Modified: llvm/trunk/test/CodeGen/X86/bmi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi.ll Mon Dec 4 09:18:51 2017
@@ -9,7 +9,7 @@ declare i64 @llvm.cttz.i64(i64, i1)
define i8 @t1(i8 %x) {
; CHECK-LABEL: t1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: orl $256, %eax # imm = 0x100
; CHECK-NEXT: tzcntl %eax, %eax
@@ -21,7 +21,7 @@ define i8 @t1(i8 %x) {
define i16 @t2(i16 %x) {
; CHECK-LABEL: t2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntw %di, %ax
; CHECK-NEXT: retq
%tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 false )
@@ -30,7 +30,7 @@ define i16 @t2(i16 %x) {
define i32 @t3(i32 %x) {
; CHECK-LABEL: t3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntl %edi, %eax
; CHECK-NEXT: retq
%tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 false )
@@ -39,7 +39,7 @@ define i32 @t3(i32 %x) {
define i32 @tzcnt32_load(i32* %x) {
; CHECK-LABEL: tzcnt32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntl (%rdi), %eax
; CHECK-NEXT: retq
%x1 = load i32, i32* %x
@@ -49,7 +49,7 @@ define i32 @tzcnt32_load(i32* %x) {
define i64 @t4(i64 %x) {
; CHECK-LABEL: t4:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntq %rdi, %rax
; CHECK-NEXT: retq
%tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 false )
@@ -58,7 +58,7 @@ define i64 @t4(i64 %x) {
define i8 @t5(i8 %x) {
; CHECK-LABEL: t5:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: tzcntl %eax, %eax
; CHECK-NEXT: # kill: %al<def> %al<kill> %eax<kill>
@@ -69,7 +69,7 @@ define i8 @t5(i8 %x) {
define i16 @t6(i16 %x) {
; CHECK-LABEL: t6:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntw %di, %ax
; CHECK-NEXT: retq
%tmp = tail call i16 @llvm.cttz.i16( i16 %x, i1 true )
@@ -78,7 +78,7 @@ define i16 @t6(i16 %x) {
define i32 @t7(i32 %x) {
; CHECK-LABEL: t7:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntl %edi, %eax
; CHECK-NEXT: retq
%tmp = tail call i32 @llvm.cttz.i32( i32 %x, i1 true )
@@ -87,7 +87,7 @@ define i32 @t7(i32 %x) {
define i64 @t8(i64 %x) {
; CHECK-LABEL: t8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: tzcntq %rdi, %rax
; CHECK-NEXT: retq
%tmp = tail call i64 @llvm.cttz.i64( i64 %x, i1 true )
@@ -96,7 +96,7 @@ define i64 @t8(i64 %x) {
define i32 @andn32(i32 %x, i32 %y) {
; CHECK-LABEL: andn32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl %esi, %edi, %eax
; CHECK-NEXT: retq
%tmp1 = xor i32 %x, -1
@@ -106,7 +106,7 @@ define i32 @andn32(i32 %x, i32 %y) {
define i32 @andn32_load(i32 %x, i32* %y) {
; CHECK-LABEL: andn32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl (%rsi), %edi, %eax
; CHECK-NEXT: retq
%y1 = load i32, i32* %y
@@ -117,7 +117,7 @@ define i32 @andn32_load(i32 %x, i32* %y)
define i64 @andn64(i64 %x, i64 %y) {
; CHECK-LABEL: andn64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnq %rsi, %rdi, %rax
; CHECK-NEXT: retq
%tmp1 = xor i64 %x, -1
@@ -128,7 +128,7 @@ define i64 @andn64(i64 %x, i64 %y) {
; Don't choose a 'test' if an 'andn' can be used.
define i1 @andn_cmp(i32 %x, i32 %y) {
; CHECK-LABEL: andn_cmp:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl %esi, %edi, %eax
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
@@ -141,7 +141,7 @@ define i1 @andn_cmp(i32 %x, i32 %y) {
; Recognize a disguised andn in the following 4 tests.
define i1 @and_cmp1(i32 %x, i32 %y) {
; CHECK-LABEL: and_cmp1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl %esi, %edi, %eax
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
@@ -152,7 +152,7 @@ define i1 @and_cmp1(i32 %x, i32 %y) {
define i1 @and_cmp2(i32 %x, i32 %y) {
; CHECK-LABEL: and_cmp2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl %esi, %edi, %eax
; CHECK-NEXT: setne %al
; CHECK-NEXT: retq
@@ -163,7 +163,7 @@ define i1 @and_cmp2(i32 %x, i32 %y) {
define i1 @and_cmp3(i32 %x, i32 %y) {
; CHECK-LABEL: and_cmp3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl %esi, %edi, %eax
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
@@ -174,7 +174,7 @@ define i1 @and_cmp3(i32 %x, i32 %y) {
define i1 @and_cmp4(i32 %x, i32 %y) {
; CHECK-LABEL: and_cmp4:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnl %esi, %edi, %eax
; CHECK-NEXT: setne %al
; CHECK-NEXT: retq
@@ -187,7 +187,7 @@ define i1 @and_cmp4(i32 %x, i32 %y) {
; even though the BMI instruction doesn't have an immediate form.
define i1 @and_cmp_const(i32 %x) {
; CHECK-LABEL: and_cmp_const:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $43, %eax
; CHECK-NEXT: andnl %eax, %edi, %eax
; CHECK-NEXT: sete %al
@@ -200,7 +200,7 @@ define i1 @and_cmp_const(i32 %x) {
; But don't use 'andn' if the mask is a power-of-two.
define i1 @and_cmp_const_power_of_two(i32 %x, i32 %y) {
; CHECK-LABEL: and_cmp_const_power_of_two:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: btl %esi, %edi
; CHECK-NEXT: setae %al
; CHECK-NEXT: retq
@@ -213,7 +213,7 @@ define i1 @and_cmp_const_power_of_two(i3
; Don't transform to 'andn' if there's another use of the 'and'.
define i32 @and_cmp_not_one_use(i32 %x) {
; CHECK-LABEL: and_cmp_not_one_use:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl $37, %edi
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $37, %edi
@@ -230,7 +230,7 @@ define i32 @and_cmp_not_one_use(i32 %x)
; Verify that we're not transforming invalid comparison predicates.
define i1 @not_an_andn1(i32 %x, i32 %y) {
; CHECK-LABEL: not_an_andn1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl %esi, %edi
; CHECK-NEXT: cmpl %edi, %esi
; CHECK-NEXT: setg %al
@@ -242,7 +242,7 @@ define i1 @not_an_andn1(i32 %x, i32 %y)
define i1 @not_an_andn2(i32 %x, i32 %y) {
; CHECK-LABEL: not_an_andn2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andl %esi, %edi
; CHECK-NEXT: cmpl %edi, %esi
; CHECK-NEXT: setbe %al
@@ -255,7 +255,7 @@ define i1 @not_an_andn2(i32 %x, i32 %y)
; Don't choose a 'test' if an 'andn' can be used.
define i1 @andn_cmp_swap_ops(i64 %x, i64 %y) {
; CHECK-LABEL: andn_cmp_swap_ops:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: andnq %rsi, %rdi, %rax
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
@@ -268,7 +268,7 @@ define i1 @andn_cmp_swap_ops(i64 %x, i64
; Use a 'test' (not an 'and') because 'andn' only works for i32/i64.
define i1 @andn_cmp_i8(i8 %x, i8 %y) {
; CHECK-LABEL: andn_cmp_i8:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: notb %sil
; CHECK-NEXT: testb %sil, %dil
; CHECK-NEXT: sete %al
@@ -281,7 +281,7 @@ define i1 @andn_cmp_i8(i8 %x, i8 %y) {
define i32 @bextr32(i32 %x, i32 %y) {
; CHECK-LABEL: bextr32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: bextrl %esi, %edi, %eax
; CHECK-NEXT: retq
%tmp = tail call i32 @llvm.x86.bmi.bextr.32(i32 %x, i32 %y)
@@ -290,7 +290,7 @@ define i32 @bextr32(i32 %x, i32 %y) {
define i32 @bextr32_load(i32* %x, i32 %y) {
; CHECK-LABEL: bextr32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: bextrl %esi, (%rdi), %eax
; CHECK-NEXT: retq
%x1 = load i32, i32* %x
@@ -302,7 +302,7 @@ declare i32 @llvm.x86.bmi.bextr.32(i32,
define i32 @bextr32b(i32 %x) uwtable ssp {
; CHECK-LABEL: bextr32b:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $3076, %eax # imm = 0xC04
; CHECK-NEXT: bextrl %eax, %edi, %eax
; CHECK-NEXT: retq
@@ -314,7 +314,7 @@ define i32 @bextr32b(i32 %x) uwtable s
; Make sure we still use AH subreg trick to extract 15:8
define i32 @bextr32_subreg(i32 %x) uwtable ssp {
; CHECK-LABEL: bextr32_subreg:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: movzbl %ah, %eax # NOREX
; CHECK-NEXT: retq
@@ -325,7 +325,7 @@ define i32 @bextr32_subreg(i32 %x) uwta
define i32 @bextr32b_load(i32* %x) uwtable ssp {
; CHECK-LABEL: bextr32b_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $3076, %eax # imm = 0xC04
; CHECK-NEXT: bextrl %eax, (%rdi), %eax
; CHECK-NEXT: retq
@@ -338,7 +338,7 @@ define i32 @bextr32b_load(i32* %x) uwta
; PR34042
define i32 @bextr32c(i32 %x, i16 zeroext %y) {
; CHECK-LABEL: bextr32c:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movswl %si, %eax
; CHECK-NEXT: bextrl %eax, %edi, %eax
; CHECK-NEXT: retq
@@ -349,7 +349,7 @@ define i32 @bextr32c(i32 %x, i16 zeroext
define i64 @bextr64(i64 %x, i64 %y) {
; CHECK-LABEL: bextr64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: bextrq %rsi, %rdi, %rax
; CHECK-NEXT: retq
%tmp = tail call i64 @llvm.x86.bmi.bextr.64(i64 %x, i64 %y)
@@ -360,7 +360,7 @@ declare i64 @llvm.x86.bmi.bextr.64(i64,
define i64 @bextr64b(i64 %x) uwtable ssp {
; CHECK-LABEL: bextr64b:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $3076, %eax # imm = 0xC04
; CHECK-NEXT: bextrl %eax, %edi, %eax
; CHECK-NEXT: retq
@@ -372,7 +372,7 @@ define i64 @bextr64b(i64 %x) uwtable s
; Make sure we still use the AH subreg trick to extract 15:8
define i64 @bextr64_subreg(i64 %x) uwtable ssp {
; CHECK-LABEL: bextr64_subreg:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: movzbl %ah, %eax # NOREX
; CHECK-NEXT: retq
@@ -383,7 +383,7 @@ define i64 @bextr64_subreg(i64 %x) uwta
define i64 @bextr64b_load(i64* %x) {
; CHECK-LABEL: bextr64b_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $3076, %eax # imm = 0xC04
; CHECK-NEXT: bextrl %eax, (%rdi), %eax
; CHECK-NEXT: retq
@@ -396,7 +396,7 @@ define i64 @bextr64b_load(i64* %x) {
; PR34042
define i64 @bextr64c(i64 %x, i32 %y) {
; CHECK-LABEL: bextr64c:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movslq %esi, %rax
; CHECK-NEXT: bextrq %rax, %rdi, %rax
; CHECK-NEXT: retq
@@ -407,7 +407,7 @@ define i64 @bextr64c(i64 %x, i32 %y) {
define i64 @bextr64d(i64 %a) {
; CHECK-LABEL: bextr64d:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl $8450, %eax # imm = 0x2102
; CHECK-NEXT: bextrq %rax, %rdi, %rax
; CHECK-NEXT: retq
@@ -419,7 +419,7 @@ entry:
define i32 @non_bextr32(i32 %x) {
; CHECK-LABEL: non_bextr32:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrl $2, %edi
; CHECK-NEXT: andl $111, %edi
; CHECK-NEXT: movl %edi, %eax
@@ -432,7 +432,7 @@ entry:
define i64 @non_bextr64(i64 %x) {
; CHECK-LABEL: non_bextr64:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: shrq $2, %rdi
; CHECK-NEXT: movabsq $8589934590, %rax # imm = 0x1FFFFFFFE
; CHECK-NEXT: andq %rdi, %rax
@@ -445,7 +445,7 @@ entry:
define i32 @bzhi32b(i32 %x, i8 zeroext %index) {
; BMI1-LABEL: bzhi32b:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $1, %eax
; BMI1-NEXT: movl %esi, %ecx
; BMI1-NEXT: shll %cl, %eax
@@ -454,7 +454,7 @@ define i32 @bzhi32b(i32 %x, i8 zeroext %
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi32b:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: bzhil %esi, %edi, %eax
; BMI2-NEXT: retq
entry:
@@ -467,7 +467,7 @@ entry:
define i32 @bzhi32b_load(i32* %w, i8 zeroext %index) {
; BMI1-LABEL: bzhi32b_load:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $1, %eax
; BMI1-NEXT: movl %esi, %ecx
; BMI1-NEXT: shll %cl, %eax
@@ -476,7 +476,7 @@ define i32 @bzhi32b_load(i32* %w, i8 zer
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi32b_load:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: bzhil %esi, (%rdi), %eax
; BMI2-NEXT: retq
entry:
@@ -490,7 +490,7 @@ entry:
define i32 @bzhi32c(i32 %x, i8 zeroext %index) {
; BMI1-LABEL: bzhi32c:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $1, %eax
; BMI1-NEXT: movl %esi, %ecx
; BMI1-NEXT: shll %cl, %eax
@@ -499,7 +499,7 @@ define i32 @bzhi32c(i32 %x, i8 zeroext %
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi32c:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: bzhil %esi, %edi, %eax
; BMI2-NEXT: retq
entry:
@@ -512,7 +512,7 @@ entry:
define i32 @bzhi32d(i32 %a, i32 %b) {
; BMI1-LABEL: bzhi32d:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $32, %ecx
; BMI1-NEXT: subl %esi, %ecx
; BMI1-NEXT: movl $-1, %eax
@@ -522,7 +522,7 @@ define i32 @bzhi32d(i32 %a, i32 %b) {
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi32d:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: bzhil %esi, %edi, %eax
; BMI2-NEXT: retq
entry:
@@ -534,7 +534,7 @@ entry:
define i32 @bzhi32e(i32 %a, i32 %b) {
; BMI1-LABEL: bzhi32e:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $32, %ecx
; BMI1-NEXT: subl %esi, %ecx
; BMI1-NEXT: shll %cl, %edi
@@ -544,7 +544,7 @@ define i32 @bzhi32e(i32 %a, i32 %b) {
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi32e:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: bzhil %esi, %edi, %eax
; BMI2-NEXT: retq
entry:
@@ -556,7 +556,7 @@ entry:
define i64 @bzhi64b(i64 %x, i8 zeroext %index) {
; BMI1-LABEL: bzhi64b:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $1, %eax
; BMI1-NEXT: movl %esi, %ecx
; BMI1-NEXT: shlq %cl, %rax
@@ -565,7 +565,7 @@ define i64 @bzhi64b(i64 %x, i8 zeroext %
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi64b:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
; BMI2-NEXT: retq
@@ -579,7 +579,7 @@ entry:
define i64 @bzhi64c(i64 %a, i64 %b) {
; BMI1-LABEL: bzhi64c:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $64, %ecx
; BMI1-NEXT: subl %esi, %ecx
; BMI1-NEXT: movq $-1, %rax
@@ -589,7 +589,7 @@ define i64 @bzhi64c(i64 %a, i64 %b) {
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi64c:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
; BMI2-NEXT: retq
entry:
@@ -601,7 +601,7 @@ entry:
define i64 @bzhi64d(i64 %a, i32 %b) {
; BMI1-LABEL: bzhi64d:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $64, %ecx
; BMI1-NEXT: subl %esi, %ecx
; BMI1-NEXT: movq $-1, %rax
@@ -611,7 +611,7 @@ define i64 @bzhi64d(i64 %a, i32 %b) {
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi64d:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
; BMI2-NEXT: retq
@@ -625,7 +625,7 @@ entry:
define i64 @bzhi64e(i64 %a, i64 %b) {
; BMI1-LABEL: bzhi64e:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $64, %ecx
; BMI1-NEXT: subl %esi, %ecx
; BMI1-NEXT: shlq %cl, %rdi
@@ -635,7 +635,7 @@ define i64 @bzhi64e(i64 %a, i64 %b) {
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi64e:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
; BMI2-NEXT: retq
entry:
@@ -647,7 +647,7 @@ entry:
define i64 @bzhi64f(i64 %a, i32 %b) {
; BMI1-LABEL: bzhi64f:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $64, %ecx
; BMI1-NEXT: subl %esi, %ecx
; BMI1-NEXT: shlq %cl, %rdi
@@ -657,7 +657,7 @@ define i64 @bzhi64f(i64 %a, i32 %b) {
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi64f:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
; BMI2-NEXT: bzhiq %rsi, %rdi, %rax
; BMI2-NEXT: retq
@@ -671,13 +671,13 @@ entry:
define i64 @bzhi64_constant_mask(i64 %x) {
; BMI1-LABEL: bzhi64_constant_mask:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $15872, %eax # imm = 0x3E00
; BMI1-NEXT: bextrq %rax, %rdi, %rax
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi64_constant_mask:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: movb $62, %al
; BMI2-NEXT: bzhiq %rax, %rdi, %rax
; BMI2-NEXT: retq
@@ -688,13 +688,13 @@ entry:
define i64 @bzhi64_constant_mask_load(i64* %x) {
; BMI1-LABEL: bzhi64_constant_mask_load:
-; BMI1: # BB#0: # %entry
+; BMI1: # %bb.0: # %entry
; BMI1-NEXT: movl $15872, %eax # imm = 0x3E00
; BMI1-NEXT: bextrq %rax, (%rdi), %rax
; BMI1-NEXT: retq
;
; BMI2-LABEL: bzhi64_constant_mask_load:
-; BMI2: # BB#0: # %entry
+; BMI2: # %bb.0: # %entry
; BMI2-NEXT: movb $62, %al
; BMI2-NEXT: bzhiq %rax, (%rdi), %rax
; BMI2-NEXT: retq
@@ -706,7 +706,7 @@ entry:
define i64 @bzhi64_small_constant_mask(i64 %x) {
; CHECK-LABEL: bzhi64_small_constant_mask:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andl $2147483647, %edi # imm = 0x7FFFFFFF
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: retq
@@ -717,7 +717,7 @@ entry:
define i32 @blsi32(i32 %x) {
; CHECK-LABEL: blsi32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsil %edi, %eax
; CHECK-NEXT: retq
%tmp = sub i32 0, %x
@@ -727,7 +727,7 @@ define i32 @blsi32(i32 %x) {
define i32 @blsi32_load(i32* %x) {
; CHECK-LABEL: blsi32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsil (%rdi), %eax
; CHECK-NEXT: retq
%x1 = load i32, i32* %x
@@ -738,7 +738,7 @@ define i32 @blsi32_load(i32* %x) {
define i64 @blsi64(i64 %x) {
; CHECK-LABEL: blsi64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsiq %rdi, %rax
; CHECK-NEXT: retq
%tmp = sub i64 0, %x
@@ -748,7 +748,7 @@ define i64 @blsi64(i64 %x) {
define i32 @blsmsk32(i32 %x) {
; CHECK-LABEL: blsmsk32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsmskl %edi, %eax
; CHECK-NEXT: retq
%tmp = sub i32 %x, 1
@@ -758,7 +758,7 @@ define i32 @blsmsk32(i32 %x) {
define i32 @blsmsk32_load(i32* %x) {
; CHECK-LABEL: blsmsk32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsmskl (%rdi), %eax
; CHECK-NEXT: retq
%x1 = load i32, i32* %x
@@ -769,7 +769,7 @@ define i32 @blsmsk32_load(i32* %x) {
define i64 @blsmsk64(i64 %x) {
; CHECK-LABEL: blsmsk64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsmskq %rdi, %rax
; CHECK-NEXT: retq
%tmp = sub i64 %x, 1
@@ -779,7 +779,7 @@ define i64 @blsmsk64(i64 %x) {
define i32 @blsr32(i32 %x) {
; CHECK-LABEL: blsr32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsrl %edi, %eax
; CHECK-NEXT: retq
%tmp = sub i32 %x, 1
@@ -789,7 +789,7 @@ define i32 @blsr32(i32 %x) {
define i32 @blsr32_load(i32* %x) {
; CHECK-LABEL: blsr32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsrl (%rdi), %eax
; CHECK-NEXT: retq
%x1 = load i32, i32* %x
@@ -800,7 +800,7 @@ define i32 @blsr32_load(i32* %x) {
define i64 @blsr64(i64 %x) {
; CHECK-LABEL: blsr64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: blsrq %rdi, %rax
; CHECK-NEXT: retq
%tmp = sub i64 %x, 1
Modified: llvm/trunk/test/CodeGen/X86/bmi2-schedule.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi2-schedule.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi2-schedule.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi2-schedule.ll Mon Dec 4 09:18:51 2017
@@ -8,42 +8,42 @@
define i32 @test_bzhi_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_bzhi_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: bzhil %edi, (%rdx), %ecx
; GENERIC-NEXT: bzhil %edi, %esi, %eax
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_bzhi_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: bzhil %edi, (%rdx), %ecx # sched: [1:0.50]
; HASWELL-NEXT: bzhil %edi, %esi, %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_bzhi_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: bzhil %edi, (%rdx), %ecx # sched: [6:0.50]
; BROADWELL-NEXT: bzhil %edi, %esi, %eax # sched: [1:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_bzhi_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: bzhil %edi, (%rdx), %ecx # sched: [6:0.50]
; SKYLAKE-NEXT: bzhil %edi, %esi, %eax # sched: [1:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_bzhi_i32:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: bzhil %edi, (%rdx), %ecx # sched: [1:0.50]
; KNL-NEXT: bzhil %edi, %esi, %eax # sched: [1:0.50]
; KNL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_bzhi_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: bzhil %edi, (%rdx), %ecx # sched: [5:0.50]
; ZNVER1-NEXT: bzhil %edi, %esi, %eax # sched: [1:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -58,42 +58,42 @@ declare i32 @llvm.x86.bmi.bzhi.32(i32, i
define i64 @test_bzhi_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_bzhi_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: bzhiq %rdi, (%rdx), %rcx
; GENERIC-NEXT: bzhiq %rdi, %rsi, %rax
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_bzhi_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: bzhiq %rdi, (%rdx), %rcx # sched: [1:0.50]
; HASWELL-NEXT: bzhiq %rdi, %rsi, %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_bzhi_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: bzhiq %rdi, (%rdx), %rcx # sched: [6:0.50]
; BROADWELL-NEXT: bzhiq %rdi, %rsi, %rax # sched: [1:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_bzhi_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: bzhiq %rdi, (%rdx), %rcx # sched: [6:0.50]
; SKYLAKE-NEXT: bzhiq %rdi, %rsi, %rax # sched: [1:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_bzhi_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: bzhiq %rdi, (%rdx), %rcx # sched: [1:0.50]
; KNL-NEXT: bzhiq %rdi, %rsi, %rax # sched: [1:0.50]
; KNL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_bzhi_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: bzhiq %rdi, (%rdx), %rcx # sched: [5:0.50]
; ZNVER1-NEXT: bzhiq %rdi, %rsi, %rax # sched: [1:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -110,7 +110,7 @@ declare i64 @llvm.x86.bmi.bzhi.64(i64, i
define i64 @test_mulx_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_mulx_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: movq %rdx, %rax # sched: [1:0.33]
; GENERIC-NEXT: movq %rdi, %rdx # sched: [1:0.33]
; GENERIC-NEXT: mulxq %rsi, %rsi, %rcx # sched: [3:1.00]
@@ -119,7 +119,7 @@ define i64 @test_mulx_i64(i64 %a0, i64 %
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_mulx_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: movq %rdx, %rax # sched: [1:0.25]
; HASWELL-NEXT: movq %rdi, %rdx # sched: [1:0.25]
; HASWELL-NEXT: mulxq %rsi, %rsi, %rcx # sched: [4:1.00]
@@ -128,7 +128,7 @@ define i64 @test_mulx_i64(i64 %a0, i64 %
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_mulx_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: movq %rdx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: movq %rdi, %rdx # sched: [1:0.25]
; BROADWELL-NEXT: mulxq %rsi, %rsi, %rcx # sched: [4:1.00]
@@ -137,7 +137,7 @@ define i64 @test_mulx_i64(i64 %a0, i64 %
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_mulx_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: movq %rdx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: movq %rdi, %rdx # sched: [1:0.25]
; SKYLAKE-NEXT: mulxq %rsi, %rsi, %rcx # sched: [4:1.00]
@@ -146,7 +146,7 @@ define i64 @test_mulx_i64(i64 %a0, i64 %
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_mulx_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: movq %rdx, %rax # sched: [1:0.25]
; KNL-NEXT: movq %rdi, %rdx # sched: [1:0.25]
; KNL-NEXT: mulxq %rsi, %rsi, %rcx # sched: [4:1.00]
@@ -155,7 +155,7 @@ define i64 @test_mulx_i64(i64 %a0, i64 %
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_mulx_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: movq %rdx, %rax # sched: [1:0.25]
; ZNVER1-NEXT: movq %rdi, %rdx # sched: [1:0.25]
; ZNVER1-NEXT: mulxq %rsi, %rsi, %rcx # sched: [3:1.00]
@@ -178,42 +178,42 @@ define i64 @test_mulx_i64(i64 %a0, i64 %
define i32 @test_pdep_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_pdep_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pdepl (%rdx), %edi, %ecx
; GENERIC-NEXT: pdepl %esi, %edi, %eax
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pdep_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pdepl (%rdx), %edi, %ecx # sched: [3:1.00]
; HASWELL-NEXT: pdepl %esi, %edi, %eax # sched: [3:1.00]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pdep_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pdepl (%rdx), %edi, %ecx # sched: [8:1.00]
; BROADWELL-NEXT: pdepl %esi, %edi, %eax # sched: [3:1.00]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pdep_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pdepl (%rdx), %edi, %ecx # sched: [8:1.00]
; SKYLAKE-NEXT: pdepl %esi, %edi, %eax # sched: [3:1.00]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_pdep_i32:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: pdepl (%rdx), %edi, %ecx # sched: [3:1.00]
; KNL-NEXT: pdepl %esi, %edi, %eax # sched: [3:1.00]
; KNL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_pdep_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pdepl (%rdx), %edi, %ecx # sched: [100:?]
; ZNVER1-NEXT: pdepl %esi, %edi, %eax # sched: [100:?]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -228,42 +228,42 @@ declare i32 @llvm.x86.bmi.pdep.32(i32, i
define i64 @test_pdep_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_pdep_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pdepq (%rdx), %rdi, %rcx
; GENERIC-NEXT: pdepq %rsi, %rdi, %rax
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pdep_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pdepq (%rdx), %rdi, %rcx # sched: [3:1.00]
; HASWELL-NEXT: pdepq %rsi, %rdi, %rax # sched: [3:1.00]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pdep_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pdepq (%rdx), %rdi, %rcx # sched: [8:1.00]
; BROADWELL-NEXT: pdepq %rsi, %rdi, %rax # sched: [3:1.00]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pdep_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pdepq (%rdx), %rdi, %rcx # sched: [8:1.00]
; SKYLAKE-NEXT: pdepq %rsi, %rdi, %rax # sched: [3:1.00]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_pdep_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: pdepq (%rdx), %rdi, %rcx # sched: [3:1.00]
; KNL-NEXT: pdepq %rsi, %rdi, %rax # sched: [3:1.00]
; KNL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_pdep_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pdepq (%rdx), %rdi, %rcx # sched: [100:?]
; ZNVER1-NEXT: pdepq %rsi, %rdi, %rax # sched: [100:?]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -278,42 +278,42 @@ declare i64 @llvm.x86.bmi.pdep.64(i64, i
define i32 @test_pext_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_pext_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pextl (%rdx), %edi, %ecx
; GENERIC-NEXT: pextl %esi, %edi, %eax
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pext_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pextl (%rdx), %edi, %ecx # sched: [3:1.00]
; HASWELL-NEXT: pextl %esi, %edi, %eax # sched: [3:1.00]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pext_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pextl (%rdx), %edi, %ecx # sched: [8:1.00]
; BROADWELL-NEXT: pextl %esi, %edi, %eax # sched: [3:1.00]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pext_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pextl (%rdx), %edi, %ecx # sched: [8:1.00]
; SKYLAKE-NEXT: pextl %esi, %edi, %eax # sched: [3:1.00]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_pext_i32:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: pextl (%rdx), %edi, %ecx # sched: [3:1.00]
; KNL-NEXT: pextl %esi, %edi, %eax # sched: [3:1.00]
; KNL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_pext_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pextl (%rdx), %edi, %ecx # sched: [100:?]
; ZNVER1-NEXT: pextl %esi, %edi, %eax # sched: [100:?]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -328,42 +328,42 @@ declare i32 @llvm.x86.bmi.pext.32(i32, i
define i64 @test_pext_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_pext_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: pextq (%rdx), %rdi, %rcx
; GENERIC-NEXT: pextq %rsi, %rdi, %rax
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_pext_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: pextq (%rdx), %rdi, %rcx # sched: [3:1.00]
; HASWELL-NEXT: pextq %rsi, %rdi, %rax # sched: [3:1.00]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_pext_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: pextq (%rdx), %rdi, %rcx # sched: [8:1.00]
; BROADWELL-NEXT: pextq %rsi, %rdi, %rax # sched: [3:1.00]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_pext_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: pextq (%rdx), %rdi, %rcx # sched: [8:1.00]
; SKYLAKE-NEXT: pextq %rsi, %rdi, %rax # sched: [3:1.00]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_pext_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: pextq (%rdx), %rdi, %rcx # sched: [3:1.00]
; KNL-NEXT: pextq %rsi, %rdi, %rax # sched: [3:1.00]
; KNL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_pext_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: pextq (%rdx), %rdi, %rcx # sched: [100:?]
; ZNVER1-NEXT: pextq %rsi, %rdi, %rax # sched: [100:?]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -378,42 +378,42 @@ declare i64 @llvm.x86.bmi.pext.64(i64, i
define i32 @test_rorx_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_rorx_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: rorxl $5, %edi, %ecx # sched: [1:0.50]
; GENERIC-NEXT: rorxl $5, (%rdx), %eax # sched: [5:0.50]
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_rorx_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: rorxl $5, %edi, %ecx # sched: [1:0.50]
; HASWELL-NEXT: rorxl $5, (%rdx), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_rorx_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: rorxl $5, %edi, %ecx # sched: [1:0.50]
; BROADWELL-NEXT: rorxl $5, (%rdx), %eax # sched: [6:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_rorx_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: rorxl $5, %edi, %ecx # sched: [1:0.50]
; SKYLAKE-NEXT: rorxl $5, (%rdx), %eax # sched: [6:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_rorx_i32:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: rorxl $5, %edi, %ecx # sched: [1:0.50]
; KNL-NEXT: rorxl $5, (%rdx), %eax # sched: [1:0.50]
; KNL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_rorx_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: rorxl $5, (%rdx), %eax # sched: [5:0.50]
; ZNVER1-NEXT: rorxl $5, %edi, %ecx # sched: [1:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -431,42 +431,42 @@ define i32 @test_rorx_i32(i32 %a0, i32 %
define i64 @test_rorx_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_rorx_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: rorxq $5, %rdi, %rcx # sched: [1:0.50]
; GENERIC-NEXT: rorxq $5, (%rdx), %rax # sched: [5:0.50]
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_rorx_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: rorxq $5, %rdi, %rcx # sched: [1:0.50]
; HASWELL-NEXT: rorxq $5, (%rdx), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_rorx_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: rorxq $5, %rdi, %rcx # sched: [1:0.50]
; BROADWELL-NEXT: rorxq $5, (%rdx), %rax # sched: [6:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_rorx_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: rorxq $5, %rdi, %rcx # sched: [1:0.50]
; SKYLAKE-NEXT: rorxq $5, (%rdx), %rax # sched: [6:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_rorx_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: rorxq $5, %rdi, %rcx # sched: [1:0.50]
; KNL-NEXT: rorxq $5, (%rdx), %rax # sched: [1:0.50]
; KNL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_rorx_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: rorxq $5, (%rdx), %rax # sched: [5:0.50]
; ZNVER1-NEXT: rorxq $5, %rdi, %rcx # sched: [1:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -484,42 +484,42 @@ define i64 @test_rorx_i64(i64 %a0, i64 %
define i32 @test_sarx_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_sarx_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: sarxl %esi, %edi, %ecx # sched: [1:0.50]
; GENERIC-NEXT: sarxl %esi, (%rdx), %eax # sched: [5:0.50]
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_sarx_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: sarxl %esi, %edi, %ecx # sched: [1:0.50]
; HASWELL-NEXT: sarxl %esi, (%rdx), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_sarx_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: sarxl %esi, %edi, %ecx # sched: [1:0.50]
; BROADWELL-NEXT: sarxl %esi, (%rdx), %eax # sched: [6:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_sarx_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: sarxl %esi, %edi, %ecx # sched: [1:0.50]
; SKYLAKE-NEXT: sarxl %esi, (%rdx), %eax # sched: [6:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_sarx_i32:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: sarxl %esi, %edi, %ecx # sched: [1:0.50]
; KNL-NEXT: sarxl %esi, (%rdx), %eax # sched: [1:0.50]
; KNL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_sarx_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: sarxl %esi, (%rdx), %eax # sched: [5:0.50]
; ZNVER1-NEXT: sarxl %esi, %edi, %ecx # sched: [1:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -533,42 +533,42 @@ define i32 @test_sarx_i32(i32 %a0, i32 %
define i64 @test_sarx_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_sarx_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: sarxq %rsi, %rdi, %rcx # sched: [1:0.50]
; GENERIC-NEXT: sarxq %rsi, (%rdx), %rax # sched: [5:0.50]
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_sarx_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: sarxq %rsi, %rdi, %rcx # sched: [1:0.50]
; HASWELL-NEXT: sarxq %rsi, (%rdx), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_sarx_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: sarxq %rsi, %rdi, %rcx # sched: [1:0.50]
; BROADWELL-NEXT: sarxq %rsi, (%rdx), %rax # sched: [6:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_sarx_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: sarxq %rsi, %rdi, %rcx # sched: [1:0.50]
; SKYLAKE-NEXT: sarxq %rsi, (%rdx), %rax # sched: [6:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_sarx_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: sarxq %rsi, %rdi, %rcx # sched: [1:0.50]
; KNL-NEXT: sarxq %rsi, (%rdx), %rax # sched: [1:0.50]
; KNL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_sarx_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: sarxq %rsi, (%rdx), %rax # sched: [5:0.50]
; ZNVER1-NEXT: sarxq %rsi, %rdi, %rcx # sched: [1:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -582,42 +582,42 @@ define i64 @test_sarx_i64(i64 %a0, i64 %
define i32 @test_shlx_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_shlx_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: shlxl %esi, %edi, %ecx # sched: [1:0.50]
; GENERIC-NEXT: shlxl %esi, (%rdx), %eax # sched: [5:0.50]
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_shlx_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: shlxl %esi, %edi, %ecx # sched: [1:0.50]
; HASWELL-NEXT: shlxl %esi, (%rdx), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_shlx_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: shlxl %esi, %edi, %ecx # sched: [1:0.50]
; BROADWELL-NEXT: shlxl %esi, (%rdx), %eax # sched: [6:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_shlx_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: shlxl %esi, %edi, %ecx # sched: [1:0.50]
; SKYLAKE-NEXT: shlxl %esi, (%rdx), %eax # sched: [6:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_shlx_i32:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: shlxl %esi, %edi, %ecx # sched: [1:0.50]
; KNL-NEXT: shlxl %esi, (%rdx), %eax # sched: [1:0.50]
; KNL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_shlx_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: shlxl %esi, (%rdx), %eax # sched: [5:0.50]
; ZNVER1-NEXT: shlxl %esi, %edi, %ecx # sched: [1:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -631,42 +631,42 @@ define i32 @test_shlx_i32(i32 %a0, i32 %
define i64 @test_shlx_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_shlx_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: shlxq %rsi, %rdi, %rcx # sched: [1:0.50]
; GENERIC-NEXT: shlxq %rsi, (%rdx), %rax # sched: [5:0.50]
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_shlx_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: shlxq %rsi, %rdi, %rcx # sched: [1:0.50]
; HASWELL-NEXT: shlxq %rsi, (%rdx), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_shlx_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: shlxq %rsi, %rdi, %rcx # sched: [1:0.50]
; BROADWELL-NEXT: shlxq %rsi, (%rdx), %rax # sched: [6:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_shlx_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: shlxq %rsi, %rdi, %rcx # sched: [1:0.50]
; SKYLAKE-NEXT: shlxq %rsi, (%rdx), %rax # sched: [6:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_shlx_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: shlxq %rsi, %rdi, %rcx # sched: [1:0.50]
; KNL-NEXT: shlxq %rsi, (%rdx), %rax # sched: [1:0.50]
; KNL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_shlx_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: shlxq %rsi, (%rdx), %rax # sched: [5:0.50]
; ZNVER1-NEXT: shlxq %rsi, %rdi, %rcx # sched: [1:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
@@ -680,42 +680,42 @@ define i64 @test_shlx_i64(i64 %a0, i64 %
define i32 @test_shrx_i32(i32 %a0, i32 %a1, i32 *%a2) {
; GENERIC-LABEL: test_shrx_i32:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: shrxl %esi, %edi, %ecx # sched: [1:0.50]
; GENERIC-NEXT: shrxl %esi, (%rdx), %eax # sched: [5:0.50]
; GENERIC-NEXT: addl %ecx, %eax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_shrx_i32:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: shrxl %esi, %edi, %ecx # sched: [1:0.50]
; HASWELL-NEXT: shrxl %esi, (%rdx), %eax # sched: [1:0.50]
; HASWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_shrx_i32:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: shrxl %esi, %edi, %ecx # sched: [1:0.50]
; BROADWELL-NEXT: shrxl %esi, (%rdx), %eax # sched: [6:0.50]
; BROADWELL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_shrx_i32:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: shrxl %esi, %edi, %ecx # sched: [1:0.50]
; SKYLAKE-NEXT: shrxl %esi, (%rdx), %eax # sched: [6:0.50]
; SKYLAKE-NEXT: addl %ecx, %eax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_shrx_i32:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: shrxl %esi, %edi, %ecx # sched: [1:0.50]
; KNL-NEXT: shrxl %esi, (%rdx), %eax # sched: [1:0.50]
; KNL-NEXT: addl %ecx, %eax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_shrx_i32:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: shrxl %esi, (%rdx), %eax # sched: [5:0.50]
; ZNVER1-NEXT: shrxl %esi, %edi, %ecx # sched: [1:0.25]
; ZNVER1-NEXT: addl %ecx, %eax # sched: [1:0.25]
@@ -729,42 +729,42 @@ define i32 @test_shrx_i32(i32 %a0, i32 %
define i64 @test_shrx_i64(i64 %a0, i64 %a1, i64 *%a2) {
; GENERIC-LABEL: test_shrx_i64:
-; GENERIC: # BB#0:
+; GENERIC: # %bb.0:
; GENERIC-NEXT: shrxq %rsi, %rdi, %rcx # sched: [1:0.50]
; GENERIC-NEXT: shrxq %rsi, (%rdx), %rax # sched: [5:0.50]
; GENERIC-NEXT: addq %rcx, %rax # sched: [1:0.33]
; GENERIC-NEXT: retq # sched: [1:1.00]
;
; HASWELL-LABEL: test_shrx_i64:
-; HASWELL: # BB#0:
+; HASWELL: # %bb.0:
; HASWELL-NEXT: shrxq %rsi, %rdi, %rcx # sched: [1:0.50]
; HASWELL-NEXT: shrxq %rsi, (%rdx), %rax # sched: [1:0.50]
; HASWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; HASWELL-NEXT: retq # sched: [2:1.00]
;
; BROADWELL-LABEL: test_shrx_i64:
-; BROADWELL: # BB#0:
+; BROADWELL: # %bb.0:
; BROADWELL-NEXT: shrxq %rsi, %rdi, %rcx # sched: [1:0.50]
; BROADWELL-NEXT: shrxq %rsi, (%rdx), %rax # sched: [6:0.50]
; BROADWELL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; BROADWELL-NEXT: retq # sched: [7:1.00]
;
; SKYLAKE-LABEL: test_shrx_i64:
-; SKYLAKE: # BB#0:
+; SKYLAKE: # %bb.0:
; SKYLAKE-NEXT: shrxq %rsi, %rdi, %rcx # sched: [1:0.50]
; SKYLAKE-NEXT: shrxq %rsi, (%rdx), %rax # sched: [6:0.50]
; SKYLAKE-NEXT: addq %rcx, %rax # sched: [1:0.25]
; SKYLAKE-NEXT: retq # sched: [7:1.00]
;
; KNL-LABEL: test_shrx_i64:
-; KNL: # BB#0:
+; KNL: # %bb.0:
; KNL-NEXT: shrxq %rsi, %rdi, %rcx # sched: [1:0.50]
; KNL-NEXT: shrxq %rsi, (%rdx), %rax # sched: [1:0.50]
; KNL-NEXT: addq %rcx, %rax # sched: [1:0.25]
; KNL-NEXT: retq # sched: [2:1.00]
;
; ZNVER1-LABEL: test_shrx_i64:
-; ZNVER1: # BB#0:
+; ZNVER1: # %bb.0:
; ZNVER1-NEXT: shrxq %rsi, (%rdx), %rax # sched: [5:0.50]
; ZNVER1-NEXT: shrxq %rsi, %rdi, %rcx # sched: [1:0.25]
; ZNVER1-NEXT: addq %rcx, %rax # sched: [1:0.25]
Modified: llvm/trunk/test/CodeGen/X86/bmi2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi2.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi2.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i32 @bzhi32(i32 %x, i32 %y) {
; CHECK-LABEL: bzhi32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: bzhil %esi, %edi, %eax
; CHECK-NEXT: retq
%tmp = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %x, i32 %y)
@@ -12,7 +12,7 @@ define i32 @bzhi32(i32 %x, i32 %y) {
define i32 @bzhi32_load(i32* %x, i32 %y) {
; CHECK-LABEL: bzhi32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: bzhil %esi, (%rdi), %eax
; CHECK-NEXT: retq
%x1 = load i32, i32* %x
@@ -24,7 +24,7 @@ declare i32 @llvm.x86.bmi.bzhi.32(i32, i
define i64 @bzhi64(i64 %x, i64 %y) {
; CHECK-LABEL: bzhi64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: bzhiq %rsi, %rdi, %rax
; CHECK-NEXT: retq
%tmp = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %x, i64 %y)
@@ -35,7 +35,7 @@ declare i64 @llvm.x86.bmi.bzhi.64(i64, i
define i32 @pdep32(i32 %x, i32 %y) {
; CHECK-LABEL: pdep32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pdepl %esi, %edi, %eax
; CHECK-NEXT: retq
%tmp = tail call i32 @llvm.x86.bmi.pdep.32(i32 %x, i32 %y)
@@ -44,7 +44,7 @@ define i32 @pdep32(i32 %x, i32 %y) {
define i32 @pdep32_load(i32 %x, i32* %y) {
; CHECK-LABEL: pdep32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pdepl (%rsi), %edi, %eax
; CHECK-NEXT: retq
%y1 = load i32, i32* %y
@@ -56,7 +56,7 @@ declare i32 @llvm.x86.bmi.pdep.32(i32, i
define i64 @pdep64(i64 %x, i64 %y) {
; CHECK-LABEL: pdep64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pdepq %rsi, %rdi, %rax
; CHECK-NEXT: retq
%tmp = tail call i64 @llvm.x86.bmi.pdep.64(i64 %x, i64 %y)
@@ -67,7 +67,7 @@ declare i64 @llvm.x86.bmi.pdep.64(i64, i
define i32 @pext32(i32 %x, i32 %y) {
; CHECK-LABEL: pext32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pextl %esi, %edi, %eax
; CHECK-NEXT: retq
%tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 %y)
@@ -76,7 +76,7 @@ define i32 @pext32(i32 %x, i32 %y) {
define i32 @pext32_load(i32 %x, i32* %y) {
; CHECK-LABEL: pext32_load:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pextl (%rsi), %edi, %eax
; CHECK-NEXT: retq
%y1 = load i32, i32* %y
@@ -88,7 +88,7 @@ declare i32 @llvm.x86.bmi.pext.32(i32, i
define i64 @pext64(i64 %x, i64 %y) {
; CHECK-LABEL: pext64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pextq %rsi, %rdi, %rax
; CHECK-NEXT: retq
%tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 %y)
Modified: llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bool-ext-inc.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define i32 @sext_inc(i1 zeroext %x) nounwind {
; CHECK-LABEL: sext_inc:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorb $1, %dil
; CHECK-NEXT: movzbl %dil, %eax
; CHECK-NEXT: retq
@@ -18,7 +18,7 @@ define i32 @sext_inc(i1 zeroext %x) noun
define <4 x i32> @sext_inc_vec(<4 x i1> %x) nounwind {
; CHECK-LABEL: sext_inc_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vbroadcastss {{.*#+}} xmm1 = [1,1,1,1]
; CHECK-NEXT: vandnps %xmm1, %xmm0, %xmm0
; CHECK-NEXT: retq
@@ -29,7 +29,7 @@ define <4 x i32> @sext_inc_vec(<4 x i1>
define <4 x i32> @cmpgt_sext_inc_vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; CHECK-LABEL: cmpgt_sext_inc_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
; CHECK-NEXT: vpandn %xmm1, %xmm0, %xmm0
@@ -42,7 +42,7 @@ define <4 x i32> @cmpgt_sext_inc_vec(<4
define <4 x i32> @cmpne_sext_inc_vec(<4 x i32> %x, <4 x i32> %y) nounwind {
; CHECK-LABEL: cmpne_sext_inc_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vpsrld $31, %xmm0, %xmm0
; CHECK-NEXT: retq
@@ -54,7 +54,7 @@ define <4 x i32> @cmpne_sext_inc_vec(<4
define <4 x i64> @cmpgt_sext_inc_vec256(<4 x i64> %x, <4 x i64> %y) nounwind {
; CHECK-LABEL: cmpgt_sext_inc_vec256:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0
; CHECK-NEXT: vpbroadcastq {{.*#+}} ymm1 = [1,1,1,1]
; CHECK-NEXT: vpandn %ymm1, %ymm0, %ymm0
@@ -67,7 +67,7 @@ define <4 x i64> @cmpgt_sext_inc_vec256(
define i32 @bool_logic_and_math(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
; CHECK-LABEL: bool_logic_and_math:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: cmpl %esi, %edi
; CHECK-NEXT: sete %al
; CHECK-NEXT: cmpl %ecx, %edx
@@ -85,7 +85,7 @@ define i32 @bool_logic_and_math(i32 %a,
define <4 x i32> @bool_logic_and_math_vec(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) nounwind {
; CHECK-LABEL: bool_logic_and_math_vec:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm1
; CHECK-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
Modified: llvm/trunk/test/CodeGen/X86/bool-simplify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bool-simplify.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bool-simplify.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bool-simplify.ll Mon Dec 4 09:18:51 2017
@@ -3,7 +3,7 @@
define i32 @foo(<2 x i64> %c, i32 %a, i32 %b) {
; CHECK-LABEL: foo:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: ptest %xmm0, %xmm0
; CHECK-NEXT: cmovnel %esi, %edi
; CHECK-NEXT: movl %edi, %eax
@@ -16,10 +16,10 @@ define i32 @foo(<2 x i64> %c, i32 %a, i3
define i32 @bar(<2 x i64> %c) {
; CHECK-LABEL: bar:
-; CHECK: # BB#0: # %entry
+; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ptest %xmm0, %xmm0
; CHECK-NEXT: jne .LBB1_2
-; CHECK-NEXT: # BB#1: # %if-true-block
+; CHECK-NEXT: # %bb.1: # %if-true-block
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB1_2: # %endif-block
@@ -37,7 +37,7 @@ endif-block:
define i32 @bax(<2 x i64> %c) {
; CHECK-LABEL: bax:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: ptest %xmm0, %xmm0
; CHECK-NEXT: sete %al
@@ -50,7 +50,7 @@ define i32 @bax(<2 x i64> %c) {
define i16 @rnd16(i16 %arg) nounwind {
; CHECK-LABEL: rnd16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: rdrandw %cx
; CHECK-NEXT: cmovbw %di, %ax
@@ -68,7 +68,7 @@ define i16 @rnd16(i16 %arg) nounwind {
define i32 @rnd32(i32 %arg) nounwind {
; CHECK-LABEL: rnd32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: rdrandl %ecx
; CHECK-NEXT: cmovbl %edi, %eax
@@ -85,7 +85,7 @@ define i32 @rnd32(i32 %arg) nounwind {
define i64 @rnd64(i64 %arg) nounwind {
; CHECK-LABEL: rnd64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: rdrandq %rcx
; CHECK-NEXT: cmovbq %rdi, %rax
@@ -102,7 +102,7 @@ define i64 @rnd64(i64 %arg) nounwind {
define i16 @seed16(i16 %arg) nounwind {
; CHECK-LABEL: seed16:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: rdseedw %cx
; CHECK-NEXT: cmovbw %di, %ax
@@ -120,7 +120,7 @@ define i16 @seed16(i16 %arg) nounwind {
define i32 @seed32(i32 %arg) nounwind {
; CHECK-LABEL: seed32:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: rdseedl %ecx
; CHECK-NEXT: cmovbl %edi, %eax
@@ -137,7 +137,7 @@ define i32 @seed32(i32 %arg) nounwind {
define i64 @seed64(i64 %arg) nounwind {
; CHECK-LABEL: seed64:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: rdseedq %rcx
; CHECK-NEXT: cmovbq %rdi, %rax
Modified: llvm/trunk/test/CodeGen/X86/bool-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bool-vector.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bool-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bool-vector.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
define i32 @PR15215_bad(<4 x i32> %input) {
; X32-LABEL: PR15215_bad:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: movb {{[0-9]+}}(%esp), %al
; X32-NEXT: movb {{[0-9]+}}(%esp), %cl
; X32-NEXT: movb {{[0-9]+}}(%esp), %dl
@@ -27,21 +27,21 @@ define i32 @PR15215_bad(<4 x i32> %input
; X32-NEXT: retl
;
; X32-SSE2-LABEL: PR15215_bad:
-; X32-SSE2: # BB#0: # %entry
+; X32-SSE2: # %bb.0: # %entry
; X32-SSE2-NEXT: pslld $31, %xmm0
; X32-SSE2-NEXT: psrad $31, %xmm0
; X32-SSE2-NEXT: movmskps %xmm0, %eax
; X32-SSE2-NEXT: retl
;
; X32-AVX2-LABEL: PR15215_bad:
-; X32-AVX2: # BB#0: # %entry
+; X32-AVX2: # %bb.0: # %entry
; X32-AVX2-NEXT: vpslld $31, %xmm0, %xmm0
; X32-AVX2-NEXT: vpsrad $31, %xmm0, %xmm0
; X32-AVX2-NEXT: vmovmskps %xmm0, %eax
; X32-AVX2-NEXT: retl
;
; X64-LABEL: PR15215_bad:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: addb %cl, %cl
; X64-NEXT: andb $1, %dl
; X64-NEXT: orb %cl, %dl
@@ -56,14 +56,14 @@ define i32 @PR15215_bad(<4 x i32> %input
; X64-NEXT: retq
;
; X64-SSE2-LABEL: PR15215_bad:
-; X64-SSE2: # BB#0: # %entry
+; X64-SSE2: # %bb.0: # %entry
; X64-SSE2-NEXT: pslld $31, %xmm0
; X64-SSE2-NEXT: psrad $31, %xmm0
; X64-SSE2-NEXT: movmskps %xmm0, %eax
; X64-SSE2-NEXT: retq
;
; X64-AVX2-LABEL: PR15215_bad:
-; X64-AVX2: # BB#0: # %entry
+; X64-AVX2: # %bb.0: # %entry
; X64-AVX2-NEXT: vpslld $31, %xmm0, %xmm0
; X64-AVX2-NEXT: vpsrad $31, %xmm0, %xmm0
; X64-AVX2-NEXT: vmovmskps %xmm0, %eax
@@ -77,7 +77,7 @@ entry:
define i32 @PR15215_good(<4 x i32> %input) {
; X32-LABEL: PR15215_good:
-; X32: # BB#0: # %entry
+; X32: # %bb.0: # %entry
; X32-NEXT: pushl %esi
; X32-NEXT: .cfi_def_cfa_offset 8
; X32-NEXT: .cfi_offset %esi, -8
@@ -96,7 +96,7 @@ define i32 @PR15215_good(<4 x i32> %inpu
; X32-NEXT: retl
;
; X32-SSE2-LABEL: PR15215_good:
-; X32-SSE2: # BB#0: # %entry
+; X32-SSE2: # %bb.0: # %entry
; X32-SSE2-NEXT: pushl %esi
; X32-SSE2-NEXT: .cfi_def_cfa_offset 8
; X32-SSE2-NEXT: .cfi_offset %esi, -8
@@ -118,7 +118,7 @@ define i32 @PR15215_good(<4 x i32> %inpu
; X32-SSE2-NEXT: retl
;
; X32-AVX2-LABEL: PR15215_good:
-; X32-AVX2: # BB#0: # %entry
+; X32-AVX2: # %bb.0: # %entry
; X32-AVX2-NEXT: pushl %esi
; X32-AVX2-NEXT: .cfi_def_cfa_offset 8
; X32-AVX2-NEXT: .cfi_offset %esi, -8
@@ -137,7 +137,7 @@ define i32 @PR15215_good(<4 x i32> %inpu
; X32-AVX2-NEXT: retl
;
; X64-LABEL: PR15215_good:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: # kill: %ecx<def> %ecx<kill> %rcx<def>
; X64-NEXT: # kill: %edx<def> %edx<kill> %rdx<def>
; X64-NEXT: # kill: %esi<def> %esi<kill> %rsi<def>
@@ -152,7 +152,7 @@ define i32 @PR15215_good(<4 x i32> %inpu
; X64-NEXT: retq
;
; X64-SSE2-LABEL: PR15215_good:
-; X64-SSE2: # BB#0: # %entry
+; X64-SSE2: # %bb.0: # %entry
; X64-SSE2-NEXT: movd %xmm0, %eax
; X64-SSE2-NEXT: andl $1, %eax
; X64-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
@@ -170,7 +170,7 @@ define i32 @PR15215_good(<4 x i32> %inpu
; X64-SSE2-NEXT: retq
;
; X64-AVX2-LABEL: PR15215_good:
-; X64-AVX2: # BB#0: # %entry
+; X64-AVX2: # %bb.0: # %entry
; X64-AVX2-NEXT: vmovd %xmm0, %eax
; X64-AVX2-NEXT: andl $1, %eax
; X64-AVX2-NEXT: vpextrd $1, %xmm0, %ecx
Modified: llvm/trunk/test/CodeGen/X86/bool-zext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bool-zext.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bool-zext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bool-zext.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
; It's not necessary to zero-extend the arg because it is specified 'zeroext'.
define void @bar1(i1 zeroext %v1) nounwind ssp {
; X32-LABEL: bar1:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: pushl %eax
; X32-NEXT: calll foo1
@@ -13,7 +13,7 @@ define void @bar1(i1 zeroext %v1) nounwi
; X32-NEXT: retl
;
; X64-LABEL: bar1:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: jmp foo1 # TAILCALL
%conv = zext i1 %v1 to i32
@@ -24,7 +24,7 @@ define void @bar1(i1 zeroext %v1) nounwi
; Check that on x86-64 the arguments are simply forwarded.
define void @bar2(i8 zeroext %v1) nounwind ssp {
; X32-LABEL: bar2:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X32-NEXT: pushl %eax
; X32-NEXT: calll foo1
@@ -32,7 +32,7 @@ define void @bar2(i8 zeroext %v1) nounwi
; X32-NEXT: retl
;
; X64-LABEL: bar2:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: jmp foo1 # TAILCALL
%conv = zext i8 %v1 to i32
@@ -43,12 +43,12 @@ define void @bar2(i8 zeroext %v1) nounwi
; Check that i1 return values are not zero-extended.
define zeroext i1 @bar3() nounwind ssp {
; X32-LABEL: bar3:
-; X32: # BB#0:
+; X32: # %bb.0:
; X32-NEXT: calll foo2
; X32-NEXT: retl
;
; X64-LABEL: bar3:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo2
; X64-NEXT: popq %rcx
Modified: llvm/trunk/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll Mon Dec 4 09:18:51 2017
@@ -18,28 +18,28 @@
define <16 x i8> @f16xi8_i16(<16 x i8> %a) {
; AVX-LABEL: f16xi8_i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
; AVX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f16xi8_i16:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastw {{.*#+}} xmm1 = [256,256,256,256,256,256,256,256]
; ALL32-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f16xi8_i16:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
; AVX-64-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f16xi8_i16:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastw {{.*#+}} xmm1 = [256,256,256,256,256,256,256,256]
; ALL64-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -52,28 +52,28 @@ define <16 x i8> @f16xi8_i16(<16 x i8> %
define <16 x i8> @f16xi8_i32(<16 x i8> %a) {
; AVX-LABEL: f16xi8_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [3.82047143E-37,3.82047143E-37,3.82047143E-37,3.82047143E-37]
; AVX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f16xi8_i32:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [50462976,50462976,50462976,50462976]
; ALL32-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f16xi8_i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastss {{.*#+}} xmm1 = [3.82047143E-37,3.82047143E-37,3.82047143E-37,3.82047143E-37]
; AVX-64-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f16xi8_i32:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [50462976,50462976,50462976,50462976]
; ALL64-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -86,28 +86,28 @@ define <16 x i8> @f16xi8_i32(<16 x i8> %
define <16 x i8> @f16xi8_i64(<16 x i8> %a) {
; AVX-LABEL: f16xi8_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f16xi8_i64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; ALL32-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f16xi8_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-64-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f16xi8_i64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastq {{.*#+}} xmm1 = [506097522914230528,506097522914230528]
; ALL64-NEXT: vpaddb %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -120,7 +120,7 @@ define <16 x i8> @f16xi8_i64(<16 x i8> %
define <32 x i8> @f32xi8_i16(<32 x i8> %a) {
; AVX-LABEL: f32xi8_i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
; AVX-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -130,14 +130,14 @@ define <32 x i8> @f32xi8_i16(<32 x i8> %
; AVX-NEXT: retl
;
; ALL32-LABEL: f32xi8_i16:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastw {{.*#+}} ymm1 = [256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256]
; ALL32-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vpand %ymm1, %ymm0, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f32xi8_i16:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
; AVX-64-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -147,7 +147,7 @@ define <32 x i8> @f32xi8_i16(<32 x i8> %
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f32xi8_i16:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastw {{.*#+}} ymm1 = [256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256]
; ALL64-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; ALL64-NEXT: vpand %ymm1, %ymm0, %ymm0
@@ -160,7 +160,7 @@ define <32 x i8> @f32xi8_i16(<32 x i8> %
define <32 x i8> @f32xi8_i32(<32 x i8> %a) {
; AVX-LABEL: f32xi8_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [3.82047143E-37,3.82047143E-37,3.82047143E-37,3.82047143E-37]
; AVX-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -170,14 +170,14 @@ define <32 x i8> @f32xi8_i32(<32 x i8> %
; AVX-NEXT: retl
;
; ALL32-LABEL: f32xi8_i32:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976]
; ALL32-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vpand %ymm1, %ymm0, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f32xi8_i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vbroadcastss {{.*#+}} xmm2 = [3.82047143E-37,3.82047143E-37,3.82047143E-37,3.82047143E-37]
; AVX-64-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -187,7 +187,7 @@ define <32 x i8> @f32xi8_i32(<32 x i8> %
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f32xi8_i32:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastd {{.*#+}} ymm1 = [50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976]
; ALL64-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; ALL64-NEXT: vpand %ymm1, %ymm0, %ymm0
@@ -200,7 +200,7 @@ define <32 x i8> @f32xi8_i32(<32 x i8> %
define <32 x i8> @f32xi8_i64(<32 x i8> %a) {
; AVX-LABEL: f32xi8_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovddup {{.*#+}} xmm2 = mem[0,0]
; AVX-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -210,14 +210,14 @@ define <32 x i8> @f32xi8_i64(<32 x i8> %
; AVX-NEXT: retl
;
; ALL32-LABEL: f32xi8_i64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastq {{.*#+}} ymm1 = [7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275]
; ALL32-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vpand %ymm1, %ymm0, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f32xi8_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vmovddup {{.*#+}} xmm2 = mem[0,0]
; AVX-64-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -227,7 +227,7 @@ define <32 x i8> @f32xi8_i64(<32 x i8> %
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f32xi8_i64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastq {{.*#+}} ymm1 = [506097522914230528,506097522914230528,506097522914230528,506097522914230528]
; ALL64-NEXT: vpaddb %ymm1, %ymm0, %ymm0
; ALL64-NEXT: vpand %ymm1, %ymm0, %ymm0
@@ -240,7 +240,7 @@ define <32 x i8> @f32xi8_i64(<32 x i8> %
define <32 x i8> @f32xi8_i128(<32 x i8> %a) {
; AVX-LABEL: f32xi8_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -250,7 +250,7 @@ define <32 x i8> @f32xi8_i128(<32 x i8>
; AVX-NEXT: retl
;
; ALL32-LABEL: f32xi8_i128:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; ALL32-NEXT: # ymm1 = mem[0,1,0,1]
; ALL32-NEXT: vpaddb %ymm1, %ymm0, %ymm0
@@ -258,7 +258,7 @@ define <32 x i8> @f32xi8_i128(<32 x i8>
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f32xi8_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX-64-NEXT: vpaddb %xmm2, %xmm1, %xmm1
@@ -268,7 +268,7 @@ define <32 x i8> @f32xi8_i128(<32 x i8>
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f32xi8_i128:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; ALL64-NEXT: # ymm1 = mem[0,1,0,1]
; ALL64-NEXT: vpaddb %ymm1, %ymm0, %ymm0
@@ -282,7 +282,7 @@ define <32 x i8> @f32xi8_i128(<32 x i8>
define <64 x i8> @f64xi8_i16(<64 x i8> %a) {
; AVX-LABEL: f64xi8_i16:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
; AVX-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -298,7 +298,7 @@ define <64 x i8> @f64xi8_i16(<64 x i8> %
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f64xi8_i16:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vpbroadcastw {{.*#+}} ymm2 = [256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256]
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -307,14 +307,14 @@ define <64 x i8> @f64xi8_i16(<64 x i8> %
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f64xi8_i16:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastw {{.*#+}} zmm1 = [256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256]
; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f64xi8_i16:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
; AVX-64-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -330,7 +330,7 @@ define <64 x i8> @f64xi8_i16(<64 x i8> %
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f64xi8_i16:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vpbroadcastw {{.*#+}} ymm2 = [256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256]
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -339,7 +339,7 @@ define <64 x i8> @f64xi8_i16(<64 x i8> %
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f64xi8_i16:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vpbroadcastw {{.*#+}} zmm1 = [256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256,256]
; AVX512BW-64-NEXT: vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-64-NEXT: vpandq %zmm1, %zmm0, %zmm0
@@ -352,7 +352,7 @@ define <64 x i8> @f64xi8_i16(<64 x i8> %
define <64 x i8> @f64i8_i32(<64 x i8> %a) {
; AVX-LABEL: f64i8_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vbroadcastss {{.*#+}} xmm3 = [3.82047143E-37,3.82047143E-37,3.82047143E-37,3.82047143E-37]
; AVX-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -368,7 +368,7 @@ define <64 x i8> @f64i8_i32(<64 x i8> %a
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f64i8_i32:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm2 = [50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976]
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -377,14 +377,14 @@ define <64 x i8> @f64i8_i32(<64 x i8> %a
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f64i8_i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastd {{.*#+}} zmm1 = [50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976]
; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f64i8_i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vbroadcastss {{.*#+}} xmm3 = [3.82047143E-37,3.82047143E-37,3.82047143E-37,3.82047143E-37]
; AVX-64-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -400,7 +400,7 @@ define <64 x i8> @f64i8_i32(<64 x i8> %a
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f64i8_i32:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vpbroadcastd {{.*#+}} ymm2 = [50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976]
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -409,7 +409,7 @@ define <64 x i8> @f64i8_i32(<64 x i8> %a
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f64i8_i32:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vpbroadcastd {{.*#+}} zmm1 = [50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976,50462976]
; AVX512BW-64-NEXT: vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-64-NEXT: vpandq %zmm1, %zmm0, %zmm0
@@ -422,7 +422,7 @@ define <64 x i8> @f64i8_i32(<64 x i8> %a
define <64 x i8> @f64xi8_i64(<64 x i8> %a) {
; AVX-LABEL: f64xi8_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovddup {{.*#+}} xmm3 = mem[0,0]
; AVX-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -438,7 +438,7 @@ define <64 x i8> @f64xi8_i64(<64 x i8> %
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f64xi8_i64:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vpbroadcastq {{.*#+}} ymm2 = [7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275]
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -447,14 +447,14 @@ define <64 x i8> @f64xi8_i64(<64 x i8> %
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f64xi8_i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm1 = [7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275,7.9499288951273625E-275]
; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f64xi8_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovddup {{.*#+}} xmm3 = mem[0,0]
; AVX-64-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -470,7 +470,7 @@ define <64 x i8> @f64xi8_i64(<64 x i8> %
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f64xi8_i64:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vpbroadcastq {{.*#+}} ymm2 = [506097522914230528,506097522914230528,506097522914230528,506097522914230528]
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -479,7 +479,7 @@ define <64 x i8> @f64xi8_i64(<64 x i8> %
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f64xi8_i64:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vpbroadcastq {{.*#+}} zmm1 = [506097522914230528,506097522914230528,506097522914230528,506097522914230528,506097522914230528,506097522914230528,506097522914230528,506097522914230528]
; AVX512BW-64-NEXT: vpaddb %zmm1, %zmm0, %zmm0
; AVX512BW-64-NEXT: vpandq %zmm1, %zmm0, %zmm0
@@ -492,7 +492,7 @@ define <64 x i8> @f64xi8_i64(<64 x i8> %
define <64 x i8> @f64xi8_i128(<64 x i8> %a) {
; AVX-LABEL: f64xi8_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -508,7 +508,7 @@ define <64 x i8> @f64xi8_i128(<64 x i8>
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f64xi8_i128:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; NO-AVX512BW-NEXT: # ymm2 = mem[0,1,0,1]
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm1, %ymm1
@@ -518,7 +518,7 @@ define <64 x i8> @f64xi8_i128(<64 x i8>
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f64xi8_i128:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
@@ -526,7 +526,7 @@ define <64 x i8> @f64xi8_i128(<64 x i8>
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f64xi8_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX-64-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -542,7 +542,7 @@ define <64 x i8> @f64xi8_i128(<64 x i8>
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f64xi8_i128:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; NO-AVX512BW-64-NEXT: # ymm2 = mem[0,1,0,1]
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm1, %ymm1
@@ -552,7 +552,7 @@ define <64 x i8> @f64xi8_i128(<64 x i8>
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f64xi8_i128:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-64-NEXT: vpaddb %zmm1, %zmm0, %zmm0
@@ -566,7 +566,7 @@ define <64 x i8> @f64xi8_i128(<64 x i8>
define <64 x i8> @f64xi8_i256(<64 x i8> %a) {
; AVX-LABEL: f64xi8_i256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -583,7 +583,7 @@ define <64 x i8> @f64xi8_i256(<64 x i8>
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f64xi8_i256:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -592,7 +592,7 @@ define <64 x i8> @f64xi8_i256(<64 x i8>
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f64xi8_i256:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX512BW-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512BW-NEXT: vpaddb %zmm1, %zmm0, %zmm0
@@ -600,7 +600,7 @@ define <64 x i8> @f64xi8_i256(<64 x i8>
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f64xi8_i256:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm3 = [16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX-64-NEXT: vpaddb %xmm3, %xmm2, %xmm2
@@ -617,7 +617,7 @@ define <64 x i8> @f64xi8_i256(<64 x i8>
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f64xi8_i256:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm1, %ymm1
; NO-AVX512BW-64-NEXT: vpaddb %ymm2, %ymm0, %ymm0
@@ -626,7 +626,7 @@ define <64 x i8> @f64xi8_i256(<64 x i8>
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f64xi8_i256:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
; AVX512BW-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512BW-64-NEXT: vpaddb %zmm1, %zmm0, %zmm0
@@ -640,28 +640,28 @@ define <64 x i8> @f64xi8_i256(<64 x i8>
define <8 x i16> @f8xi16_i32(<8 x i16> %a) {
; AVX-LABEL: f8xi16_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [9.18354962E-41,9.18354962E-41,9.18354962E-41,9.18354962E-41]
; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f8xi16_i32:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65536,65536,65536,65536]
; ALL32-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f8xi16_i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastss {{.*#+}} xmm1 = [9.18354962E-41,9.18354962E-41,9.18354962E-41,9.18354962E-41]
; AVX-64-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f8xi16_i32:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [65536,65536,65536,65536]
; ALL64-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -674,28 +674,28 @@ define <8 x i16> @f8xi16_i32(<8 x i16> %
define <8 x i16> @f8xi16_i64(<8 x i16> %a) {
; AVX-LABEL: f8xi16_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f8xi16_i64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; ALL32-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f8xi16_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-64-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f8xi16_i64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastq {{.*#+}} xmm1 = [844433520132096,844433520132096]
; ALL64-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -708,7 +708,7 @@ define <8 x i16> @f8xi16_i64(<8 x i16> %
define <16 x i16> @f16xi16_i32(<16 x i16> %a) {
; AVX-LABEL: f16xi16_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vbroadcastss {{.*#+}} xmm2 = [9.18354962E-41,9.18354962E-41,9.18354962E-41,9.18354962E-41]
; AVX-NEXT: vpaddw %xmm2, %xmm1, %xmm1
@@ -718,14 +718,14 @@ define <16 x i16> @f16xi16_i32(<16 x i16
; AVX-NEXT: retl
;
; ALL32-LABEL: f16xi16_i32:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [65536,65536,65536,65536,65536,65536,65536,65536]
; ALL32-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vpand %ymm1, %ymm0, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f16xi16_i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vbroadcastss {{.*#+}} xmm2 = [9.18354962E-41,9.18354962E-41,9.18354962E-41,9.18354962E-41]
; AVX-64-NEXT: vpaddw %xmm2, %xmm1, %xmm1
@@ -735,7 +735,7 @@ define <16 x i16> @f16xi16_i32(<16 x i16
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f16xi16_i32:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastd {{.*#+}} ymm1 = [65536,65536,65536,65536,65536,65536,65536,65536]
; ALL64-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; ALL64-NEXT: vpand %ymm1, %ymm0, %ymm0
@@ -748,7 +748,7 @@ define <16 x i16> @f16xi16_i32(<16 x i16
define <16 x i16> @f16xi16_i64(<16 x i16> %a) {
; AVX-LABEL: f16xi16_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovddup {{.*#+}} xmm2 = mem[0,0]
; AVX-NEXT: vpaddw %xmm2, %xmm1, %xmm1
@@ -758,14 +758,14 @@ define <16 x i16> @f16xi16_i64(<16 x i16
; AVX-NEXT: retl
;
; ALL32-LABEL: f16xi16_i64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastq {{.*#+}} ymm1 = [4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309]
; ALL32-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vpand %ymm1, %ymm0, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f16xi16_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vmovddup {{.*#+}} xmm2 = mem[0,0]
; AVX-64-NEXT: vpaddw %xmm2, %xmm1, %xmm1
@@ -775,7 +775,7 @@ define <16 x i16> @f16xi16_i64(<16 x i16
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f16xi16_i64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastq {{.*#+}} ymm1 = [844433520132096,844433520132096,844433520132096,844433520132096]
; ALL64-NEXT: vpaddw %ymm1, %ymm0, %ymm0
; ALL64-NEXT: vpand %ymm1, %ymm0, %ymm0
@@ -788,7 +788,7 @@ define <16 x i16> @f16xi16_i64(<16 x i16
define <16 x i16> @f16xi16_i128(<16 x i16> %a) {
; AVX-LABEL: f16xi16_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7]
; AVX-NEXT: vpaddw %xmm2, %xmm1, %xmm1
@@ -798,7 +798,7 @@ define <16 x i16> @f16xi16_i128(<16 x i1
; AVX-NEXT: retl
;
; ALL32-LABEL: f16xi16_i128:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; ALL32-NEXT: # ymm1 = mem[0,1,0,1]
; ALL32-NEXT: vpaddw %ymm1, %ymm0, %ymm0
@@ -806,7 +806,7 @@ define <16 x i16> @f16xi16_i128(<16 x i1
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f16xi16_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7]
; AVX-64-NEXT: vpaddw %xmm2, %xmm1, %xmm1
@@ -816,7 +816,7 @@ define <16 x i16> @f16xi16_i128(<16 x i1
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f16xi16_i128:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; ALL64-NEXT: # ymm1 = mem[0,1,0,1]
; ALL64-NEXT: vpaddw %ymm1, %ymm0, %ymm0
@@ -830,7 +830,7 @@ define <16 x i16> @f16xi16_i128(<16 x i1
define <32 x i16> @f32xi16_i32(<32 x i16> %a) {
; AVX-LABEL: f32xi16_i32:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vbroadcastss {{.*#+}} xmm3 = [9.18354962E-41,9.18354962E-41,9.18354962E-41,9.18354962E-41]
; AVX-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -846,7 +846,7 @@ define <32 x i16> @f32xi16_i32(<32 x i16
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f32xi16_i32:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm2 = [65536,65536,65536,65536,65536,65536,65536,65536]
; NO-AVX512BW-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; NO-AVX512BW-NEXT: vpaddw %ymm2, %ymm0, %ymm0
@@ -855,14 +855,14 @@ define <32 x i16> @f32xi16_i32(<32 x i16
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f32xi16_i32:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastd {{.*#+}} zmm1 = [65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536]
; AVX512BW-NEXT: vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f32xi16_i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vbroadcastss {{.*#+}} xmm3 = [9.18354962E-41,9.18354962E-41,9.18354962E-41,9.18354962E-41]
; AVX-64-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -878,7 +878,7 @@ define <32 x i16> @f32xi16_i32(<32 x i16
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f32xi16_i32:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vpbroadcastd {{.*#+}} ymm2 = [65536,65536,65536,65536,65536,65536,65536,65536]
; NO-AVX512BW-64-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; NO-AVX512BW-64-NEXT: vpaddw %ymm2, %ymm0, %ymm0
@@ -887,7 +887,7 @@ define <32 x i16> @f32xi16_i32(<32 x i16
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f32xi16_i32:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vpbroadcastd {{.*#+}} zmm1 = [65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536,65536]
; AVX512BW-64-NEXT: vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-64-NEXT: vpandq %zmm1, %zmm0, %zmm0
@@ -900,7 +900,7 @@ define <32 x i16> @f32xi16_i32(<32 x i16
define <32 x i16> @f32xi16_i64(<32 x i16> %a) {
; AVX-LABEL: f32xi16_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovddup {{.*#+}} xmm3 = mem[0,0]
; AVX-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -916,7 +916,7 @@ define <32 x i16> @f32xi16_i64(<32 x i16
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f32xi16_i64:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309]
; NO-AVX512BW-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; NO-AVX512BW-NEXT: vpaddw %ymm2, %ymm0, %ymm0
@@ -925,14 +925,14 @@ define <32 x i16> @f32xi16_i64(<32 x i16
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f32xi16_i64:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vpbroadcastq {{.*#+}} zmm1 = [4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309,4.1720559249406128E-309]
; AVX512BW-NEXT: vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f32xi16_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovddup {{.*#+}} xmm3 = mem[0,0]
; AVX-64-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -948,7 +948,7 @@ define <32 x i16> @f32xi16_i64(<32 x i16
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f32xi16_i64:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vpbroadcastq {{.*#+}} ymm2 = [844433520132096,844433520132096,844433520132096,844433520132096]
; NO-AVX512BW-64-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; NO-AVX512BW-64-NEXT: vpaddw %ymm2, %ymm0, %ymm0
@@ -957,7 +957,7 @@ define <32 x i16> @f32xi16_i64(<32 x i16
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f32xi16_i64:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vpbroadcastq {{.*#+}} zmm1 = [844433520132096,844433520132096,844433520132096,844433520132096,844433520132096,844433520132096,844433520132096,844433520132096]
; AVX512BW-64-NEXT: vpaddw %zmm1, %zmm0, %zmm0
; AVX512BW-64-NEXT: vpandq %zmm1, %zmm0, %zmm0
@@ -970,7 +970,7 @@ define <32 x i16> @f32xi16_i64(<32 x i16
define <32 x i16> @f32xi16_i128(<32 x i16> %a) {
; AVX-LABEL: f32xi16_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7]
; AVX-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -986,7 +986,7 @@ define <32 x i16> @f32xi16_i128(<32 x i1
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f32xi16_i128:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; NO-AVX512BW-NEXT: # ymm2 = mem[0,1,0,1]
; NO-AVX512BW-NEXT: vpaddw %ymm2, %ymm1, %ymm1
@@ -996,7 +996,7 @@ define <32 x i16> @f32xi16_i128(<32 x i1
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f32xi16_i128:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX512BW-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-NEXT: vpaddw %zmm1, %zmm0, %zmm0
@@ -1004,7 +1004,7 @@ define <32 x i16> @f32xi16_i128(<32 x i1
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f32xi16_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7]
; AVX-64-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -1020,7 +1020,7 @@ define <32 x i16> @f32xi16_i128(<32 x i1
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f32xi16_i128:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; NO-AVX512BW-64-NEXT: # ymm2 = mem[0,1,0,1]
; NO-AVX512BW-64-NEXT: vpaddw %ymm2, %ymm1, %ymm1
@@ -1030,7 +1030,7 @@ define <32 x i16> @f32xi16_i128(<32 x i1
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f32xi16_i128:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7,0,1,2,3,4,5,6,7]
; AVX512BW-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512BW-64-NEXT: vpaddw %zmm1, %zmm0, %zmm0
@@ -1044,7 +1044,7 @@ define <32 x i16> @f32xi16_i128(<32 x i1
define <32 x i16> @f32xi16_i256(<32 x i16> %a) {
; AVX-LABEL: f32xi16_i256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [8,9,10,11,12,13,14,15]
; AVX-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -1061,7 +1061,7 @@ define <32 x i16> @f32xi16_i256(<32 x i1
; AVX-NEXT: retl
;
; NO-AVX512BW-LABEL: f32xi16_i256:
-; NO-AVX512BW: # BB#0:
+; NO-AVX512BW: # %bb.0:
; NO-AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; NO-AVX512BW-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; NO-AVX512BW-NEXT: vpaddw %ymm2, %ymm0, %ymm0
@@ -1070,7 +1070,7 @@ define <32 x i16> @f32xi16_i256(<32 x i1
; NO-AVX512BW-NEXT: retl
;
; AVX512BW-LABEL: f32xi16_i256:
-; AVX512BW: # BB#0:
+; AVX512BW: # %bb.0:
; AVX512BW-NEXT: vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512BW-NEXT: vpaddw %zmm1, %zmm0, %zmm0
@@ -1078,7 +1078,7 @@ define <32 x i16> @f32xi16_i256(<32 x i1
; AVX512BW-NEXT: retl
;
; AVX-64-LABEL: f32xi16_i256:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm3 = [8,9,10,11,12,13,14,15]
; AVX-64-NEXT: vpaddw %xmm3, %xmm2, %xmm2
@@ -1095,7 +1095,7 @@ define <32 x i16> @f32xi16_i256(<32 x i1
; AVX-64-NEXT: retq
;
; NO-AVX512BW-64-LABEL: f32xi16_i256:
-; NO-AVX512BW-64: # BB#0:
+; NO-AVX512BW-64: # %bb.0:
; NO-AVX512BW-64-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; NO-AVX512BW-64-NEXT: vpaddw %ymm2, %ymm1, %ymm1
; NO-AVX512BW-64-NEXT: vpaddw %ymm2, %ymm0, %ymm0
@@ -1104,7 +1104,7 @@ define <32 x i16> @f32xi16_i256(<32 x i1
; NO-AVX512BW-64-NEXT: retq
;
; AVX512BW-64-LABEL: f32xi16_i256:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
; AVX512BW-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512BW-64-NEXT: vpaddw %zmm1, %zmm0, %zmm0
@@ -1119,28 +1119,28 @@ define <32 x i16> @f32xi16_i256(<32 x i1
define <4 x i32> @f4xi32_i64(<4 x i32> %a) {
; AVX-LABEL: f4xi32_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f4xi32_i64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; ALL32-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f4xi32_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-64-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f4xi32_i64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastq {{.*#+}} xmm1 = [4294967296,4294967296]
; ALL64-NEXT: vpaddd %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vpand %xmm1, %xmm0, %xmm0
@@ -1153,7 +1153,7 @@ define <4 x i32> @f4xi32_i64(<4 x i32> %
define <8 x i32> @f8xi32_i64(<8 x i32> %a) {
; AVX-LABEL: f8xi32_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovddup {{.*#+}} xmm2 = mem[0,0]
; AVX-NEXT: vpaddd %xmm2, %xmm1, %xmm1
@@ -1163,14 +1163,14 @@ define <8 x i32> @f8xi32_i64(<8 x i32> %
; AVX-NEXT: retl
;
; ALL32-LABEL: f8xi32_i64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastq {{.*#+}} ymm1 = [2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314]
; ALL32-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vpand %ymm1, %ymm0, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f8xi32_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vmovddup {{.*#+}} xmm2 = mem[0,0]
; AVX-64-NEXT: vpaddd %xmm2, %xmm1, %xmm1
@@ -1180,7 +1180,7 @@ define <8 x i32> @f8xi32_i64(<8 x i32> %
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f8xi32_i64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastq {{.*#+}} ymm1 = [4294967296,4294967296,4294967296,4294967296]
; ALL64-NEXT: vpaddd %ymm1, %ymm0, %ymm0
; ALL64-NEXT: vpand %ymm1, %ymm0, %ymm0
@@ -1193,7 +1193,7 @@ define <8 x i32> @f8xi32_i64(<8 x i32> %
define <8 x i32> @f8xi32_i128(<8 x i32> %a) {
; AVX-LABEL: f8xi32_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3]
; AVX-NEXT: vpaddd %xmm2, %xmm1, %xmm1
@@ -1203,7 +1203,7 @@ define <8 x i32> @f8xi32_i128(<8 x i32>
; AVX-NEXT: retl
;
; ALL32-LABEL: f8xi32_i128:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3]
; ALL32-NEXT: # ymm1 = mem[0,1,0,1]
; ALL32-NEXT: vpaddd %ymm1, %ymm0, %ymm0
@@ -1211,7 +1211,7 @@ define <8 x i32> @f8xi32_i128(<8 x i32>
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f8xi32_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,3]
; AVX-64-NEXT: vpaddd %xmm2, %xmm1, %xmm1
@@ -1221,7 +1221,7 @@ define <8 x i32> @f8xi32_i128(<8 x i32>
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f8xi32_i128:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,1,2,3,0,1,2,3]
; ALL64-NEXT: # ymm1 = mem[0,1,0,1]
; ALL64-NEXT: vpaddd %ymm1, %ymm0, %ymm0
@@ -1235,7 +1235,7 @@ define <8 x i32> @f8xi32_i128(<8 x i32>
define <16 x i32> @f16xi32_i64(<16 x i32> %a) {
; AVX-LABEL: f16xi32_i64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovddup {{.*#+}} xmm3 = mem[0,0]
; AVX-NEXT: vpaddd %xmm3, %xmm2, %xmm2
@@ -1251,7 +1251,7 @@ define <16 x i32> @f16xi32_i64(<16 x i32
; AVX-NEXT: retl
;
; AVX2-LABEL: f16xi32_i64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314]
; AVX2-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0
@@ -1260,14 +1260,14 @@ define <16 x i32> @f16xi32_i64(<16 x i32
; AVX2-NEXT: retl
;
; AVX512-LABEL: f16xi32_i64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vpbroadcastq {{.*#+}} zmm1 = [2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314,2.1219957909652723E-314]
; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0
; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f16xi32_i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovddup {{.*#+}} xmm3 = mem[0,0]
; AVX-64-NEXT: vpaddd %xmm3, %xmm2, %xmm2
@@ -1283,7 +1283,7 @@ define <16 x i32> @f16xi32_i64(<16 x i32
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f16xi32_i64:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vpbroadcastq {{.*#+}} ymm2 = [4294967296,4294967296,4294967296,4294967296]
; AVX2-64-NEXT: vpaddd %ymm2, %ymm1, %ymm1
; AVX2-64-NEXT: vpaddd %ymm2, %ymm0, %ymm0
@@ -1292,7 +1292,7 @@ define <16 x i32> @f16xi32_i64(<16 x i32
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f16xi32_i64:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vpbroadcastq {{.*#+}} zmm1 = [4294967296,4294967296,4294967296,4294967296,4294967296,4294967296,4294967296,4294967296]
; AVX512F-64-NEXT: vpaddd %zmm1, %zmm0, %zmm0
; AVX512F-64-NEXT: vpandq %zmm1, %zmm0, %zmm0
@@ -1305,7 +1305,7 @@ define <16 x i32> @f16xi32_i64(<16 x i32
define <16 x i32> @f16xi32_i128(<16 x i32> %a) {
; AVX-LABEL: f16xi32_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3]
; AVX-NEXT: vpaddd %xmm3, %xmm2, %xmm2
@@ -1321,7 +1321,7 @@ define <16 x i32> @f16xi32_i128(<16 x i3
; AVX-NEXT: retl
;
; AVX2-LABEL: f16xi32_i128:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3]
; AVX2-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-NEXT: vpaddd %ymm2, %ymm1, %ymm1
@@ -1331,7 +1331,7 @@ define <16 x i32> @f16xi32_i128(<16 x i3
; AVX2-NEXT: retl
;
; AVX512-LABEL: f16xi32_i128:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0
@@ -1339,7 +1339,7 @@ define <16 x i32> @f16xi32_i128(<16 x i3
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f16xi32_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3]
; AVX-64-NEXT: vpaddd %xmm3, %xmm2, %xmm2
@@ -1355,7 +1355,7 @@ define <16 x i32> @f16xi32_i128(<16 x i3
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f16xi32_i128:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,1,2,3,0,1,2,3]
; AVX2-64-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-64-NEXT: vpaddd %ymm2, %ymm1, %ymm1
@@ -1365,7 +1365,7 @@ define <16 x i32> @f16xi32_i128(<16 x i3
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f16xi32_i128:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: vpaddd %zmm1, %zmm0, %zmm0
@@ -1379,7 +1379,7 @@ define <16 x i32> @f16xi32_i128(<16 x i3
define <4 x i64> @f4xi64_i128(<4 x i64> %a) {
; AVX-LABEL: f4xi64_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} ymm1 = [0,0,1,0,0,0,1,0]
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-NEXT: vextractf128 $1, %ymm0, %xmm3
@@ -1390,14 +1390,14 @@ define <4 x i64> @f4xi64_i128(<4 x i64>
; AVX-NEXT: retl
;
; ALL32-LABEL: f4xi64_i128:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vmovdqa {{.*#+}} ymm1 = [0,0,1,0,0,0,1,0]
; ALL32-NEXT: vpaddq %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vpand %ymm1, %ymm0, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f4xi64_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm0, %xmm1
; AVX-64-NEXT: movl $1, %eax
; AVX-64-NEXT: vmovq %rax, %xmm2
@@ -1409,7 +1409,7 @@ define <4 x i64> @f4xi64_i128(<4 x i64>
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f4xi64_i128:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,1,0,1]
; ALL64-NEXT: # ymm1 = mem[0,1,0,1]
; ALL64-NEXT: vpaddq %ymm1, %ymm0, %ymm0
@@ -1423,7 +1423,7 @@ define <4 x i64> @f4xi64_i128(<4 x i64>
define <8 x i64> @f8xi64_i128(<8 x i64> %a) {
; AVX-LABEL: f8xi64_i128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} ymm2 = [0,0,1,0,0,0,1,0]
; AVX-NEXT: vextractf128 $1, %ymm2, %xmm3
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm4
@@ -1439,7 +1439,7 @@ define <8 x i64> @f8xi64_i128(<8 x i64>
; AVX-NEXT: retl
;
; AVX2-LABEL: f8xi64_i128:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,0,1,0,0,0,1,0]
; AVX2-NEXT: vpaddq %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0
@@ -1448,14 +1448,14 @@ define <8 x i64> @f8xi64_i128(<8 x i64>
; AVX2-NEXT: retl
;
; AVX512-LABEL: f8xi64_i128:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm1 = [0,0,1,0,0,0,1,0,0,0,1,0,0,0,1,0]
; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0
; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f8xi64_i128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: movl $1, %eax
; AVX-64-NEXT: vmovq %rax, %xmm3
@@ -1474,7 +1474,7 @@ define <8 x i64> @f8xi64_i128(<8 x i64>
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f8xi64_i128:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [0,1,0,1]
; AVX2-64-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-64-NEXT: vpaddq %ymm2, %ymm1, %ymm1
@@ -1484,7 +1484,7 @@ define <8 x i64> @f8xi64_i128(<8 x i64>
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f8xi64_i128:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [0,1,0,1,0,1,0,1]
; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: vpaddq %zmm1, %zmm0, %zmm0
@@ -1498,7 +1498,7 @@ define <8 x i64> @f8xi64_i128(<8 x i64>
define <8 x i64> @f8xi64_i256(<8 x i64> %a) {
; AVX-LABEL: f8xi64_i256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovdqa {{.*#+}} ymm2 = [0,0,1,0,2,0,3,0]
; AVX-NEXT: vextractf128 $1, %ymm2, %xmm3
; AVX-NEXT: vextractf128 $1, %ymm1, %xmm4
@@ -1514,7 +1514,7 @@ define <8 x i64> @f8xi64_i256(<8 x i64>
; AVX-NEXT: retl
;
; AVX2-LABEL: f8xi64_i256:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,0,1,0,2,0,3,0]
; AVX2-NEXT: vpaddq %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0
@@ -1523,14 +1523,14 @@ define <8 x i64> @f8xi64_i256(<8 x i64>
; AVX2-NEXT: retl
;
; AVX512-LABEL: f8xi64_i256:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vmovdqa64 {{.*#+}} zmm1 = [0,0,1,0,2,0,3,0,0,0,1,0,2,0,3,0]
; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0
; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm0
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f8xi64_i256:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vextractf128 $1, %ymm1, %xmm2
; AVX-64-NEXT: vmovdqa {{.*#+}} xmm3 = [2,3]
; AVX-64-NEXT: vpaddq %xmm3, %xmm2, %xmm2
@@ -1549,7 +1549,7 @@ define <8 x i64> @f8xi64_i256(<8 x i64>
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f8xi64_i256:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3]
; AVX2-64-NEXT: vpaddq %ymm2, %ymm1, %ymm1
; AVX2-64-NEXT: vpaddq %ymm2, %ymm0, %ymm0
@@ -1558,7 +1558,7 @@ define <8 x i64> @f8xi64_i256(<8 x i64>
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f8xi64_i256:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcasti64x4 {{.*#+}} zmm1 = [0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: vpaddq %zmm1, %zmm0, %zmm0
@@ -1572,28 +1572,28 @@ define <8 x i64> @f8xi64_i256(<8 x i64>
define <4 x float> @f4xf32_f64(<4 x float> %a) {
; AVX-LABEL: f4xf32_f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vdivps %xmm0, %xmm1, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f4xf32_f64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; ALL32-NEXT: vaddps %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vdivps %xmm0, %xmm1, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f4xf32_f64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovddup {{.*#+}} xmm1 = mem[0,0]
; AVX-64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vdivps %xmm0, %xmm1, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f4xf32_f64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastq {{.*#+}} xmm1 = [4575657222482165760,4575657222482165760]
; ALL64-NEXT: vaddps %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vdivps %xmm0, %xmm1, %xmm0
@@ -1606,28 +1606,28 @@ define <4 x float> @f4xf32_f64(<4 x floa
define <8 x float> @f8xf32_f64(<8 x float> %a) {
; AVX-LABEL: f8xf32_f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastsd {{.*#+}} ymm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492]
; AVX-NEXT: vaddps %ymm1, %ymm0, %ymm0
; AVX-NEXT: vdivps %ymm0, %ymm1, %ymm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f8xf32_f64:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vbroadcastsd {{.*#+}} ymm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492]
; ALL32-NEXT: vaddps %ymm1, %ymm0, %ymm0
; ALL32-NEXT: vdivps %ymm0, %ymm1, %ymm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f8xf32_f64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastsd {{.*#+}} ymm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492]
; AVX-64-NEXT: vaddps %ymm1, %ymm0, %ymm0
; AVX-64-NEXT: vdivps %ymm0, %ymm1, %ymm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f8xf32_f64:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vbroadcastsd {{.*#+}} ymm1 = [4575657222482165760,4575657222482165760,4575657222482165760,4575657222482165760]
; ALL64-NEXT: vaddps %ymm1, %ymm0, %ymm0
; ALL64-NEXT: vdivps %ymm0, %ymm1, %ymm0
@@ -1640,7 +1640,7 @@ define <8 x float> @f8xf32_f64(<8 x floa
define <8 x float> @f8xf32_f128(<8 x float> %a) {
; AVX-LABEL: f8xf32_f128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX-NEXT: # ymm1 = mem[0,1,0,1]
; AVX-NEXT: vaddps %ymm1, %ymm0, %ymm0
@@ -1648,7 +1648,7 @@ define <8 x float> @f8xf32_f128(<8 x flo
; AVX-NEXT: retl
;
; ALL32-LABEL: f8xf32_f128:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; ALL32-NEXT: # ymm1 = mem[0,1,0,1]
; ALL32-NEXT: vaddps %ymm1, %ymm0, %ymm0
@@ -1656,7 +1656,7 @@ define <8 x float> @f8xf32_f128(<8 x flo
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f8xf32_f128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX-64-NEXT: # ymm1 = mem[0,1,0,1]
; AVX-64-NEXT: vaddps %ymm1, %ymm0, %ymm0
@@ -1664,7 +1664,7 @@ define <8 x float> @f8xf32_f128(<8 x flo
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f8xf32_f128:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; ALL64-NEXT: # ymm1 = mem[0,1,0,1]
; ALL64-NEXT: vaddps %ymm1, %ymm0, %ymm0
@@ -1678,7 +1678,7 @@ define <8 x float> @f8xf32_f128(<8 x flo
define <16 x float> @f16xf32_f64(<16 x float> %a) {
; AVX-LABEL: f16xf32_f64:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492]
; AVX-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1687,7 +1687,7 @@ define <16 x float> @f16xf32_f64(<16 x f
; AVX-NEXT: retl
;
; AVX2-LABEL: f16xf32_f64:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492]
; AVX2-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1696,14 +1696,14 @@ define <16 x float> @f16xf32_f64(<16 x f
; AVX2-NEXT: retl
;
; AVX512-LABEL: f16xf32_f64:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm1 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492]
; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0
; AVX512-NEXT: vdivps %zmm0, %zmm1, %zmm0
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f16xf32_f64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastsd {{.*#+}} ymm2 = [0.0078125018626451492,0.0078125018626451492,0.0078125018626451492,0.0078125018626451492]
; AVX-64-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX-64-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1712,7 +1712,7 @@ define <16 x float> @f16xf32_f64(<16 x f
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f16xf32_f64:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vbroadcastsd {{.*#+}} ymm2 = [4575657222482165760,4575657222482165760,4575657222482165760,4575657222482165760]
; AVX2-64-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX2-64-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1721,7 +1721,7 @@ define <16 x float> @f16xf32_f64(<16 x f
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f16xf32_f64:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcastsd {{.*#+}} zmm1 = [4575657222482165760,4575657222482165760,4575657222482165760,4575657222482165760,4575657222482165760,4575657222482165760,4575657222482165760,4575657222482165760]
; AVX512F-64-NEXT: vaddps %zmm1, %zmm0, %zmm0
; AVX512F-64-NEXT: vdivps %zmm0, %zmm1, %zmm0
@@ -1734,7 +1734,7 @@ define <16 x float> @f16xf32_f64(<16 x f
define <16 x float> @f16xf32_f128(<16 x float> %a) {
; AVX-LABEL: f16xf32_f128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX-NEXT: # ymm2 = mem[0,1,0,1]
; AVX-NEXT: vaddps %ymm2, %ymm1, %ymm1
@@ -1744,7 +1744,7 @@ define <16 x float> @f16xf32_f128(<16 x
; AVX-NEXT: retl
;
; AVX2-LABEL: f16xf32_f128:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX2-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-NEXT: vaddps %ymm2, %ymm1, %ymm1
@@ -1754,7 +1754,7 @@ define <16 x float> @f16xf32_f128(<16 x
; AVX2-NEXT: retl
;
; AVX512-LABEL: f16xf32_f128:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0
@@ -1762,7 +1762,7 @@ define <16 x float> @f16xf32_f128(<16 x
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f16xf32_f128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX-64-NEXT: # ymm2 = mem[0,1,0,1]
; AVX-64-NEXT: vaddps %ymm2, %ymm1, %ymm1
@@ -1772,7 +1772,7 @@ define <16 x float> @f16xf32_f128(<16 x
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f16xf32_f128:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX2-64-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-64-NEXT: vaddps %ymm2, %ymm1, %ymm1
@@ -1782,7 +1782,7 @@ define <16 x float> @f16xf32_f128(<16 x
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f16xf32_f128:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: vaddps %zmm1, %zmm0, %zmm0
@@ -1796,7 +1796,7 @@ define <16 x float> @f16xf32_f128(<16 x
define <16 x float> @f16xf32_f256(<16 x float> %a) {
; AVX-LABEL: f16xf32_f256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovaps {{.*#+}} ymm2 = [8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00]
; AVX-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1805,7 +1805,7 @@ define <16 x float> @f16xf32_f256(<16 x
; AVX-NEXT: retl
;
; AVX2-LABEL: f16xf32_f256:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovaps {{.*#+}} ymm2 = [8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00]
; AVX2-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1814,7 +1814,7 @@ define <16 x float> @f16xf32_f256(<16 x
; AVX2-NEXT: retl
;
; AVX512-LABEL: f16xf32_f256:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00,8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00]
; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512-NEXT: vaddps %zmm1, %zmm0, %zmm0
@@ -1822,7 +1822,7 @@ define <16 x float> @f16xf32_f256(<16 x
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f16xf32_f256:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovaps {{.*#+}} ymm2 = [8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00]
; AVX-64-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX-64-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1831,7 +1831,7 @@ define <16 x float> @f16xf32_f256(<16 x
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f16xf32_f256:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovaps {{.*#+}} ymm2 = [8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00]
; AVX2-64-NEXT: vaddps %ymm2, %ymm1, %ymm1
; AVX2-64-NEXT: vaddps %ymm2, %ymm0, %ymm0
@@ -1840,7 +1840,7 @@ define <16 x float> @f16xf32_f256(<16 x
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f16xf32_f256:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00,8.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,5.000000e+00,6.000000e+00,7.000000e+00]
; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: vaddps %zmm1, %zmm0, %zmm0
@@ -1854,7 +1854,7 @@ define <16 x float> @f16xf32_f256(<16 x
define <4 x double> @f4xf64_f128(<4 x double> %a) {
; AVX-LABEL: f4xf64_f128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX-NEXT: # ymm1 = mem[0,1,0,1]
; AVX-NEXT: vaddpd %ymm1, %ymm0, %ymm0
@@ -1862,7 +1862,7 @@ define <4 x double> @f4xf64_f128(<4 x do
; AVX-NEXT: retl
;
; ALL32-LABEL: f4xf64_f128:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; ALL32-NEXT: # ymm1 = mem[0,1,0,1]
; ALL32-NEXT: vaddpd %ymm1, %ymm0, %ymm0
@@ -1870,7 +1870,7 @@ define <4 x double> @f4xf64_f128(<4 x do
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f4xf64_f128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX-64-NEXT: # ymm1 = mem[0,1,0,1]
; AVX-64-NEXT: vaddpd %ymm1, %ymm0, %ymm0
@@ -1878,7 +1878,7 @@ define <4 x double> @f4xf64_f128(<4 x do
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f4xf64_f128:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vbroadcastf128 {{.*#+}} ymm1 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; ALL64-NEXT: # ymm1 = mem[0,1,0,1]
; ALL64-NEXT: vaddpd %ymm1, %ymm0, %ymm0
@@ -1892,7 +1892,7 @@ define <4 x double> @f4xf64_f128(<4 x do
define <8 x double> @f8xf64_f128(<8 x double> %a) {
; AVX-LABEL: f8xf64_f128:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX-NEXT: # ymm2 = mem[0,1,0,1]
; AVX-NEXT: vaddpd %ymm2, %ymm1, %ymm1
@@ -1902,7 +1902,7 @@ define <8 x double> @f8xf64_f128(<8 x do
; AVX-NEXT: retl
;
; AVX2-LABEL: f8xf64_f128:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX2-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-NEXT: vaddpd %ymm2, %ymm1, %ymm1
@@ -1912,7 +1912,7 @@ define <8 x double> @f8xf64_f128(<8 x do
; AVX2-NEXT: retl
;
; AVX512-LABEL: f8xf64_f128:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm0
@@ -1920,7 +1920,7 @@ define <8 x double> @f8xf64_f128(<8 x do
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f8xf64_f128:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX-64-NEXT: # ymm2 = mem[0,1,0,1]
; AVX-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1
@@ -1930,7 +1930,7 @@ define <8 x double> @f8xf64_f128(<8 x do
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f8xf64_f128:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vbroadcastf128 {{.*#+}} ymm2 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX2-64-NEXT: # ymm2 = mem[0,1,0,1]
; AVX2-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1
@@ -1940,7 +1940,7 @@ define <8 x double> @f8xf64_f128(<8 x do
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f8xf64_f128:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcastf32x4 {{.*#+}} zmm1 = [2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00,2.000000e+00,1.000000e+00]
; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: vaddpd %zmm1, %zmm0, %zmm0
@@ -1961,7 +1961,7 @@ define <8 x double> @f8xf64_f128(<8 x do
define <8 x double> @f8xf64_f256(<8 x double> %a) {
; AVX-LABEL: f8xf64_f256:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vmovapd {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX-NEXT: vaddpd %ymm2, %ymm1, %ymm1
; AVX-NEXT: vaddpd %ymm2, %ymm0, %ymm0
@@ -1970,7 +1970,7 @@ define <8 x double> @f8xf64_f256(<8 x do
; AVX-NEXT: retl
;
; AVX2-LABEL: f8xf64_f256:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vmovapd {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX2-NEXT: vaddpd %ymm2, %ymm1, %ymm1
; AVX2-NEXT: vaddpd %ymm2, %ymm0, %ymm0
@@ -1979,7 +1979,7 @@ define <8 x double> @f8xf64_f256(<8 x do
; AVX2-NEXT: retl
;
; AVX512-LABEL: f8xf64_f256:
-; AVX512: # BB#0:
+; AVX512: # %bb.0:
; AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX512-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512-NEXT: vaddpd %zmm1, %zmm0, %zmm0
@@ -1987,7 +1987,7 @@ define <8 x double> @f8xf64_f256(<8 x do
; AVX512-NEXT: retl
;
; AVX-64-LABEL: f8xf64_f256:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovapd {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1
; AVX-64-NEXT: vaddpd %ymm2, %ymm0, %ymm0
@@ -1996,7 +1996,7 @@ define <8 x double> @f8xf64_f256(<8 x do
; AVX-64-NEXT: retq
;
; AVX2-64-LABEL: f8xf64_f256:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovapd {{.*#+}} ymm2 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX2-64-NEXT: vaddpd %ymm2, %ymm1, %ymm1
; AVX2-64-NEXT: vaddpd %ymm2, %ymm0, %ymm0
@@ -2005,7 +2005,7 @@ define <8 x double> @f8xf64_f256(<8 x do
; AVX2-64-NEXT: retq
;
; AVX512F-64-LABEL: f8xf64_f256:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vbroadcastf64x4 {{.*#+}} zmm1 = [4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00,1.000000e+00,2.000000e+00,3.000000e+00]
; AVX512F-64-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3]
; AVX512F-64-NEXT: vaddpd %zmm1, %zmm0, %zmm0
@@ -2020,28 +2020,28 @@ define <8 x double> @f8xf64_f256(<8 x do
define <8 x i16> @f8xi16_i32_NaN(<8 x i16> %a) {
; AVX-LABEL: f8xi16_i32_NaN:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
; AVX-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-NEXT: retl
;
; ALL32-LABEL: f8xi16_i32_NaN:
-; ALL32: # BB#0:
+; ALL32: # %bb.0:
; ALL32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4290379776,4290379776,4290379776,4290379776]
; ALL32-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; ALL32-NEXT: vpand %xmm1, %xmm0, %xmm0
; ALL32-NEXT: retl
;
; AVX-64-LABEL: f8xi16_i32_NaN:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vbroadcastss {{.*#+}} xmm1 = [NaN,NaN,NaN,NaN]
; AVX-64-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: vpand %xmm1, %xmm0, %xmm0
; AVX-64-NEXT: retq
;
; ALL64-LABEL: f8xi16_i32_NaN:
-; ALL64: # BB#0:
+; ALL64: # %bb.0:
; ALL64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4290379776,4290379776,4290379776,4290379776]
; ALL64-NEXT: vpaddw %xmm1, %xmm0, %xmm0
; ALL64-NEXT: vpand %xmm1, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/broadcastm-lowering.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/broadcastm-lowering.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/broadcastm-lowering.ll (original)
+++ llvm/trunk/test/CodeGen/X86/broadcastm-lowering.ll Mon Dec 4 09:18:51 2017
@@ -5,7 +5,7 @@
define <2 x i64> @test_mm_epi64(<8 x i16> %a, <8 x i16> %b) {
; AVX512CD-LABEL: test_mm_epi64:
-; AVX512CD: # BB#0: # %entry
+; AVX512CD: # %bb.0: # %entry
; AVX512CD-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX512CD-NEXT: vpmovsxwq %xmm0, %zmm0
; AVX512CD-NEXT: vpsllq $63, %zmm0, %zmm0
@@ -18,13 +18,13 @@ define <2 x i64> @test_mm_epi64(<8 x i16
; AVX512CD-NEXT: retq
;
; AVX512VLCDBW-LABEL: test_mm_epi64:
-; AVX512VLCDBW: # BB#0: # %entry
+; AVX512VLCDBW: # %bb.0: # %entry
; AVX512VLCDBW-NEXT: vpcmpeqw %xmm1, %xmm0, %k0
; AVX512VLCDBW-NEXT: vpbroadcastmb2q %k0, %xmm0
; AVX512VLCDBW-NEXT: retq
;
; X86-AVX512VLCDBW-LABEL: test_mm_epi64:
-; X86-AVX512VLCDBW: # BB#0: # %entry
+; X86-AVX512VLCDBW: # %bb.0: # %entry
; X86-AVX512VLCDBW-NEXT: vpcmpeqw %xmm1, %xmm0, %k0
; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
; X86-AVX512VLCDBW-NEXT: movzbl %al, %eax
@@ -42,7 +42,7 @@ entry:
define <4 x i32> @test_mm_epi32(<16 x i8> %a, <16 x i8> %b) {
; AVX512CD-LABEL: test_mm_epi32:
-; AVX512CD: # BB#0: # %entry
+; AVX512CD: # %bb.0: # %entry
; AVX512CD-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
; AVX512CD-NEXT: vpmovsxbd %xmm0, %zmm0
; AVX512CD-NEXT: vpslld $31, %zmm0, %zmm0
@@ -57,13 +57,13 @@ define <4 x i32> @test_mm_epi32(<16 x i8
; AVX512CD-NEXT: retq
;
; AVX512VLCDBW-LABEL: test_mm_epi32:
-; AVX512VLCDBW: # BB#0: # %entry
+; AVX512VLCDBW: # %bb.0: # %entry
; AVX512VLCDBW-NEXT: vpcmpeqb %xmm1, %xmm0, %k0
; AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %xmm0
; AVX512VLCDBW-NEXT: retq
;
; X86-AVX512VLCDBW-LABEL: test_mm_epi32:
-; X86-AVX512VLCDBW: # BB#0: # %entry
+; X86-AVX512VLCDBW: # %bb.0: # %entry
; X86-AVX512VLCDBW-NEXT: vpcmpeqb %xmm1, %xmm0, %k0
; X86-AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %xmm0
; X86-AVX512VLCDBW-NEXT: retl
@@ -78,19 +78,19 @@ entry:
define <16 x i32> @test_mm512_epi32(<16 x i32> %a, <16 x i32> %b) {
; AVX512CD-LABEL: test_mm512_epi32:
-; AVX512CD: # BB#0: # %entry
+; AVX512CD: # %bb.0: # %entry
; AVX512CD-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
; AVX512CD-NEXT: vpbroadcastmw2d %k0, %zmm0
; AVX512CD-NEXT: retq
;
; AVX512VLCDBW-LABEL: test_mm512_epi32:
-; AVX512VLCDBW: # BB#0: # %entry
+; AVX512VLCDBW: # %bb.0: # %entry
; AVX512VLCDBW-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
; AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %zmm0
; AVX512VLCDBW-NEXT: retq
;
; X86-AVX512VLCDBW-LABEL: test_mm512_epi32:
-; X86-AVX512VLCDBW: # BB#0: # %entry
+; X86-AVX512VLCDBW: # %bb.0: # %entry
; X86-AVX512VLCDBW-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
; X86-AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %zmm0
; X86-AVX512VLCDBW-NEXT: retl
@@ -105,7 +105,7 @@ entry:
define <8 x i64> @test_mm512_epi64(<8 x i32> %a, <8 x i32> %b) {
; AVX512CD-LABEL: test_mm512_epi64:
-; AVX512CD: # BB#0: # %entry
+; AVX512CD: # %bb.0: # %entry
; AVX512CD-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512CD-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
@@ -113,13 +113,13 @@ define <8 x i64> @test_mm512_epi64(<8 x
; AVX512CD-NEXT: retq
;
; AVX512VLCDBW-LABEL: test_mm512_epi64:
-; AVX512VLCDBW: # BB#0: # %entry
+; AVX512VLCDBW: # %bb.0: # %entry
; AVX512VLCDBW-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
; AVX512VLCDBW-NEXT: vpbroadcastmb2q %k0, %zmm0
; AVX512VLCDBW-NEXT: retq
;
; X86-AVX512VLCDBW-LABEL: test_mm512_epi64:
-; X86-AVX512VLCDBW: # BB#0: # %entry
+; X86-AVX512VLCDBW: # %bb.0: # %entry
; X86-AVX512VLCDBW-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
; X86-AVX512VLCDBW-NEXT: movzbl %al, %eax
@@ -139,7 +139,7 @@ entry:
define <4 x i64> @test_mm256_epi64(<8 x i32> %a, <8 x i32> %b) {
; AVX512CD-LABEL: test_mm256_epi64:
-; AVX512CD: # BB#0: # %entry
+; AVX512CD: # %bb.0: # %entry
; AVX512CD-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def>
; AVX512CD-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def>
; AVX512CD-NEXT: vpcmpeqd %zmm1, %zmm0, %k0
@@ -151,13 +151,13 @@ define <4 x i64> @test_mm256_epi64(<8 x
; AVX512CD-NEXT: retq
;
; AVX512VLCDBW-LABEL: test_mm256_epi64:
-; AVX512VLCDBW: # BB#0: # %entry
+; AVX512VLCDBW: # %bb.0: # %entry
; AVX512VLCDBW-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
; AVX512VLCDBW-NEXT: vpbroadcastmb2q %k0, %ymm0
; AVX512VLCDBW-NEXT: retq
;
; X86-AVX512VLCDBW-LABEL: test_mm256_epi64:
-; X86-AVX512VLCDBW: # BB#0: # %entry
+; X86-AVX512VLCDBW: # %bb.0: # %entry
; X86-AVX512VLCDBW-NEXT: vpcmpeqd %ymm1, %ymm0, %k0
; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
; X86-AVX512VLCDBW-NEXT: movzbl %al, %eax
@@ -176,7 +176,7 @@ entry:
define <8 x i32> @test_mm256_epi32(<16 x i16> %a, <16 x i16> %b) {
; AVX512CD-LABEL: test_mm256_epi32:
-; AVX512CD: # BB#0: # %entry
+; AVX512CD: # %bb.0: # %entry
; AVX512CD-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0
; AVX512CD-NEXT: vpmovsxwd %ymm0, %zmm0
; AVX512CD-NEXT: vpslld $31, %zmm0, %zmm0
@@ -191,13 +191,13 @@ define <8 x i32> @test_mm256_epi32(<16 x
; AVX512CD-NEXT: retq
;
; AVX512VLCDBW-LABEL: test_mm256_epi32:
-; AVX512VLCDBW: # BB#0: # %entry
+; AVX512VLCDBW: # %bb.0: # %entry
; AVX512VLCDBW-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
; AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %ymm0
; AVX512VLCDBW-NEXT: retq
;
; X86-AVX512VLCDBW-LABEL: test_mm256_epi32:
-; X86-AVX512VLCDBW: # BB#0: # %entry
+; X86-AVX512VLCDBW: # %bb.0: # %entry
; X86-AVX512VLCDBW-NEXT: vpcmpeqw %ymm1, %ymm0, %k0
; X86-AVX512VLCDBW-NEXT: vpbroadcastmw2d %k0, %ymm0
; X86-AVX512VLCDBW-NEXT: retl
Modified: llvm/trunk/test/CodeGen/X86/bswap-rotate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap-rotate.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bswap-rotate.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bswap-rotate.ll Mon Dec 4 09:18:51 2017
@@ -7,13 +7,13 @@
define i16 @combine_bswap_rotate(i16 %a0) {
; X86-LABEL: combine_bswap_rotate:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: rolw $9, %ax
; X86-NEXT: retl
;
; X64-LABEL: combine_bswap_rotate:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: rolw $9, %di
; X64-NEXT: movl %edi, %eax
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/bswap-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap-vector.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bswap-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bswap-vector.ll Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@ declare <2 x i64> @llvm.bswap.v2i64(<2 x
define <8 x i16> @test1(<8 x i16> %v) {
; CHECK-NOSSSE3-LABEL: test1:
-; CHECK-NOSSSE3: # BB#0: # %entry
+; CHECK-NOSSSE3: # %bb.0: # %entry
; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1
; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2
; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
@@ -23,17 +23,17 @@ define <8 x i16> @test1(<8 x i16> %v) {
; CHECK-NOSSSE3-NEXT: retq
;
; CHECK-SSSE3-LABEL: test1:
-; CHECK-SSSE3: # BB#0: # %entry
+; CHECK-SSSE3: # %bb.0: # %entry
; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
; CHECK-SSSE3-NEXT: retq
;
; CHECK-AVX-LABEL: test1:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: test1:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -43,7 +43,7 @@ entry:
define <4 x i32> @test2(<4 x i32> %v) {
; CHECK-NOSSSE3-LABEL: test2:
-; CHECK-NOSSSE3: # BB#0: # %entry
+; CHECK-NOSSSE3: # %bb.0: # %entry
; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1
; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2
; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
@@ -56,17 +56,17 @@ define <4 x i32> @test2(<4 x i32> %v) {
; CHECK-NOSSSE3-NEXT: retq
;
; CHECK-SSSE3-LABEL: test2:
-; CHECK-SSSE3: # BB#0: # %entry
+; CHECK-SSSE3: # %bb.0: # %entry
; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
; CHECK-SSSE3-NEXT: retq
;
; CHECK-AVX-LABEL: test2:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: test2:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -76,7 +76,7 @@ entry:
define <2 x i64> @test3(<2 x i64> %v) {
; CHECK-NOSSSE3-LABEL: test3:
-; CHECK-NOSSSE3: # BB#0: # %entry
+; CHECK-NOSSSE3: # %bb.0: # %entry
; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1
; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2
; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
@@ -91,17 +91,17 @@ define <2 x i64> @test3(<2 x i64> %v) {
; CHECK-NOSSSE3-NEXT: retq
;
; CHECK-SSSE3-LABEL: test3:
-; CHECK-SSSE3: # BB#0: # %entry
+; CHECK-SSSE3: # %bb.0: # %entry
; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
; CHECK-SSSE3-NEXT: retq
;
; CHECK-AVX-LABEL: test3:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: test3:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -115,7 +115,7 @@ declare <4 x i64> @llvm.bswap.v4i64(<4 x
define <16 x i16> @test4(<16 x i16> %v) {
; CHECK-NOSSSE3-LABEL: test4:
-; CHECK-NOSSSE3: # BB#0: # %entry
+; CHECK-NOSSSE3: # %bb.0: # %entry
; CHECK-NOSSSE3-NEXT: pxor %xmm2, %xmm2
; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm3
; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
@@ -136,19 +136,19 @@ define <16 x i16> @test4(<16 x i16> %v)
; CHECK-NOSSSE3-NEXT: retq
;
; CHECK-SSSE3-LABEL: test4:
-; CHECK-SSSE3: # BB#0: # %entry
+; CHECK-SSSE3: # %bb.0: # %entry
; CHECK-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm0
; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm1
; CHECK-SSSE3-NEXT: retq
;
; CHECK-AVX-LABEL: test4:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14,17,16,19,18,21,20,23,22,25,24,27,26,29,28,31,30]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: test4:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14,17,16,19,18,21,20,23,22,25,24,27,26,29,28,31,30]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -158,7 +158,7 @@ entry:
define <8 x i32> @test5(<8 x i32> %v) {
; CHECK-NOSSSE3-LABEL: test5:
-; CHECK-NOSSSE3: # BB#0: # %entry
+; CHECK-NOSSSE3: # %bb.0: # %entry
; CHECK-NOSSSE3-NEXT: pxor %xmm2, %xmm2
; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm3
; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
@@ -179,19 +179,19 @@ define <8 x i32> @test5(<8 x i32> %v) {
; CHECK-NOSSSE3-NEXT: retq
;
; CHECK-SSSE3-LABEL: test5:
-; CHECK-SSSE3: # BB#0: # %entry
+; CHECK-SSSE3: # %bb.0: # %entry
; CHECK-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm0
; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm1
; CHECK-SSSE3-NEXT: retq
;
; CHECK-AVX-LABEL: test5:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12,19,18,17,16,23,22,21,20,27,26,25,24,31,30,29,28]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: test5:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12,19,18,17,16,23,22,21,20,27,26,25,24,31,30,29,28]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -201,7 +201,7 @@ entry:
define <4 x i64> @test6(<4 x i64> %v) {
; CHECK-NOSSSE3-LABEL: test6:
-; CHECK-NOSSSE3: # BB#0: # %entry
+; CHECK-NOSSSE3: # %bb.0: # %entry
; CHECK-NOSSSE3-NEXT: pxor %xmm2, %xmm2
; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm3
; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15]
@@ -226,19 +226,19 @@ define <4 x i64> @test6(<4 x i64> %v) {
; CHECK-NOSSSE3-NEXT: retq
;
; CHECK-SSSE3-LABEL: test6:
-; CHECK-SSSE3: # BB#0: # %entry
+; CHECK-SSSE3: # %bb.0: # %entry
; CHECK-SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm0
; CHECK-SSSE3-NEXT: pshufb %xmm2, %xmm1
; CHECK-SSSE3-NEXT: retq
;
; CHECK-AVX-LABEL: test6:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: test6:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8,23,22,21,20,19,18,17,16,31,30,29,28,27,26,25,24]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -250,7 +250,7 @@ declare <4 x i16> @llvm.bswap.v4i16(<4 x
define <4 x i16> @test7(<4 x i16> %v) {
; CHECK-NOSSSE3-LABEL: test7:
-; CHECK-NOSSSE3: # BB#0: # %entry
+; CHECK-NOSSSE3: # %bb.0: # %entry
; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1
; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2
; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
@@ -264,17 +264,17 @@ define <4 x i16> @test7(<4 x i16> %v) {
; CHECK-NOSSSE3-NEXT: retq
;
; CHECK-SSSE3-LABEL: test7:
-; CHECK-SSSE3: # BB#0: # %entry
+; CHECK-SSSE3: # %bb.0: # %entry
; CHECK-SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[1,0],zero,zero,xmm0[5,4],zero,zero,xmm0[9,8],zero,zero,xmm0[13,12],zero,zero
; CHECK-SSSE3-NEXT: retq
;
; CHECK-AVX-LABEL: test7:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,0],zero,zero,xmm0[5,4],zero,zero,xmm0[9,8],zero,zero,xmm0[13,12],zero,zero
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: test7:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -288,7 +288,7 @@ entry:
define <8 x i16> @identity_v8i16(<8 x i16> %v) {
; CHECK-ALL-LABEL: identity_v8i16:
-; CHECK-ALL: # BB#0: # %entry
+; CHECK-ALL: # %bb.0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
@@ -298,7 +298,7 @@ entry:
define <4 x i32> @identity_v4i32(<4 x i32> %v) {
; CHECK-ALL-LABEL: identity_v4i32:
-; CHECK-ALL: # BB#0: # %entry
+; CHECK-ALL: # %bb.0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
@@ -308,7 +308,7 @@ entry:
define <2 x i64> @identity_v2i64(<2 x i64> %v) {
; CHECK-ALL-LABEL: identity_v2i64:
-; CHECK-ALL: # BB#0: # %entry
+; CHECK-ALL: # %bb.0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
@@ -318,7 +318,7 @@ entry:
define <16 x i16> @identity_v16i16(<16 x i16> %v) {
; CHECK-ALL-LABEL: identity_v16i16:
-; CHECK-ALL: # BB#0: # %entry
+; CHECK-ALL: # %bb.0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
@@ -328,7 +328,7 @@ entry:
define <8 x i32> @identity_v8i32(<8 x i32> %v) {
; CHECK-ALL-LABEL: identity_v8i32:
-; CHECK-ALL: # BB#0: # %entry
+; CHECK-ALL: # %bb.0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
@@ -338,7 +338,7 @@ entry:
define <4 x i64> @identity_v4i64(<4 x i64> %v) {
; CHECK-ALL-LABEL: identity_v4i64:
-; CHECK-ALL: # BB#0: # %entry
+; CHECK-ALL: # %bb.0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
@@ -348,7 +348,7 @@ entry:
define <4 x i16> @identity_v4i16(<4 x i16> %v) {
; CHECK-ALL-LABEL: identity_v4i16:
-; CHECK-ALL: # BB#0: # %entry
+; CHECK-ALL: # %bb.0: # %entry
; CHECK-ALL-NEXT: retq
entry:
%bs1 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v)
@@ -362,17 +362,17 @@ entry:
define <8 x i16> @fold_v8i16() {
; CHECK-SSE-LABEL: fold_v8i16:
-; CHECK-SSE: # BB#0: # %entry
+; CHECK-SSE: # %bb.0: # %entry
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: fold_v8i16:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: fold_v8i16:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -382,17 +382,17 @@ entry:
define <4 x i32> @fold_v4i32() {
; CHECK-SSE-LABEL: fold_v4i32:
-; CHECK-SSE: # BB#0: # %entry
+; CHECK-SSE: # %bb.0: # %entry
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863]
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: fold_v4i32:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: fold_v4i32:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -402,17 +402,17 @@ entry:
define <2 x i64> @fold_v2i64() {
; CHECK-SSE-LABEL: fold_v2i64:
-; CHECK-SSE: # BB#0: # %entry
+; CHECK-SSE: # %bb.0: # %entry
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: fold_v2i64:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: fold_v2i64:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -422,18 +422,18 @@ entry:
define <16 x i16> @fold_v16i16() {
; CHECK-SSE-LABEL: fold_v16i16:
-; CHECK-SSE: # BB#0: # %entry
+; CHECK-SSE: # %bb.0: # %entry
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [63999,2048,63487,2560,62975,3072,62463,3584]
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: fold_v16i16:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,256,65535,512,65023,1024,64511,1536,63999,2048,63487,2560,62975,3072,62463,3584]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: fold_v16i16:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,256,65535,512,65023,1024,64511,1536,63999,2048,63487,2560,62975,3072,62463,3584]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -443,18 +443,18 @@ entry:
define <8 x i32> @fold_v8i32() {
; CHECK-SSE-LABEL: fold_v8i32:
-; CHECK-SSE: # BB#0: # %entry
+; CHECK-SSE: # %bb.0: # %entry
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [0,16777216,4294967295,33554432]
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [4261412863,67108864,4227858431,100663296]
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: fold_v8i32:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,16777216,4294967295,33554432,4261412863,67108864,4227858431,100663296]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: fold_v8i32:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [0,16777216,4294967295,33554432,4261412863,67108864,4227858431,100663296]
; CHECK-WIDE-AVX-NEXT: retq
entry:
@@ -464,18 +464,18 @@ entry:
define <4 x i64> @fold_v4i64() {
; CHECK-SSE-LABEL: fold_v4i64:
-; CHECK-SSE: # BB#0: # %entry
+; CHECK-SSE: # %bb.0: # %entry
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
; CHECK-SSE-NEXT: movaps {{.*#+}} xmm1 = [18446462598732840960,72056494526300160]
; CHECK-SSE-NEXT: retq
;
; CHECK-AVX-LABEL: fold_v4i64:
-; CHECK-AVX: # BB#0: # %entry
+; CHECK-AVX: # %bb.0: # %entry
; CHECK-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18374686479671623680,18446744073709551615,18446462598732840960,72056494526300160]
; CHECK-AVX-NEXT: retq
;
; CHECK-WIDE-AVX-LABEL: fold_v4i64:
-; CHECK-WIDE-AVX: # BB#0: # %entry
+; CHECK-WIDE-AVX: # %bb.0: # %entry
; CHECK-WIDE-AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18374686479671623680,18446744073709551615,18446462598732840960,72056494526300160]
; CHECK-WIDE-AVX-NEXT: retq
entry:
Modified: llvm/trunk/test/CodeGen/X86/bswap-wide-int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap-wide-int.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bswap-wide-int.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bswap-wide-int.ll Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@ declare i256 @llvm.bswap.i256(i256)
define i64 @bswap_i64(i64 %a0) nounwind {
; X86-LABEL: bswap_i64:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: bswapl %eax
@@ -18,19 +18,19 @@ define i64 @bswap_i64(i64 %a0) nounwind
; X86-NEXT: retl
;
; X86-MOVBE-LABEL: bswap_i64:
-; X86-MOVBE: # BB#0:
+; X86-MOVBE: # %bb.0:
; X86-MOVBE-NEXT: movbel {{[0-9]+}}(%esp), %eax
; X86-MOVBE-NEXT: movbel {{[0-9]+}}(%esp), %edx
; X86-MOVBE-NEXT: retl
;
; X64-LABEL: bswap_i64:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bswapq %rdi
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: retq
;
; X64-MOVBE-LABEL: bswap_i64:
-; X64-MOVBE: # BB#0:
+; X64-MOVBE: # %bb.0:
; X64-MOVBE-NEXT: bswapq %rdi
; X64-MOVBE-NEXT: movq %rdi, %rax
; X64-MOVBE-NEXT: retq
@@ -40,7 +40,7 @@ define i64 @bswap_i64(i64 %a0) nounwind
define i128 @bswap_i128(i128 %a0) nounwind {
; X86-LABEL: bswap_i128:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -61,7 +61,7 @@ define i128 @bswap_i128(i128 %a0) nounwi
; X86-NEXT: retl $4
;
; X86-MOVBE-LABEL: bswap_i128:
-; X86-MOVBE: # BB#0:
+; X86-MOVBE: # %bb.0:
; X86-MOVBE-NEXT: pushl %edi
; X86-MOVBE-NEXT: pushl %esi
; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -78,7 +78,7 @@ define i128 @bswap_i128(i128 %a0) nounwi
; X86-MOVBE-NEXT: retl $4
;
; X64-LABEL: bswap_i128:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bswapq %rsi
; X64-NEXT: bswapq %rdi
; X64-NEXT: movq %rsi, %rax
@@ -86,7 +86,7 @@ define i128 @bswap_i128(i128 %a0) nounwi
; X64-NEXT: retq
;
; X64-MOVBE-LABEL: bswap_i128:
-; X64-MOVBE: # BB#0:
+; X64-MOVBE: # %bb.0:
; X64-MOVBE-NEXT: bswapq %rsi
; X64-MOVBE-NEXT: bswapq %rdi
; X64-MOVBE-NEXT: movq %rsi, %rax
@@ -98,7 +98,7 @@ define i128 @bswap_i128(i128 %a0) nounwi
define i256 @bswap_i256(i256 %a0) nounwind {
; X86-LABEL: bswap_i256:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: bswapl %ecx
@@ -127,7 +127,7 @@ define i256 @bswap_i256(i256 %a0) nounwi
; X86-NEXT: retl $4
;
; X86-MOVBE-LABEL: bswap_i256:
-; X86-MOVBE: # BB#0:
+; X86-MOVBE: # %bb.0:
; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-MOVBE-NEXT: movbel %ecx, 28(%eax)
@@ -148,7 +148,7 @@ define i256 @bswap_i256(i256 %a0) nounwi
; X86-MOVBE-NEXT: retl $4
;
; X64-LABEL: bswap_i256:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: bswapq %r8
; X64-NEXT: bswapq %rcx
; X64-NEXT: bswapq %rdx
@@ -161,7 +161,7 @@ define i256 @bswap_i256(i256 %a0) nounwi
; X64-NEXT: retq
;
; X64-MOVBE-LABEL: bswap_i256:
-; X64-MOVBE: # BB#0:
+; X64-MOVBE: # %bb.0:
; X64-MOVBE-NEXT: movbeq %rsi, 24(%rdi)
; X64-MOVBE-NEXT: movbeq %rdx, 16(%rdi)
; X64-MOVBE-NEXT: movbeq %rcx, 8(%rdi)
Modified: llvm/trunk/test/CodeGen/X86/bswap_tree.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap_tree.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bswap_tree.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bswap_tree.ll Mon Dec 4 09:18:51 2017
@@ -12,14 +12,14 @@
; => (rotl (bswap x), 16)
define i32 @test1(i32 %x) nounwind {
; CHECK-LABEL: test1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: bswapl %eax
; CHECK-NEXT: roll $16, %eax
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test1:
-; CHECK64: # BB#0:
+; CHECK64: # %bb.0:
; CHECK64-NEXT: bswapl %edi
; CHECK64-NEXT: roll $16, %edi
; CHECK64-NEXT: movl %edi, %eax
@@ -45,14 +45,14 @@ define i32 @test1(i32 %x) nounwind {
; ((x >> 8) & 0x00ff0000)
define i32 @test2(i32 %x) nounwind {
; CHECK-LABEL: test2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: bswapl %eax
; CHECK-NEXT: roll $16, %eax
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test2:
-; CHECK64: # BB#0:
+; CHECK64: # %bb.0:
; CHECK64-NEXT: bswapl %edi
; CHECK64-NEXT: roll $16, %edi
; CHECK64-NEXT: movl %edi, %eax
Modified: llvm/trunk/test/CodeGen/X86/bswap_tree2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bswap_tree2.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bswap_tree2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bswap_tree2.ll Mon Dec 4 09:18:51 2017
@@ -8,7 +8,7 @@
; (with only half of the swap tree valid).
define i32 @test1(i32 %x) nounwind {
; CHECK-LABEL: test1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, %ecx
; CHECK-NEXT: andl $16711680, %ecx # imm = 0xFF0000
@@ -23,7 +23,7 @@
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test1:
-; CHECK64: # BB#0:
+; CHECK64: # %bb.0:
; CHECK64-NEXT: movl %edi, %eax
; CHECK64-NEXT: andl $16711680, %eax # imm = 0xFF0000
; CHECK64-NEXT: movl %edi, %ecx
@@ -58,7 +58,7 @@
; ((x >> 8) & 0x00ff0000)
define i32 @test2(i32 %x) nounwind {
; CHECK-LABEL: test2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: shrl $8, %eax
@@ -72,7 +72,7 @@ define i32 @test2(i32 %x) nounwind {
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test2:
-; CHECK64: # BB#0:
+; CHECK64: # %bb.0:
; CHECK64-NEXT: movl %edi, %eax
; CHECK64-NEXT: shrl $8, %eax
; CHECK64-NEXT: shll $8, %edi
@@ -100,7 +100,7 @@ define i32 @test2(i32 %x) nounwind {
; Invalid pattern involving a unary op
define i32 @test3(float %x) nounwind {
; CHECK-LABEL: test3:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: subl $8, %esp
; CHECK-NEXT: flds {{[0-9]+}}(%esp)
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
@@ -124,7 +124,7 @@ define i32 @test3(float %x) nounwind {
; CHECK-NEXT: retl
;
; CHECK64-LABEL: test3:
-; CHECK64: # BB#0:
+; CHECK64: # %bb.0:
; CHECK64-NEXT: cvttss2si %xmm0, %ecx
; CHECK64-NEXT: movl %ecx, %edx
; CHECK64-NEXT: shll $8, %edx
Modified: llvm/trunk/test/CodeGen/X86/bt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bt.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bt.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bt.ll Mon Dec 4 09:18:51 2017
@@ -23,21 +23,21 @@
define void @test2(i32 %x, i32 %n) nounwind {
; X86-LABEL: test2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB0_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB0_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: test2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB0_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -59,22 +59,22 @@ UnifiedReturnBlock:
define void @test2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: test2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB1_1
-; X86-NEXT: # BB#2: # %UnifiedReturnBlock
+; X86-NEXT: # %bb.2: # %UnifiedReturnBlock
; X86-NEXT: retl
; X86-NEXT: .LBB1_1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: retl
;
; X64-LABEL: test2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB1_1
-; X64-NEXT: # BB#2: # %UnifiedReturnBlock
+; X64-NEXT: # %bb.2: # %UnifiedReturnBlock
; X64-NEXT: retq
; X64-NEXT: .LBB1_1: # %bb
; X64-NEXT: pushq %rax
@@ -97,21 +97,21 @@ UnifiedReturnBlock:
define void @atest2(i32 %x, i32 %n) nounwind {
; X86-LABEL: atest2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB2_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB2_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: atest2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB2_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -133,22 +133,22 @@ UnifiedReturnBlock:
define void @atest2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: atest2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB3_1
-; X86-NEXT: # BB#2: # %UnifiedReturnBlock
+; X86-NEXT: # %bb.2: # %UnifiedReturnBlock
; X86-NEXT: retl
; X86-NEXT: .LBB3_1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: retl
;
; X64-LABEL: atest2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB3_1
-; X64-NEXT: # BB#2: # %UnifiedReturnBlock
+; X64-NEXT: # %bb.2: # %UnifiedReturnBlock
; X64-NEXT: retq
; X64-NEXT: .LBB3_1: # %bb
; X64-NEXT: pushq %rax
@@ -171,22 +171,22 @@ UnifiedReturnBlock:
define void @test3(i32 %x, i32 %n) nounwind {
; X86-LABEL: test3:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB4_1
-; X86-NEXT: # BB#2: # %UnifiedReturnBlock
+; X86-NEXT: # %bb.2: # %UnifiedReturnBlock
; X86-NEXT: retl
; X86-NEXT: .LBB4_1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: retl
;
; X64-LABEL: test3:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB4_1
-; X64-NEXT: # BB#2: # %UnifiedReturnBlock
+; X64-NEXT: # %bb.2: # %UnifiedReturnBlock
; X64-NEXT: retq
; X64-NEXT: .LBB4_1: # %bb
; X64-NEXT: pushq %rax
@@ -209,22 +209,22 @@ UnifiedReturnBlock:
define void @test3b(i32 %x, i32 %n) nounwind {
; X86-LABEL: test3b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB5_1
-; X86-NEXT: # BB#2: # %UnifiedReturnBlock
+; X86-NEXT: # %bb.2: # %UnifiedReturnBlock
; X86-NEXT: retl
; X86-NEXT: .LBB5_1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: retl
;
; X64-LABEL: test3b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB5_1
-; X64-NEXT: # BB#2: # %UnifiedReturnBlock
+; X64-NEXT: # %bb.2: # %UnifiedReturnBlock
; X64-NEXT: retq
; X64-NEXT: .LBB5_1: # %bb
; X64-NEXT: pushq %rax
@@ -247,21 +247,21 @@ UnifiedReturnBlock:
define void @testne2(i32 %x, i32 %n) nounwind {
; X86-LABEL: testne2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB6_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB6_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: testne2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB6_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -283,21 +283,21 @@ UnifiedReturnBlock:
define void @testne2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: testne2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB7_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB7_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: testne2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB7_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -319,21 +319,21 @@ UnifiedReturnBlock:
define void @atestne2(i32 %x, i32 %n) nounwind {
; X86-LABEL: atestne2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB8_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB8_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: atestne2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB8_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -355,21 +355,21 @@ UnifiedReturnBlock:
define void @atestne2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: atestne2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB9_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB9_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: atestne2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB9_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -391,21 +391,21 @@ UnifiedReturnBlock:
define void @testne3(i32 %x, i32 %n) nounwind {
; X86-LABEL: testne3:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB10_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB10_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: testne3:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB10_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -427,21 +427,21 @@ UnifiedReturnBlock:
define void @testne3b(i32 %x, i32 %n) nounwind {
; X86-LABEL: testne3b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB11_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB11_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: testne3b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB11_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -463,21 +463,21 @@ UnifiedReturnBlock:
define void @query2(i32 %x, i32 %n) nounwind {
; X86-LABEL: query2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB12_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB12_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: query2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB12_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -499,21 +499,21 @@ UnifiedReturnBlock:
define void @query2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: query2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB13_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB13_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: query2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB13_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -535,21 +535,21 @@ UnifiedReturnBlock:
define void @aquery2(i32 %x, i32 %n) nounwind {
; X86-LABEL: aquery2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB14_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB14_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: aquery2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB14_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -571,21 +571,21 @@ UnifiedReturnBlock:
define void @aquery2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: aquery2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB15_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB15_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: aquery2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB15_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -607,21 +607,21 @@ UnifiedReturnBlock:
define void @query3(i32 %x, i32 %n) nounwind {
; X86-LABEL: query3:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB16_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB16_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: query3:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB16_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -643,21 +643,21 @@ UnifiedReturnBlock:
define void @query3b(i32 %x, i32 %n) nounwind {
; X86-LABEL: query3b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB17_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB17_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: query3b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB17_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -679,21 +679,21 @@ UnifiedReturnBlock:
define void @query3x(i32 %x, i32 %n) nounwind {
; X86-LABEL: query3x:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB18_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB18_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: query3x:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB18_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -715,21 +715,21 @@ UnifiedReturnBlock:
define void @query3bx(i32 %x, i32 %n) nounwind {
; X86-LABEL: query3bx:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jae .LBB19_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB19_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: query3bx:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jae .LBB19_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -751,21 +751,21 @@ UnifiedReturnBlock:
define void @queryne2(i32 %x, i32 %n) nounwind {
; X86-LABEL: queryne2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB20_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB20_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: queryne2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB20_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -787,21 +787,21 @@ UnifiedReturnBlock:
define void @queryne2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: queryne2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB21_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB21_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: queryne2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB21_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -823,21 +823,21 @@ UnifiedReturnBlock:
define void @aqueryne2(i32 %x, i32 %n) nounwind {
; X86-LABEL: aqueryne2:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB22_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB22_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: aqueryne2:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB22_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -859,21 +859,21 @@ UnifiedReturnBlock:
define void @aqueryne2b(i32 %x, i32 %n) nounwind {
; X86-LABEL: aqueryne2b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB23_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB23_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: aqueryne2b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB23_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -895,21 +895,21 @@ UnifiedReturnBlock:
define void @queryne3(i32 %x, i32 %n) nounwind {
; X86-LABEL: queryne3:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB24_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB24_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: queryne3:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB24_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -931,21 +931,21 @@ UnifiedReturnBlock:
define void @queryne3b(i32 %x, i32 %n) nounwind {
; X86-LABEL: queryne3b:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB25_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB25_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: queryne3b:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB25_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -967,21 +967,21 @@ UnifiedReturnBlock:
define void @queryne3x(i32 %x, i32 %n) nounwind {
; X86-LABEL: queryne3x:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB26_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB26_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: queryne3x:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB26_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -1003,21 +1003,21 @@ UnifiedReturnBlock:
define void @queryne3bx(i32 %x, i32 %n) nounwind {
; X86-LABEL: queryne3bx:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %ecx, %eax
; X86-NEXT: jb .LBB27_2
-; X86-NEXT: # BB#1: # %bb
+; X86-NEXT: # %bb.1: # %bb
; X86-NEXT: calll foo
; X86-NEXT: .LBB27_2: # %UnifiedReturnBlock
; X86-NEXT: retl
;
; X64-LABEL: queryne3bx:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %esi, %edi
; X64-NEXT: jb .LBB27_2
-; X64-NEXT: # BB#1: # %bb
+; X64-NEXT: # %bb.1: # %bb
; X64-NEXT: pushq %rax
; X64-NEXT: callq foo
; X64-NEXT: popq %rax
@@ -1041,7 +1041,7 @@ declare void @foo()
define zeroext i1 @invert(i32 %flags, i32 %flag) nounwind {
; X86-LABEL: invert:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: notl %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
@@ -1050,7 +1050,7 @@ define zeroext i1 @invert(i32 %flags, i3
; X86-NEXT: retl
;
; X64-LABEL: invert:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: notl %edi
; X64-NEXT: btl %esi, %edi
; X64-NEXT: setb %al
@@ -1064,7 +1064,7 @@ define zeroext i1 @invert(i32 %flags, i3
define zeroext i1 @extend(i32 %bit, i64 %bits) {
; X86-LABEL: extend:
-; X86: # BB#0: # %entry
+; X86: # %bb.0: # %entry
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: btl %eax, %ecx
@@ -1072,7 +1072,7 @@ define zeroext i1 @extend(i32 %bit, i64
; X86-NEXT: retl
;
; X64-LABEL: extend:
-; X64: # BB#0: # %entry
+; X64: # %bb.0: # %entry
; X64-NEXT: btl %edi, %esi
; X64-NEXT: setb %al
; X64-NEXT: retq
@@ -1092,7 +1092,7 @@ entry:
; }
define void @demanded_i32(i32* nocapture readonly, i32* nocapture, i32) nounwind {
; X86-LABEL: demanded_i32:
-; X86: # BB#0:
+; X86: # %bb.0:
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
@@ -1103,7 +1103,7 @@ define void @demanded_i32(i32* nocapture
; X86-NEXT: shll %cl, %edx
; X86-NEXT: btl %ecx, %esi
; X86-NEXT: jae .LBB30_2
-; X86-NEXT: # BB#1:
+; X86-NEXT: # %bb.1:
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: orl %edx, (%ecx,%eax,4)
; X86-NEXT: .LBB30_2:
@@ -1111,7 +1111,7 @@ define void @demanded_i32(i32* nocapture
; X86-NEXT: retl
;
; X64-LABEL: demanded_i32:
-; X64: # BB#0:
+; X64: # %bb.0:
; X64-NEXT: movl %edx, %eax
; X64-NEXT: shrl $5, %eax
; X64-NEXT: movl (%rdi,%rax,4), %r8d
@@ -1120,7 +1120,7 @@ define void @demanded_i32(i32* nocapture
; X64-NEXT: shll %cl, %edi
; X64-NEXT: btl %edx, %r8d
; X64-NEXT: jae .LBB30_2
-; X64-NEXT: # BB#1:
+; X64-NEXT: # %bb.1:
; X64-NEXT: orl %edi, (%rsi,%rax,4)
; X64-NEXT: .LBB30_2:
; X64-NEXT: retq
Modified: llvm/trunk/test/CodeGen/X86/btq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/btq.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/btq.ll (original)
+++ llvm/trunk/test/CodeGen/X86/btq.ll Mon Dec 4 09:18:51 2017
@@ -5,10 +5,10 @@ declare void @bar()
define void @test1(i64 %foo) nounwind {
; CHECK-LABEL: test1:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: btq $32, %rdi
; CHECK-NEXT: jb .LBB0_2
-; CHECK-NEXT: # BB#1: # %if.end
+; CHECK-NEXT: # %bb.1: # %if.end
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB0_2: # %if.then
; CHECK-NEXT: jmp bar # TAILCALL
@@ -26,10 +26,10 @@ if.end:
define void @test2(i64 %foo) nounwind {
; CHECK-LABEL: test2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: testl $-2147483648, %edi # imm = 0x80000000
; CHECK-NEXT: jne .LBB1_2
-; CHECK-NEXT: # BB#1: # %if.end
+; CHECK-NEXT: # %bb.1: # %if.end
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB1_2: # %if.then
; CHECK-NEXT: jmp bar # TAILCALL
Modified: llvm/trunk/test/CodeGen/X86/build-vector-128.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/build-vector-128.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/build-vector-128.ll (original)
+++ llvm/trunk/test/CodeGen/X86/build-vector-128.ll Mon Dec 4 09:18:51 2017
@@ -10,22 +10,22 @@
define <2 x double> @test_buildvector_v2f64(double %a0, double %a1) {
; SSE-32-LABEL: test_buildvector_v2f64:
-; SSE-32: # BB#0:
+; SSE-32: # %bb.0:
; SSE-32-NEXT: movups {{[0-9]+}}(%esp), %xmm0
; SSE-32-NEXT: retl
;
; SSE-64-LABEL: test_buildvector_v2f64:
-; SSE-64: # BB#0:
+; SSE-64: # %bb.0:
; SSE-64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-64-NEXT: retq
;
; AVX-32-LABEL: test_buildvector_v2f64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v2f64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-64-NEXT: retq
%ins0 = insertelement <2 x double> undef, double %a0, i32 0
@@ -35,31 +35,31 @@ define <2 x double> @test_buildvector_v2
define <4 x float> @test_buildvector_v4f32(float %a0, float %a1, float %a2, float %a3) {
; SSE-32-LABEL: test_buildvector_v4f32:
-; SSE-32: # BB#0:
+; SSE-32: # %bb.0:
; SSE-32-NEXT: movups {{[0-9]+}}(%esp), %xmm0
; SSE-32-NEXT: retl
;
; SSE2-64-LABEL: test_buildvector_v4f32:
-; SSE2-64: # BB#0:
+; SSE2-64: # %bb.0:
; SSE2-64-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; SSE2-64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-64-NEXT: retq
;
; SSE41-64-LABEL: test_buildvector_v4f32:
-; SSE41-64: # BB#0:
+; SSE41-64: # %bb.0:
; SSE41-64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; SSE41-64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
; SSE41-64-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0]
; SSE41-64-NEXT: retq
;
; AVX-32-LABEL: test_buildvector_v4f32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v4f32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0]
@@ -73,24 +73,24 @@ define <4 x float> @test_buildvector_v4f
define <2 x i64> @test_buildvector_v2i64(i64 %a0, i64 %a1) {
; SSE-32-LABEL: test_buildvector_v2i64:
-; SSE-32: # BB#0:
+; SSE-32: # %bb.0:
; SSE-32-NEXT: movups {{[0-9]+}}(%esp), %xmm0
; SSE-32-NEXT: retl
;
; SSE-64-LABEL: test_buildvector_v2i64:
-; SSE-64: # BB#0:
+; SSE-64: # %bb.0:
; SSE-64-NEXT: movq %rsi, %xmm1
; SSE-64-NEXT: movq %rdi, %xmm0
; SSE-64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-64-NEXT: retq
;
; AVX-32-LABEL: test_buildvector_v2i64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v2i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovq %rsi, %xmm0
; AVX-64-NEXT: vmovq %rdi, %xmm1
; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -102,12 +102,12 @@ define <2 x i64> @test_buildvector_v2i64
define <4 x i32> @test_buildvector_v4i32(i32 %f0, i32 %f1, i32 %f2, i32 %f3) {
; SSE-32-LABEL: test_buildvector_v4i32:
-; SSE-32: # BB#0:
+; SSE-32: # %bb.0:
; SSE-32-NEXT: movups {{[0-9]+}}(%esp), %xmm0
; SSE-32-NEXT: retl
;
; SSE2-64-LABEL: test_buildvector_v4i32:
-; SSE2-64: # BB#0:
+; SSE2-64: # %bb.0:
; SSE2-64-NEXT: movd %ecx, %xmm0
; SSE2-64-NEXT: movd %edx, %xmm1
; SSE2-64-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
@@ -118,7 +118,7 @@ define <4 x i32> @test_buildvector_v4i32
; SSE2-64-NEXT: retq
;
; SSE41-64-LABEL: test_buildvector_v4i32:
-; SSE41-64: # BB#0:
+; SSE41-64: # %bb.0:
; SSE41-64-NEXT: movd %edi, %xmm0
; SSE41-64-NEXT: pinsrd $1, %esi, %xmm0
; SSE41-64-NEXT: pinsrd $2, %edx, %xmm0
@@ -126,12 +126,12 @@ define <4 x i32> @test_buildvector_v4i32
; SSE41-64-NEXT: retq
;
; AVX-32-LABEL: test_buildvector_v4i32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %xmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v4i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
@@ -146,7 +146,7 @@ define <4 x i32> @test_buildvector_v4i32
define <8 x i16> @test_buildvector_v8i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) {
; SSE2-32-LABEL: test_buildvector_v8i16:
-; SSE2-32: # BB#0:
+; SSE2-32: # %bb.0:
; SSE2-32-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-32-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
@@ -165,7 +165,7 @@ define <8 x i16> @test_buildvector_v8i16
; SSE2-32-NEXT: retl
;
; SSE2-64-LABEL: test_buildvector_v8i16:
-; SSE2-64: # BB#0:
+; SSE2-64: # %bb.0:
; SSE2-64-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-64-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-64-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
@@ -184,7 +184,7 @@ define <8 x i16> @test_buildvector_v8i16
; SSE2-64-NEXT: retq
;
; SSE41-32-LABEL: test_buildvector_v8i16:
-; SSE41-32: # BB#0:
+; SSE41-32: # %bb.0:
; SSE41-32-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE41-32-NEXT: pinsrw $1, {{[0-9]+}}(%esp), %xmm0
; SSE41-32-NEXT: pinsrw $2, {{[0-9]+}}(%esp), %xmm0
@@ -196,7 +196,7 @@ define <8 x i16> @test_buildvector_v8i16
; SSE41-32-NEXT: retl
;
; SSE41-64-LABEL: test_buildvector_v8i16:
-; SSE41-64: # BB#0:
+; SSE41-64: # %bb.0:
; SSE41-64-NEXT: movd %edi, %xmm0
; SSE41-64-NEXT: pinsrw $1, %esi, %xmm0
; SSE41-64-NEXT: pinsrw $2, %edx, %xmm0
@@ -208,7 +208,7 @@ define <8 x i16> @test_buildvector_v8i16
; SSE41-64-NEXT: retq
;
; AVX-32-LABEL: test_buildvector_v8i16:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-32-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrw $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -220,7 +220,7 @@ define <8 x i16> @test_buildvector_v8i16
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v8i16:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrw $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrw $2, %edx, %xmm0, %xmm0
@@ -243,7 +243,7 @@ define <8 x i16> @test_buildvector_v8i16
define <16 x i8> @test_buildvector_v16i8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15) {
; SSE2-32-LABEL: test_buildvector_v16i8:
-; SSE2-32: # BB#0:
+; SSE2-32: # %bb.0:
; SSE2-32-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-32-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
@@ -278,7 +278,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE2-32-NEXT: retl
;
; SSE2-64-LABEL: test_buildvector_v16i8:
-; SSE2-64: # BB#0:
+; SSE2-64: # %bb.0:
; SSE2-64-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-64-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-64-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
@@ -313,7 +313,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE2-64-NEXT: retq
;
; SSE41-32-LABEL: test_buildvector_v16i8:
-; SSE41-32: # BB#0:
+; SSE41-32: # %bb.0:
; SSE41-32-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE41-32-NEXT: pinsrb $1, {{[0-9]+}}(%esp), %xmm0
; SSE41-32-NEXT: pinsrb $2, {{[0-9]+}}(%esp), %xmm0
@@ -333,7 +333,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE41-32-NEXT: retl
;
; SSE41-64-LABEL: test_buildvector_v16i8:
-; SSE41-64: # BB#0:
+; SSE41-64: # %bb.0:
; SSE41-64-NEXT: movd %edi, %xmm0
; SSE41-64-NEXT: pinsrb $1, %esi, %xmm0
; SSE41-64-NEXT: pinsrb $2, %edx, %xmm0
@@ -353,7 +353,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE41-64-NEXT: retq
;
; AVX-32-LABEL: test_buildvector_v16i8:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -373,7 +373,7 @@ define <16 x i8> @test_buildvector_v16i8
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v16i8:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrb $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/build-vector-256.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/build-vector-256.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/build-vector-256.ll (original)
+++ llvm/trunk/test/CodeGen/X86/build-vector-256.ll Mon Dec 4 09:18:51 2017
@@ -6,12 +6,12 @@
define <4 x double> @test_buildvector_v4f64(double %a0, double %a1, double %a2, double %a3) {
; AVX-32-LABEL: test_buildvector_v4f64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v4f64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovlhps {{.*#+}} xmm2 = xmm2[0],xmm3[0]
; AVX-64-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-64-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0
@@ -25,12 +25,12 @@ define <4 x double> @test_buildvector_v4
define <8 x float> @test_buildvector_v8f32(float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) {
; AVX-32-LABEL: test_buildvector_v8f32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v8f32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[2,3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1],xmm6[0],xmm4[3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1,2],xmm7[0]
@@ -52,12 +52,12 @@ define <8 x float> @test_buildvector_v8f
define <4 x i64> @test_buildvector_v4i64(i64 %a0, i64 %a1, i64 %a2, i64 %a3) {
; AVX-32-LABEL: test_buildvector_v4i64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v4i64:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovq %rcx, %xmm0
; AVX1-64-NEXT: vmovq %rdx, %xmm1
; AVX1-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -68,7 +68,7 @@ define <4 x i64> @test_buildvector_v4i64
; AVX1-64-NEXT: retq
;
; AVX2-64-LABEL: test_buildvector_v4i64:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovq %rcx, %xmm0
; AVX2-64-NEXT: vmovq %rdx, %xmm1
; AVX2-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -86,12 +86,12 @@ define <4 x i64> @test_buildvector_v4i64
define <8 x i32> @test_buildvector_v8i32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) {
; AVX-32-LABEL: test_buildvector_v8i32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %ymm0
; AVX-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v8i32:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovd %edi, %xmm0
; AVX1-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX1-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
@@ -104,7 +104,7 @@ define <8 x i32> @test_buildvector_v8i32
; AVX1-64-NEXT: retq
;
; AVX2-64-LABEL: test_buildvector_v8i32:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovd %edi, %xmm0
; AVX2-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX2-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
@@ -128,7 +128,7 @@ define <8 x i32> @test_buildvector_v8i32
define <16 x i16> @test_buildvector_v16i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) {
; AVX1-32-LABEL: test_buildvector_v16i16:
-; AVX1-32: # BB#0:
+; AVX1-32: # %bb.0:
; AVX1-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX1-32-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX1-32-NEXT: vpinsrw $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -149,7 +149,7 @@ define <16 x i16> @test_buildvector_v16i
; AVX1-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v16i16:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovd %edi, %xmm0
; AVX1-64-NEXT: vpinsrw $1, %esi, %xmm0, %xmm0
; AVX1-64-NEXT: vpinsrw $2, %edx, %xmm0, %xmm0
@@ -170,7 +170,7 @@ define <16 x i16> @test_buildvector_v16i
; AVX1-64-NEXT: retq
;
; AVX2-32-LABEL: test_buildvector_v16i16:
-; AVX2-32: # BB#0:
+; AVX2-32: # %bb.0:
; AVX2-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX2-32-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX2-32-NEXT: vpinsrw $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -191,7 +191,7 @@ define <16 x i16> @test_buildvector_v16i
; AVX2-32-NEXT: retl
;
; AVX2-64-LABEL: test_buildvector_v16i16:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovd %edi, %xmm0
; AVX2-64-NEXT: vpinsrw $1, %esi, %xmm0, %xmm0
; AVX2-64-NEXT: vpinsrw $2, %edx, %xmm0, %xmm0
@@ -231,7 +231,7 @@ define <16 x i16> @test_buildvector_v16i
define <32 x i8> @test_buildvector_v32i8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31) {
; AVX1-32-LABEL: test_buildvector_v32i8:
-; AVX1-32: # BB#0:
+; AVX1-32: # %bb.0:
; AVX1-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX1-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX1-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -268,7 +268,7 @@ define <32 x i8> @test_buildvector_v32i8
; AVX1-32-NEXT: retl
;
; AVX1-64-LABEL: test_buildvector_v32i8:
-; AVX1-64: # BB#0:
+; AVX1-64: # %bb.0:
; AVX1-64-NEXT: vmovd %edi, %xmm0
; AVX1-64-NEXT: vpinsrb $1, %esi, %xmm0, %xmm0
; AVX1-64-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
@@ -305,7 +305,7 @@ define <32 x i8> @test_buildvector_v32i8
; AVX1-64-NEXT: retq
;
; AVX2-32-LABEL: test_buildvector_v32i8:
-; AVX2-32: # BB#0:
+; AVX2-32: # %bb.0:
; AVX2-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX2-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX2-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -342,7 +342,7 @@ define <32 x i8> @test_buildvector_v32i8
; AVX2-32-NEXT: retl
;
; AVX2-64-LABEL: test_buildvector_v32i8:
-; AVX2-64: # BB#0:
+; AVX2-64: # %bb.0:
; AVX2-64-NEXT: vmovd %edi, %xmm0
; AVX2-64-NEXT: vpinsrb $1, %esi, %xmm0, %xmm0
; AVX2-64-NEXT: vpinsrb $2, %edx, %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/build-vector-512.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/build-vector-512.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/build-vector-512.ll (original)
+++ llvm/trunk/test/CodeGen/X86/build-vector-512.ll Mon Dec 4 09:18:51 2017
@@ -6,12 +6,12 @@
define <8 x double> @test_buildvector_v8f64(double %a0, double %a1, double %a2, double %a3, double %a4, double %a5, double %a6, double %a7) {
; AVX-32-LABEL: test_buildvector_v8f64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %zmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v8f64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovlhps {{.*#+}} xmm6 = xmm6[0],xmm7[0]
; AVX-64-NEXT: vmovlhps {{.*#+}} xmm4 = xmm4[0],xmm5[0]
; AVX-64-NEXT: vinsertf128 $1, %xmm6, %ymm4, %ymm4
@@ -33,12 +33,12 @@ define <8 x double> @test_buildvector_v8
define <16 x float> @test_buildvector_v16f32(float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7, float %a8, float %a9, float %a10, float %a11, float %a12, float %a13, float %a14, float %a15) {
; AVX-32-LABEL: test_buildvector_v16f32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %zmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v16f32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[2,3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1],xmm6[0],xmm4[3]
; AVX-64-NEXT: vinsertps {{.*#+}} xmm4 = xmm4[0,1,2],xmm7[0]
@@ -78,12 +78,12 @@ define <16 x float> @test_buildvector_v1
define <8 x i64> @test_buildvector_v8i64(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7) {
; AVX-32-LABEL: test_buildvector_v8i64:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %zmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v8i64:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovq %rcx, %xmm0
; AVX-64-NEXT: vmovq %rdx, %xmm1
; AVX-64-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
@@ -110,12 +110,12 @@ define <8 x i64> @test_buildvector_v8i64
define <16 x i32> @test_buildvector_v16i32(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9, i32 %a10, i32 %a11, i32 %a12, i32 %a13, i32 %a14, i32 %a15) {
; AVX-32-LABEL: test_buildvector_v16i32:
-; AVX-32: # BB#0:
+; AVX-32: # %bb.0:
; AVX-32-NEXT: vmovups {{[0-9]+}}(%esp), %zmm0
; AVX-32-NEXT: retl
;
; AVX-64-LABEL: test_buildvector_v16i32:
-; AVX-64: # BB#0:
+; AVX-64: # %bb.0:
; AVX-64-NEXT: vmovd %edi, %xmm0
; AVX-64-NEXT: vpinsrd $1, %esi, %xmm0, %xmm0
; AVX-64-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
@@ -157,7 +157,7 @@ define <16 x i32> @test_buildvector_v16i
define <32 x i16> @test_buildvector_v32i16(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15, i16 %a16, i16 %a17, i16 %a18, i16 %a19, i16 %a20, i16 %a21, i16 %a22, i16 %a23, i16 %a24, i16 %a25, i16 %a26, i16 %a27, i16 %a28, i16 %a29, i16 %a30, i16 %a31) {
; AVX512F-32-LABEL: test_buildvector_v32i16:
-; AVX512F-32: # BB#0:
+; AVX512F-32: # %bb.0:
; AVX512F-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512F-32-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX512F-32-NEXT: vpinsrw $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -195,7 +195,7 @@ define <32 x i16> @test_buildvector_v32i
; AVX512F-32-NEXT: retl
;
; AVX512F-64-LABEL: test_buildvector_v32i16:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512F-64-NEXT: vpinsrw $1, {{[0-9]+}}(%rsp), %xmm0, %xmm0
; AVX512F-64-NEXT: vpinsrw $2, {{[0-9]+}}(%rsp), %xmm0, %xmm0
@@ -233,7 +233,7 @@ define <32 x i16> @test_buildvector_v32i
; AVX512F-64-NEXT: retq
;
; AVX512BW-32-LABEL: test_buildvector_v32i16:
-; AVX512BW-32: # BB#0:
+; AVX512BW-32: # %bb.0:
; AVX512BW-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512BW-32-NEXT: vpinsrw $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX512BW-32-NEXT: vpinsrw $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -272,7 +272,7 @@ define <32 x i16> @test_buildvector_v32i
; AVX512BW-32-NEXT: retl
;
; AVX512BW-64-LABEL: test_buildvector_v32i16:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512BW-64-NEXT: vpinsrw $1, {{[0-9]+}}(%rsp), %xmm0, %xmm0
; AVX512BW-64-NEXT: vpinsrw $2, {{[0-9]+}}(%rsp), %xmm0, %xmm0
@@ -346,7 +346,7 @@ define <32 x i16> @test_buildvector_v32i
define <64 x i8> @test_buildvector_v64i8(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31, i8 %a32, i8 %a33, i8 %a34, i8 %a35, i8 %a36, i8 %a37, i8 %a38, i8 %a39, i8 %a40, i8 %a41, i8 %a42, i8 %a43, i8 %a44, i8 %a45, i8 %a46, i8 %a47, i8 %a48, i8 %a49, i8 %a50, i8 %a51, i8 %a52, i8 %a53, i8 %a54, i8 %a55, i8 %a56, i8 %a57, i8 %a58, i8 %a59, i8 %a60, i8 %a61, i8 %a62, i8 %a63) {
; AVX512F-32-LABEL: test_buildvector_v64i8:
-; AVX512F-32: # BB#0:
+; AVX512F-32: # %bb.0:
; AVX512F-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512F-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX512F-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -416,7 +416,7 @@ define <64 x i8> @test_buildvector_v64i8
; AVX512F-32-NEXT: retl
;
; AVX512F-64-LABEL: test_buildvector_v64i8:
-; AVX512F-64: # BB#0:
+; AVX512F-64: # %bb.0:
; AVX512F-64-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512F-64-NEXT: vpinsrb $1, {{[0-9]+}}(%rsp), %xmm0, %xmm0
; AVX512F-64-NEXT: vpinsrb $2, {{[0-9]+}}(%rsp), %xmm0, %xmm0
@@ -486,7 +486,7 @@ define <64 x i8> @test_buildvector_v64i8
; AVX512F-64-NEXT: retq
;
; AVX512BW-32-LABEL: test_buildvector_v64i8:
-; AVX512BW-32: # BB#0:
+; AVX512BW-32: # %bb.0:
; AVX512BW-32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512BW-32-NEXT: vpinsrb $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
; AVX512BW-32-NEXT: vpinsrb $2, {{[0-9]+}}(%esp), %xmm0, %xmm0
@@ -557,7 +557,7 @@ define <64 x i8> @test_buildvector_v64i8
; AVX512BW-32-NEXT: retl
;
; AVX512BW-64-LABEL: test_buildvector_v64i8:
-; AVX512BW-64: # BB#0:
+; AVX512BW-64: # %bb.0:
; AVX512BW-64-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX512BW-64-NEXT: vpinsrb $1, {{[0-9]+}}(%rsp), %xmm0, %xmm0
; AVX512BW-64-NEXT: vpinsrb $2, {{[0-9]+}}(%rsp), %xmm0, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/buildvec-insertvec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/buildvec-insertvec.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/buildvec-insertvec.ll (original)
+++ llvm/trunk/test/CodeGen/X86/buildvec-insertvec.ll Mon Dec 4 09:18:51 2017
@@ -4,7 +4,7 @@
define void @foo(<3 x float> %in, <4 x i8>* nocapture %out) nounwind {
; SSE2-LABEL: foo:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: cvttps2dq %xmm0, %xmm0
; SSE2-NEXT: movl $255, %eax
; SSE2-NEXT: movd %eax, %xmm1
@@ -17,7 +17,7 @@ define void @foo(<3 x float> %in, <4 x i
; SSE2-NEXT: retq
;
; SSE41-LABEL: foo:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: cvttps2dq %xmm0, %xmm0
; SSE41-NEXT: movl $255, %eax
; SSE41-NEXT: pinsrd $3, %eax, %xmm0
@@ -36,7 +36,7 @@ define void @foo(<3 x float> %in, <4 x i
define <4 x float> @test_negative_zero_1(<4 x float> %A) {
; SSE2-LABEL: test_negative_zero_1:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movaps %xmm0, %xmm1
; SSE2-NEXT: movhlps {{.*#+}} xmm1 = xmm1[1,1]
; SSE2-NEXT: xorps %xmm2, %xmm2
@@ -47,7 +47,7 @@ define <4 x float> @test_negative_zero_1
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_negative_zero_1:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2],zero
; SSE41-NEXT: retq
entry:
@@ -64,14 +64,14 @@ entry:
define <2 x double> @test_negative_zero_2(<2 x double> %A) {
; SSE2-LABEL: test_negative_zero_2:
-; SSE2: # BB#0: # %entry
+; SSE2: # %bb.0: # %entry
; SSE2-NEXT: movapd {{.*#+}} xmm1 = <u,-0>
; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
; SSE2-NEXT: movapd %xmm1, %xmm0
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_negative_zero_2:
-; SSE41: # BB#0: # %entry
+; SSE41: # %bb.0: # %entry
; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],mem[1]
; SSE41-NEXT: retq
entry:
@@ -83,14 +83,14 @@ entry:
define <4 x float> @test_buildvector_v4f32_register(float %f0, float %f1, float %f2, float %f3) {
; SSE2-LABEL: test_buildvector_v4f32_register:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v4f32_register:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm3[0]
@@ -104,7 +104,7 @@ define <4 x float> @test_buildvector_v4f
define <4 x float> @test_buildvector_v4f32_load(float* %p0, float* %p1, float* %p2, float* %p3) {
; SSE2-LABEL: test_buildvector_v4f32_load:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
@@ -115,7 +115,7 @@ define <4 x float> @test_buildvector_v4f
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v4f32_load:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
@@ -134,7 +134,7 @@ define <4 x float> @test_buildvector_v4f
define <4 x float> @test_buildvector_v4f32_partial_load(float %f0, float %f1, float %f2, float* %p3) {
; SSE2-LABEL: test_buildvector_v4f32_partial_load:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
@@ -142,7 +142,7 @@ define <4 x float> @test_buildvector_v4f
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v4f32_partial_load:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0],xmm0[3]
; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
@@ -157,7 +157,7 @@ define <4 x float> @test_buildvector_v4f
define <4 x i32> @test_buildvector_v4i32_register(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
; SSE2-LABEL: test_buildvector_v4i32_register:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movd %ecx, %xmm0
; SSE2-NEXT: movd %edx, %xmm1
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
@@ -168,7 +168,7 @@ define <4 x i32> @test_buildvector_v4i32
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v4i32_register:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movd %edi, %xmm0
; SSE41-NEXT: pinsrd $1, %esi, %xmm0
; SSE41-NEXT: pinsrd $2, %edx, %xmm0
@@ -183,7 +183,7 @@ define <4 x i32> @test_buildvector_v4i32
define <4 x i32> @test_buildvector_v4i32_partial(i32 %a0, i32 %a3) {
; SSE2-LABEL: test_buildvector_v4i32_partial:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movd %edi, %xmm0
; SSE2-NEXT: movd %esi, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
@@ -191,7 +191,7 @@ define <4 x i32> @test_buildvector_v4i32
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v4i32_partial:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movd %edi, %xmm0
; SSE41-NEXT: pinsrd $3, %esi, %xmm0
; SSE41-NEXT: retq
@@ -204,7 +204,7 @@ define <4 x i32> @test_buildvector_v4i32
define <4 x i32> @test_buildvector_v4i32_register_zero(i32 %a0, i32 %a2, i32 %a3) {
; CHECK-LABEL: test_buildvector_v4i32_register_zero:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movd %edx, %xmm0
; CHECK-NEXT: movd %esi, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
@@ -220,7 +220,7 @@ define <4 x i32> @test_buildvector_v4i32
define <4 x i32> @test_buildvector_v4i32_register_zero_2(i32 %a1, i32 %a2, i32 %a3) {
; CHECK-LABEL: test_buildvector_v4i32_register_zero_2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movd %edx, %xmm0
; CHECK-NEXT: movd %esi, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
@@ -236,7 +236,7 @@ define <4 x i32> @test_buildvector_v4i32
define <8 x i16> @test_buildvector_v8i16_register(i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) {
; SSE2-LABEL: test_buildvector_v8i16_register:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
@@ -255,7 +255,7 @@ define <8 x i16> @test_buildvector_v8i16
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v8i16_register:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movd %edi, %xmm0
; SSE41-NEXT: pinsrw $1, %esi, %xmm0
; SSE41-NEXT: pinsrw $2, %edx, %xmm0
@@ -278,7 +278,7 @@ define <8 x i16> @test_buildvector_v8i16
define <8 x i16> @test_buildvector_v8i16_partial(i16 %a1, i16 %a3, i16 %a4, i16 %a5) {
; CHECK-LABEL: test_buildvector_v8i16_partial:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pxor %xmm0, %xmm0
; CHECK-NEXT: pinsrw $1, %edi, %xmm0
; CHECK-NEXT: pinsrw $3, %esi, %xmm0
@@ -298,7 +298,7 @@ define <8 x i16> @test_buildvector_v8i16
define <8 x i16> @test_buildvector_v8i16_register_zero(i16 %a0, i16 %a3, i16 %a4, i16 %a5) {
; CHECK-LABEL: test_buildvector_v8i16_register_zero:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pxor %xmm0, %xmm0
; CHECK-NEXT: pinsrw $0, %edi, %xmm0
; CHECK-NEXT: pinsrw $3, %esi, %xmm0
@@ -318,7 +318,7 @@ define <8 x i16> @test_buildvector_v8i16
define <8 x i16> @test_buildvector_v8i16_register_zero_2(i16 %a1, i16 %a3, i16 %a4, i16 %a5) {
; CHECK-LABEL: test_buildvector_v8i16_register_zero_2:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pxor %xmm0, %xmm0
; CHECK-NEXT: pinsrw $1, %edi, %xmm0
; CHECK-NEXT: pinsrw $3, %esi, %xmm0
@@ -338,7 +338,7 @@ define <8 x i16> @test_buildvector_v8i16
define <16 x i8> @test_buildvector_v16i8_register(i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15) {
; SSE2-LABEL: test_buildvector_v16i8_register:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
; SSE2-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
@@ -373,7 +373,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v16i8_register:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: movd %edi, %xmm0
; SSE41-NEXT: pinsrb $1, %esi, %xmm0
; SSE41-NEXT: pinsrb $2, %edx, %xmm0
@@ -412,7 +412,7 @@ define <16 x i8> @test_buildvector_v16i8
define <16 x i8> @test_buildvector_v16i8_partial(i8 %a2, i8 %a6, i8 %a8, i8 %a11, i8 %a12, i8 %a15) {
; SSE2-LABEL: test_buildvector_v16i8_partial:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movzbl %dil, %eax
; SSE2-NEXT: pinsrw $1, %eax, %xmm0
; SSE2-NEXT: movzbl %sil, %eax
@@ -428,7 +428,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v16i8_partial:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm0, %xmm0
; SSE41-NEXT: pinsrb $2, %edi, %xmm0
; SSE41-NEXT: pinsrb $6, %esi, %xmm0
@@ -458,7 +458,7 @@ define <16 x i8> @test_buildvector_v16i8
define <16 x i8> @test_buildvector_v16i8_register_zero(i8 %a0, i8 %a4, i8 %a6, i8 %a8, i8 %a11, i8 %a12, i8 %a15) {
; SSE2-LABEL: test_buildvector_v16i8_register_zero:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movzbl %sil, %eax
; SSE2-NEXT: movzbl %dil, %esi
; SSE2-NEXT: movd %esi, %xmm0
@@ -477,7 +477,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v16i8_register_zero:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm0, %xmm0
; SSE41-NEXT: pinsrb $0, %edi, %xmm0
; SSE41-NEXT: pinsrb $4, %esi, %xmm0
@@ -508,7 +508,7 @@ define <16 x i8> @test_buildvector_v16i8
define <16 x i8> @test_buildvector_v16i8_register_zero_2(i8 %a2, i8 %a3, i8 %a6, i8 %a8, i8 %a11, i8 %a12, i8 %a15) {
; SSE2-LABEL: test_buildvector_v16i8_register_zero_2:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: shll $8, %esi
; SSE2-NEXT: movzbl %dil, %eax
; SSE2-NEXT: orl %esi, %eax
@@ -528,7 +528,7 @@ define <16 x i8> @test_buildvector_v16i8
; SSE2-NEXT: retq
;
; SSE41-LABEL: test_buildvector_v16i8_register_zero_2:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm0, %xmm0
; SSE41-NEXT: pinsrb $2, %edi, %xmm0
; SSE41-NEXT: pinsrb $3, %esi, %xmm0
Modified: llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll Mon Dec 4 09:18:51 2017
@@ -4,14 +4,14 @@
define i32 @Test_get_quotient(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: Test_get_quotient:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: orl %ecx, %edx
; CHECK-NEXT: testl $-256, %edx
; CHECK-NEXT: je .LBB0_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: cltd
; CHECK-NEXT: idivl %ecx
; CHECK-NEXT: retl
@@ -27,14 +27,14 @@ define i32 @Test_get_quotient(i32 %a, i3
define i32 @Test_get_remainder(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: Test_get_remainder:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: orl %ecx, %edx
; CHECK-NEXT: testl $-256, %edx
; CHECK-NEXT: je .LBB1_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: cltd
; CHECK-NEXT: idivl %ecx
; CHECK-NEXT: movl %edx, %eax
@@ -51,14 +51,14 @@ define i32 @Test_get_remainder(i32 %a, i
define i32 @Test_get_quotient_and_remainder(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: Test_get_quotient_and_remainder:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: orl %ecx, %edx
; CHECK-NEXT: testl $-256, %edx
; CHECK-NEXT: je .LBB2_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: cltd
; CHECK-NEXT: idivl %ecx
; CHECK-NEXT: addl %edx, %eax
@@ -79,7 +79,7 @@ define i32 @Test_get_quotient_and_remain
define i32 @Test_use_div_and_idiv(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: Test_use_div_and_idiv:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: pushl %esi
@@ -89,7 +89,7 @@ define i32 @Test_use_div_and_idiv(i32 %a
; CHECK-NEXT: orl %ebx, %edi
; CHECK-NEXT: testl $-256, %edi
; CHECK-NEXT: je .LBB3_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: cltd
; CHECK-NEXT: idivl %ebx
@@ -128,7 +128,7 @@ define i32 @Test_use_div_and_idiv(i32 %a
define i32 @Test_use_div_imm_imm() nounwind {
; CHECK-LABEL: Test_use_div_imm_imm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $64, %eax
; CHECK-NEXT: retl
%resultdiv = sdiv i32 256, 4
@@ -137,7 +137,7 @@ define i32 @Test_use_div_imm_imm() nounw
define i32 @Test_use_div_reg_imm(i32 %a) nounwind {
; CHECK-LABEL: Test_use_div_reg_imm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl $1041204193, %eax # imm = 0x3E0F83E1
; CHECK-NEXT: imull {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %edx, %eax
@@ -151,7 +151,7 @@ define i32 @Test_use_div_reg_imm(i32 %a)
define i32 @Test_use_rem_reg_imm(i32 %a) nounwind {
; CHECK-LABEL: Test_use_rem_reg_imm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl $1041204193, %edx # imm = 0x3E0F83E1
; CHECK-NEXT: movl %ecx, %eax
@@ -172,7 +172,7 @@ define i32 @Test_use_rem_reg_imm(i32 %a)
define i32 @Test_use_divrem_reg_imm(i32 %a) nounwind {
; CHECK-LABEL: Test_use_divrem_reg_imm:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl $1041204193, %edx # imm = 0x3E0F83E1
; CHECK-NEXT: movl %ecx, %eax
@@ -196,11 +196,11 @@ define i32 @Test_use_divrem_reg_imm(i32
define i32 @Test_use_div_imm_reg(i32 %a) nounwind {
; CHECK-LABEL: Test_use_div_imm_reg:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: testl $-256, %ecx
; CHECK-NEXT: je .LBB8_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movl $4, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: idivl %ecx
@@ -218,11 +218,11 @@ define i32 @Test_use_div_imm_reg(i32 %a)
define i32 @Test_use_rem_imm_reg(i32 %a) nounwind {
; CHECK-LABEL: Test_use_rem_imm_reg:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: testl $-256, %ecx
; CHECK-NEXT: je .LBB9_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movl $4, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: idivl %ecx
Modified: llvm/trunk/test/CodeGen/X86/bypass-slow-division-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bypass-slow-division-64.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bypass-slow-division-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bypass-slow-division-64.ll Mon Dec 4 09:18:51 2017
@@ -6,12 +6,12 @@
define i64 @Test_get_quotient(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: Test_get_quotient:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: orq %rsi, %rax
; CHECK-NEXT: shrq $32, %rax
; CHECK-NEXT: je .LBB0_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
; CHECK-NEXT: idivq %rsi
@@ -28,12 +28,12 @@ define i64 @Test_get_quotient(i64 %a, i6
define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: Test_get_remainder:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: orq %rsi, %rax
; CHECK-NEXT: shrq $32, %rax
; CHECK-NEXT: je .LBB1_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
; CHECK-NEXT: idivq %rsi
@@ -52,12 +52,12 @@ define i64 @Test_get_remainder(i64 %a, i
define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind {
; CHECK-LABEL: Test_get_quotient_and_remainder:
-; CHECK: # BB#0:
+; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: orq %rsi, %rax
; CHECK-NEXT: shrq $32, %rax
; CHECK-NEXT: je .LBB2_1
-; CHECK-NEXT: # BB#2:
+; CHECK-NEXT: # %bb.2:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: cqto
; CHECK-NEXT: idivq %rsi
Modified: llvm/trunk/test/CodeGen/X86/cast-vsel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cast-vsel.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cast-vsel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cast-vsel.ll Mon Dec 4 09:18:51 2017
@@ -10,7 +10,7 @@
define <8 x i32> @sext(<8 x float> %a, <8 x float> %b, <8 x i16> %c, <8 x i16> %d) {
; SSE2-LABEL: sext:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: cmpltps %xmm3, %xmm1
; SSE2-NEXT: cmpltps %xmm2, %xmm0
; SSE2-NEXT: packssdw %xmm1, %xmm0
@@ -25,7 +25,7 @@ define <8 x i32> @sext(<8 x float> %a, <
; SSE2-NEXT: retq
;
; SSE41-LABEL: sext:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: cmpltps %xmm3, %xmm1
; SSE41-NEXT: cmpltps %xmm2, %xmm0
; SSE41-NEXT: packssdw %xmm1, %xmm0
@@ -36,7 +36,7 @@ define <8 x i32> @sext(<8 x float> %a, <
; SSE41-NEXT: retq
;
; AVX1-LABEL: sext:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vcmpltps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vpmovsxwd %xmm2, %xmm1
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
@@ -50,7 +50,7 @@ define <8 x i32> @sext(<8 x float> %a, <
; AVX1-NEXT: retq
;
; AVX2-LABEL: sext:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vcmpltps %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovsxwd %xmm2, %ymm1
; AVX2-NEXT: vpmovsxwd %xmm3, %ymm2
@@ -64,7 +64,7 @@ define <8 x i32> @sext(<8 x float> %a, <
define <8 x i32> @zext(<8 x float> %a, <8 x float> %b, <8 x i16> %c, <8 x i16> %d) {
; SSE2-LABEL: zext:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: movaps %xmm0, %xmm6
; SSE2-NEXT: cmpltps %xmm3, %xmm1
; SSE2-NEXT: cmpltps %xmm2, %xmm6
@@ -80,7 +80,7 @@ define <8 x i32> @zext(<8 x float> %a, <
; SSE2-NEXT: retq
;
; SSE41-LABEL: zext:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: cmpltps %xmm3, %xmm1
; SSE41-NEXT: cmpltps %xmm2, %xmm0
; SSE41-NEXT: packssdw %xmm1, %xmm0
@@ -91,7 +91,7 @@ define <8 x i32> @zext(<8 x float> %a, <
; SSE41-NEXT: retq
;
; AVX1-LABEL: zext:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vcmpltps %ymm1, %ymm0, %ymm0
; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero
; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
@@ -105,7 +105,7 @@ define <8 x i32> @zext(<8 x float> %a, <
; AVX1-NEXT: retq
;
; AVX2-LABEL: zext:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vcmpltps %ymm1, %ymm0, %ymm0
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero
; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero
@@ -119,7 +119,7 @@ define <8 x i32> @zext(<8 x float> %a, <
define <4 x double> @fpext(<4 x double> %a, <4 x double> %b, <4 x float> %c, <4 x float> %d) {
; SSE2-LABEL: fpext:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: cmpltpd %xmm3, %xmm1
; SSE2-NEXT: cmpltpd %xmm2, %xmm0
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
@@ -133,7 +133,7 @@ define <4 x double> @fpext(<4 x double>
; SSE2-NEXT: retq
;
; SSE41-LABEL: fpext:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: cmpltpd %xmm3, %xmm1
; SSE41-NEXT: cmpltpd %xmm2, %xmm0
; SSE41-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
@@ -144,7 +144,7 @@ define <4 x double> @fpext(<4 x double>
; SSE41-NEXT: retq
;
; AVX-LABEL: fpext:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vcmpltpd %ymm1, %ymm0, %ymm0
; AVX-NEXT: vcvtps2pd %xmm2, %ymm1
; AVX-NEXT: vcvtps2pd %xmm3, %ymm2
@@ -158,7 +158,7 @@ define <4 x double> @fpext(<4 x double>
define <8 x i16> @trunc(<8 x i16> %a, <8 x i16> %b, <8 x i32> %c, <8 x i32> %d) {
; SSE2-LABEL: trunc:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: pcmpeqw %xmm1, %xmm0
; SSE2-NEXT: pslld $16, %xmm5
; SSE2-NEXT: psrad $16, %xmm5
@@ -176,7 +176,7 @@ define <8 x i16> @trunc(<8 x i16> %a, <8
; SSE2-NEXT: retq
;
; SSE41-LABEL: trunc:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: pcmpeqw %xmm1, %xmm0
; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSE41-NEXT: pshufb %xmm1, %xmm3
@@ -190,7 +190,7 @@ define <8 x i16> @trunc(<8 x i16> %a, <8
; SSE41-NEXT: retq
;
; AVX1-LABEL: trunc:
-; AVX1: # BB#0:
+; AVX1: # %bb.0:
; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm1
; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
@@ -206,7 +206,7 @@ define <8 x i16> @trunc(<8 x i16> %a, <8
; AVX1-NEXT: retq
;
; AVX2-LABEL: trunc:
-; AVX2: # BB#0:
+; AVX2: # %bb.0:
; AVX2-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
; AVX2-NEXT: vpshufb %ymm1, %ymm2, %ymm2
@@ -224,7 +224,7 @@ define <8 x i16> @trunc(<8 x i16> %a, <8
define <4 x float> @fptrunc(<4 x float> %a, <4 x float> %b, <4 x double> %c, <4 x double> %d) {
; SSE2-LABEL: fptrunc:
-; SSE2: # BB#0:
+; SSE2: # %bb.0:
; SSE2-NEXT: cmpltps %xmm1, %xmm0
; SSE2-NEXT: cvtpd2ps %xmm5, %xmm1
; SSE2-NEXT: cvtpd2ps %xmm4, %xmm4
@@ -238,7 +238,7 @@ define <4 x float> @fptrunc(<4 x float>
; SSE2-NEXT: retq
;
; SSE41-LABEL: fptrunc:
-; SSE41: # BB#0:
+; SSE41: # %bb.0:
; SSE41-NEXT: cmpltps %xmm1, %xmm0
; SSE41-NEXT: cvtpd2ps %xmm3, %xmm1
; SSE41-NEXT: cvtpd2ps %xmm2, %xmm2
@@ -251,7 +251,7 @@ define <4 x float> @fptrunc(<4 x float>
; SSE41-NEXT: retq
;
; AVX-LABEL: fptrunc:
-; AVX: # BB#0:
+; AVX: # %bb.0:
; AVX-NEXT: vcmpltps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vcvtpd2ps %ymm2, %xmm1
; AVX-NEXT: vcvtpd2ps %ymm3, %xmm2
@@ -276,7 +276,7 @@ define <4 x float> @fptrunc(<4 x float>
define void @example25() nounwind {
; SSE2-LABEL: example25:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movq $-4096, %rax # imm = 0xF000
; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
; SSE2-NEXT: .p2align 4, 0x90
@@ -302,11 +302,11 @@ define void @example25() nounwind {
; SSE2-NEXT: movdqa %xmm1, dj+4096(%rax)
; SSE2-NEXT: addq $32, %rax
; SSE2-NEXT: jne .LBB5_1
-; SSE2-NEXT: # BB#2: # %for.end
+; SSE2-NEXT: # %bb.2: # %for.end
; SSE2-NEXT: retq
;
; SSE41-LABEL: example25:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movq $-4096, %rax # imm = 0xF000
; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
; SSE41-NEXT: .p2align 4, 0x90
@@ -331,11 +331,11 @@ define void @example25() nounwind {
; SSE41-NEXT: movdqa %xmm1, dj+4096(%rax)
; SSE41-NEXT: addq $32, %rax
; SSE41-NEXT: jne .LBB5_1
-; SSE41-NEXT: # BB#2: # %for.end
+; SSE41-NEXT: # %bb.2: # %for.end
; SSE41-NEXT: retq
;
; AVX1-LABEL: example25:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: movq $-4096, %rax # imm = 0xF000
; AVX1-NEXT: vmovaps {{.*#+}} ymm0 = [1,1,1,1,1,1,1,1]
; AVX1-NEXT: .p2align 4, 0x90
@@ -350,12 +350,12 @@ define void @example25() nounwind {
; AVX1-NEXT: vmovups %ymm1, dj+4096(%rax)
; AVX1-NEXT: addq $32, %rax
; AVX1-NEXT: jne .LBB5_1
-; AVX1-NEXT: # BB#2: # %for.end
+; AVX1-NEXT: # %bb.2: # %for.end
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: example25:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: movq $-4096, %rax # imm = 0xF000
; AVX2-NEXT: vbroadcastss {{.*#+}} ymm0 = [1,1,1,1,1,1,1,1]
; AVX2-NEXT: .p2align 4, 0x90
@@ -370,7 +370,7 @@ define void @example25() nounwind {
; AVX2-NEXT: vmovups %ymm1, dj+4096(%rax)
; AVX2-NEXT: addq $32, %rax
; AVX2-NEXT: jne .LBB5_1
-; AVX2-NEXT: # BB#2: # %for.end
+; AVX2-NEXT: # %bb.2: # %for.end
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
vector.ph:
@@ -407,7 +407,7 @@ for.end:
define void @example24(i16 signext %x, i16 signext %y) nounwind {
; SSE2-LABEL: example24:
-; SSE2: # BB#0: # %vector.ph
+; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: movd %edi, %xmm0
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -435,11 +435,11 @@ define void @example24(i16 signext %x, i
; SSE2-NEXT: movdqa %xmm3, dj+4096(%rax)
; SSE2-NEXT: addq $32, %rax
; SSE2-NEXT: jne .LBB6_1
-; SSE2-NEXT: # BB#2: # %for.end
+; SSE2-NEXT: # %bb.2: # %for.end
; SSE2-NEXT: retq
;
; SSE41-LABEL: example24:
-; SSE41: # BB#0: # %vector.ph
+; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movd %edi, %xmm0
; SSE41-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,0,1,1]
@@ -464,11 +464,11 @@ define void @example24(i16 signext %x, i
; SSE41-NEXT: movdqa %xmm0, dj+4112(%rax)
; SSE41-NEXT: addq $32, %rax
; SSE41-NEXT: jne .LBB6_1
-; SSE41-NEXT: # BB#2: # %for.end
+; SSE41-NEXT: # %bb.2: # %for.end
; SSE41-NEXT: retq
;
; AVX1-LABEL: example24:
-; AVX1: # BB#0: # %vector.ph
+; AVX1: # %bb.0: # %vector.ph
; AVX1-NEXT: vmovd %edi, %xmm0
; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
@@ -493,12 +493,12 @@ define void @example24(i16 signext %x, i
; AVX1-NEXT: vmovups %ymm2, dj+4096(%rax)
; AVX1-NEXT: addq $32, %rax
; AVX1-NEXT: jne .LBB6_1
-; AVX1-NEXT: # BB#2: # %for.end
+; AVX1-NEXT: # %bb.2: # %for.end
; AVX1-NEXT: vzeroupper
; AVX1-NEXT: retq
;
; AVX2-LABEL: example24:
-; AVX2: # BB#0: # %vector.ph
+; AVX2: # %bb.0: # %vector.ph
; AVX2-NEXT: vmovd %edi, %xmm0
; AVX2-NEXT: vpbroadcastw %xmm0, %xmm0
; AVX2-NEXT: vmovd %esi, %xmm1
@@ -515,7 +515,7 @@ define void @example24(i16 signext %x, i
; AVX2-NEXT: vmovups %ymm2, dj+4096(%rax)
; AVX2-NEXT: addq $32, %rax
; AVX2-NEXT: jne .LBB6_1
-; AVX2-NEXT: # BB#2: # %for.end
+; AVX2-NEXT: # %bb.2: # %for.end
; AVX2-NEXT: vzeroupper
; AVX2-NEXT: retq
vector.ph:
Modified: llvm/trunk/test/CodeGen/X86/catchpad-weight.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/catchpad-weight.ll?rev=319665&r1=319664&r2=319665&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/catchpad-weight.ll (original)
+++ llvm/trunk/test/CodeGen/X86/catchpad-weight.ll Mon Dec 4 09:18:51 2017
@@ -2,7 +2,7 @@
; Check if the edge weight to the catchpad is calculated correctly.
-; CHECK: Successors according to CFG: BB#2(0x7ffff100 / 0x80000000 = 100.00%) BB#1(0x00000800 / 0x80000000 = 0.00%) BB#3(0x00000400 / 0x80000000 = 0.00%) BB#4(0x00000200 / 0x80000000 = 0.00%) BB#5(0x00000100 / 0x80000000 = 0.00%)
+; CHECK: Successors according to CFG: %bb.2(0x7ffff100 / 0x80000000 = 100.00%) %bb.1(0x00000800 / 0x80000000 = 0.00%) %bb.3(0x00000400 / 0x80000000 = 0.00%) %bb.4(0x00000200 / 0x80000000 = 0.00%) %bb.5(0x00000100 / 0x80000000 = 0.00%)
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64--windows-msvc18.0.0"
More information about the llvm-commits
mailing list