[llvm] r319644 - [AArch64] Allow using emulated tls on platforms other than ELF

Martin Storsjo via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 4 01:09:04 PST 2017


Author: mstorsjo
Date: Mon Dec  4 01:09:04 2017
New Revision: 319644

URL: http://llvm.org/viewvc/llvm-project?rev=319644&view=rev
Log:
[AArch64] Allow using emulated tls on platforms other than ELF

This matches how it is done on X86.

This allows using emulated tls on windows; in MinGW environments,
native tls isn't supported at the moment.

Set the right Data*bitsDirective for windows to match the existing
tests for other platforms. Make parts of the existing tests a regex,
to allow matching .section .rdata for windows, to avoid having to
duplicate the rest of the tests for windows.

Differential Revision: https://reviews.llvm.org/D40770

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
    llvm/trunk/test/CodeGen/AArch64/emutls_generic.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=319644&r1=319643&r2=319644&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Dec  4 01:09:04 2017
@@ -3885,9 +3885,6 @@ AArch64TargetLowering::LowerELFGlobalTLS
 
   TLSModel::Model Model = getTargetMachine().getTLSModel(GA->getGlobal());
 
-  if (DAG.getTarget().Options.EmulatedTLS)
-    return LowerToTLSEmulatedModel(GA, DAG);
-
   if (!EnableAArch64ELFLocalDynamicTLSGeneration) {
     if (Model == TLSModel::LocalDynamic)
       Model = TLSModel::GeneralDynamic;
@@ -3973,6 +3970,10 @@ AArch64TargetLowering::LowerELFGlobalTLS
 
 SDValue AArch64TargetLowering::LowerGlobalTLSAddress(SDValue Op,
                                                      SelectionDAG &DAG) const {
+  const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op);
+  if (DAG.getTarget().Options.EmulatedTLS)
+    return LowerToTLSEmulatedModel(GA, DAG);
+
   if (Subtarget->isTargetDarwin())
     return LowerDarwinGlobalTLSAddress(Op, DAG);
   if (Subtarget->isTargetELF())

Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp?rev=319644&r1=319643&r2=319644&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp Mon Dec  4 01:09:04 2017
@@ -104,6 +104,11 @@ AArch64MCAsmInfoELF::AArch64MCAsmInfoELF
 AArch64MCAsmInfoCOFF::AArch64MCAsmInfoCOFF() {
   PrivateGlobalPrefix = ".L";
   PrivateLabelPrefix = ".L";
+
+  Data16bitsDirective = "\t.hword\t";
+  Data32bitsDirective = "\t.word\t";
+  Data64bitsDirective = "\t.xword\t";
+
   AlignmentIsInBytes = false;
   SupportsDebugInformation = true;
   CodePointerSize = 8;

Modified: llvm/trunk/test/CodeGen/AArch64/emutls_generic.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/emutls_generic.ll?rev=319644&r1=319643&r2=319644&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/emutls_generic.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/emutls_generic.ll Mon Dec  4 01:09:04 2017
@@ -4,6 +4,10 @@
 ; RUN:     | FileCheck -check-prefix=ARM_64 %s
 ; RUN: llc < %s -emulated-tls -mtriple=aarch64-linux-android -O3 \
 ; RUN:     | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -emulated-tls -mtriple=aarch64-windows-gnu -O3 \
+; RUN:     | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -emulated-tls -mtriple=aarch64-apple-darwin -O3 \
+; RUN:     | FileCheck -check-prefix=DARWIN %s
 
 ; Make sure that TLS symbols are emitted in expected order.
 
@@ -46,7 +50,7 @@ entry:
 ; ARM_64-NEXT:   .xword 0
 ; ARM_64-NEXT:   .xword __emutls_t.external_y
 ; ARM_64-NOT:    __emutls_v.external_x:
-; ARM_64:        .section .rodata,
+; ARM_64:        .section .r{{o?}}data,
 ; ARM_64-LABEL:  __emutls_t.external_y:
 ; ARM_64-NEXT:   .byte 7
 ; ARM_64:        .data{{$}}
@@ -57,6 +61,41 @@ entry:
 ; ARM_64-NEXT:   .xword 16
 ; ARM_64-NEXT:   .xword 0
 ; ARM_64-NEXT:   .xword __emutls_t.internal_y
-; ARM_64:        .section .rodata,
+; ARM_64:        .section .r{{o?}}data,
 ; ARM_64-LABEL:  __emutls_t.internal_y:
 ; ARM_64-NEXT:   .xword 9
+
+; DARWIN-LABEL:  _get_external_x:
+; DARWIN:        ___emutls_v.external_x
+; DARWIN:        ___emutls_get_address
+; DARWIN-LABEL:  _get_external_y:
+; DARWIN:        ___emutls_v.external_y
+; DARWIN:        ___emutls_get_address
+; DARWIN-LABEL:  _get_internal_y:
+; DARWIN:        ___emutls_v.internal_y
+; DARWIN:        ___emutls_get_address
+; DARWIN-NOT:    ___emutls_t.external_x
+; DARWIN-NOT:    ___emutls_v.external_x:
+; DARWIN:        .section __DATA,__data
+; DARWIN:        .globl ___emutls_v.external_y
+; DARWIN:        .p2align 3
+; DARWIN-LABEL:  ___emutls_v.external_y:
+; DARWIN-NEXT:   .quad 1
+; DARWIN-NEXT:   .quad 2
+; DARWIN-NEXT:   .quad 0
+; DARWIN-NEXT:   .quad ___emutls_t.external_y
+; DARWIN-NOT:    ___emutls_v.external_x:
+; DARWIN:        .section __TEXT,__const
+; DARWIN-LABEL:  ___emutls_t.external_y:
+; DARWIN-NEXT:   .byte 7
+; DARWIN:        .section __DATA,__data
+; DARWIN-NOT:    .globl ___emutls_v
+; DARWIN:        .p2align 3
+; DARWIN-LABEL:  ___emutls_v.internal_y:
+; DARWIN-NEXT:   .quad 8
+; DARWIN-NEXT:   .quad 16
+; DARWIN-NEXT:   .quad 0
+; DARWIN-NEXT:   .quad ___emutls_t.internal_y
+; DARWIN:        .section __TEXT,__const
+; DARWIN-LABEL:  ___emutls_t.internal_y:
+; DARWIN-NEXT:   .quad 9




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