[PATCH] D40770: [AArch64] Allow using emulated tls on platforms other than ELF
Martin Storsjö via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 2 13:31:55 PST 2017
mstorsjo created this revision.
Herald added subscribers: kristof.beyls, javed.absar, rengolin, aemerson.
This matches how it is done on X86.
This allows using emulated tls on windows; in MinGW environments, native tls isn't supported at the moment.
Set the right Data*bitsDirective to match the existing tests for other platforms. Make parts of the existing tests a regex, to allow matching .section .rdata for windows, to avoid having to duplicate the rest of the tests.
https://reviews.llvm.org/D40770
Files:
lib/Target/AArch64/AArch64ISelLowering.cpp
lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
test/CodeGen/AArch64/emutls_generic.ll
Index: test/CodeGen/AArch64/emutls_generic.ll
===================================================================
--- test/CodeGen/AArch64/emutls_generic.ll
+++ test/CodeGen/AArch64/emutls_generic.ll
@@ -4,6 +4,8 @@
; RUN: | FileCheck -check-prefix=ARM_64 %s
; RUN: llc < %s -emulated-tls -mtriple=aarch64-linux-android -O3 \
; RUN: | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -emulated-tls -mtriple=aarch64-windows-gnu -O3 \
+; RUN: | FileCheck -check-prefix=ARM_64 %s
; Make sure that TLS symbols are emitted in expected order.
@@ -46,7 +48,7 @@
; ARM_64-NEXT: .xword 0
; ARM_64-NEXT: .xword __emutls_t.external_y
; ARM_64-NOT: __emutls_v.external_x:
-; ARM_64: .section .rodata,
+; ARM_64: .section .r{{o?}}data,
; ARM_64-LABEL: __emutls_t.external_y:
; ARM_64-NEXT: .byte 7
; ARM_64: .data{{$}}
@@ -57,6 +59,6 @@
; ARM_64-NEXT: .xword 16
; ARM_64-NEXT: .xword 0
; ARM_64-NEXT: .xword __emutls_t.internal_y
-; ARM_64: .section .rodata,
+; ARM_64: .section .r{{o?}}data,
; ARM_64-LABEL: __emutls_t.internal_y:
; ARM_64-NEXT: .xword 9
Index: lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
===================================================================
--- lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
+++ lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
@@ -104,6 +104,11 @@
AArch64MCAsmInfoCOFF::AArch64MCAsmInfoCOFF() {
PrivateGlobalPrefix = ".L";
PrivateLabelPrefix = ".L";
+
+ Data16bitsDirective = "\t.hword\t";
+ Data32bitsDirective = "\t.word\t";
+ Data64bitsDirective = "\t.xword\t";
+
AlignmentIsInBytes = false;
SupportsDebugInformation = true;
CodePointerSize = 8;
Index: lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- lib/Target/AArch64/AArch64ISelLowering.cpp
+++ lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3890,9 +3890,6 @@
TLSModel::Model Model = getTargetMachine().getTLSModel(GA->getGlobal());
- if (DAG.getTarget().Options.EmulatedTLS)
- return LowerToTLSEmulatedModel(GA, DAG);
-
if (!EnableAArch64ELFLocalDynamicTLSGeneration) {
if (Model == TLSModel::LocalDynamic)
Model = TLSModel::GeneralDynamic;
@@ -4026,6 +4023,10 @@
SDValue AArch64TargetLowering::LowerGlobalTLSAddress(SDValue Op,
SelectionDAG &DAG) const {
+ const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op);
+ if (DAG.getTarget().Options.EmulatedTLS)
+ return LowerToTLSEmulatedModel(GA, DAG);
+
if (Subtarget->isTargetDarwin())
return LowerDarwinGlobalTLSAddress(Op, DAG);
if (Subtarget->isTargetELF())
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