[llvm] r319573 - [DAGCombine] Simplify ISD::AND handling in ReduceLoadWidth
Eli Friedman via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 1 11:33:56 PST 2017
Author: efriedma
Date: Fri Dec 1 11:33:56 2017
New Revision: 319573
URL: http://llvm.org/viewvc/llvm-project?rev=319573&view=rev
Log:
[DAGCombine] Simplify ISD::AND handling in ReduceLoadWidth
Followup to D39595. Removes a bunch of redundant checks.
Differential Revision: https://reviews.llvm.org/D40667
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=319573&r1=319572&r2=319573&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Dec 1 11:33:56 2017
@@ -8019,29 +8019,14 @@ SDValue DAGCombiner::ReduceLoadWidth(SDN
ExtVT = EVT::getIntegerVT(*DAG.getContext(),
VT.getSizeInBits() - ShiftAmt);
} else if (Opc == ISD::AND) {
- bool HasAnyExt = N0.getOpcode() == ISD::ANY_EXTEND;
- LoadSDNode *LN0 =
- HasAnyExt ? cast<LoadSDNode>(N0.getOperand(0)) : cast<LoadSDNode>(N0);
-
- if (LN0->getExtensionType() == ISD::SEXTLOAD ||
- !LN0->isUnindexed() || !N0.hasOneUse() || !SDValue(LN0, 0).hasOneUse())
- return SDValue();
-
- auto N1C = dyn_cast<ConstantSDNode>(N->getOperand(1));
- if (!N1C)
+ // An AND with a constant mask is the same as a truncate + zero-extend.
+ auto AndC = dyn_cast<ConstantSDNode>(N->getOperand(1));
+ if (!AndC || !AndC->getAPIntValue().isMask())
return SDValue();
- EVT LoadedVT;
- bool NarrowLoad = false;
+ unsigned ActiveBits = AndC->getAPIntValue().countTrailingOnes();
ExtType = ISD::ZEXTLOAD;
- VT = HasAnyExt ? LN0->getValueType(0) : VT;
- if (!isAndLoadExtLoad(N1C, LN0, VT, ExtVT, LoadedVT, NarrowLoad))
- return SDValue();
-
- if (!NarrowLoad)
- return DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(LN0), VT,
- LN0->getChain(), LN0->getBasePtr(), ExtVT,
- LN0->getMemOperand());
+ ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);
}
if (LegalOperations && !TLI.isLoadExtLegal(ExtType, VT, ExtVT))
return SDValue();
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