[PATCH] D40098: [AMDGPU] Improve hazard checks for inline asm statements

[Mark Searles via Phabricator via llvm-commits]

msearles marked 2 inline comments as done.
msearles added inline comments.


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Comment at: lib/Target/AMDGPU/GCNHazardRecognizer.cpp:519
 
+int GCNHazardRecognizer::checkVALUHazardsHelper(const MachineOperand &Def, const MachineRegisterInfo &MRI) {
+  // Helper to check for the hazard where VMEM instructions that store more than
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arsenm wrote:
> This looks like it goes over 80 lines
Fixed


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Comment at: lib/Target/AMDGPU/GCNHazardRecognizer.cpp:548
 
-  const SIRegisterInfo *TRI = ST.getRegisterInfo();
   const MachineRegisterInfo &MRI = VALU->getParent()->getParent()->getRegInfo();
   int WaitStatesNeeded = 0;
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arsenm wrote:
> MF.getRegInfo()
Fixed this instance as well as a few others.


https://reviews.llvm.org/D40098