[PATCH] D40098: [AMDGPU] Improve hazard checks for inline asm statements

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.

LGTM with formatting fixed



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Comment at: lib/Target/AMDGPU/GCNHazardRecognizer.cpp:519
 
+int GCNHazardRecognizer::checkVALUHazardsHelper(const MachineOperand &Def, const MachineRegisterInfo &MRI) {
+  // Helper to check for the hazard where VMEM instructions that store more than
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This looks like it goes over 80 lines


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Comment at: lib/Target/AMDGPU/GCNHazardRecognizer.cpp:548
 
-  const SIRegisterInfo *TRI = ST.getRegisterInfo();
   const MachineRegisterInfo &MRI = VALU->getParent()->getParent()->getRegInfo();
   int WaitStatesNeeded = 0;
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MF.getRegInfo()


https://reviews.llvm.org/D40098