[PATCH] D33675: [DAG] Do MergeConsecutiveStores again before Instruction Selection

[Evgeny Astigeevich via Phabricator via llvm-commits]

eastig added a comment.

A reproducer:
F5625162: test.ll <https://reviews.llvm.org/F5625162>

  $ cat test.ll
  ...
    %v304 = getelementptr inbounds i8, i8* %v50, i32 508
    store i8 -4, i8* %v304, align 1
    %v305 = getelementptr inbounds i8, i8* %v50, i32 509
    store i8 -3, i8* %v305, align 1
    %v306 = getelementptr inbounds i8, i8* %v50, i32 510
    store i8 -2, i8* %v306, align 1
    %v307 = getelementptr inbounds i8, i8* %v50, i32 511
    store i8 -1, i8* %v307, align 1
  ...
  $ llc -O3 -filetype=asm -o test.s test.ll
  $ cat test.s
  ...
          movs    r1, #251
          strb.w  r1, [r0, #507]
          mvn     r1, #3 <========= HERE the problem: -4, -1, -1, -1 is written instead of -4, -3, -2, -1
          str.w   r1, [r0, #508]
          bx      lr
  .Lfunc_end0:
          .size   test, .Lfunc_end0-test
          .cantunwind
          .fnend
  ...


Repository:
  rL LLVM

https://reviews.llvm.org/D33675