[llvm] r319447 - [MIR] Fix DebugInfo tests after r319445
Francis Visoiu Mistrih via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 30 08:48:53 PST 2017
Author: thegameg
Date: Thu Nov 30 08:48:53 2017
New Revision: 319447
URL: http://llvm.org/viewvc/llvm-project?rev=319447&view=rev
Log:
[MIR] Fix DebugInfo tests after r319445
Modified:
llvm/trunk/test/DebugInfo/ARM/sdag-split-arg1.ll
llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir
llvm/trunk/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
llvm/trunk/test/DebugInfo/MIR/X86/mlicm-hoist.mir
llvm/trunk/test/DebugInfo/MSP430/sdagsplit-1.ll
llvm/trunk/test/DebugInfo/X86/bbjoin.ll
llvm/trunk/test/DebugInfo/X86/sdag-salvage-add.ll
llvm/trunk/test/DebugInfo/X86/sdagsplit-1.ll
Modified: llvm/trunk/test/DebugInfo/ARM/sdag-split-arg1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/sdag-split-arg1.ll?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/ARM/sdag-split-arg1.ll (original)
+++ llvm/trunk/test/DebugInfo/ARM/sdag-split-arg1.ll Thu Nov 30 08:48:53 2017
@@ -7,7 +7,7 @@ entry:
%0 = bitcast double %a to i64
%extract.t84 = trunc i64 %0 to i32
tail call void @llvm.dbg.value(metadata i32 %extract.t84, metadata !8, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !12
- ; CHECK: DBG_VALUE debug-use %r0, debug-use _, !6, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
+ ; CHECK: DBG_VALUE debug-use %r0, debug-use %noreg, !6, !DIExpression(DW_OP_LLVM_fragment, 0, 32)
%r.sroa.0.0.insert.ext35 = zext i32 %extract.t84 to i64
ret i64 %r.sroa.0.0.insert.ext35
}
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-3preds.mir Thu Nov 30 08:48:53 2017
@@ -31,9 +31,9 @@
# DBG_VALUE for variables "x", "y" and "z" are extended into BB#9 from its
# predecessors BB#0, BB#2 and BB#8.
# CHECK: bb.9.for.end:
-# CHECK-DAG: DBG_VALUE debug-use %edi, debug-use _, ![[X_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
-# CHECK-DAG: DBG_VALUE debug-use %esi, debug-use _, ![[Y_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
-# CHECK-DAG: DBG_VALUE debug-use %edx, debug-use _, ![[Z_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-DAG: DBG_VALUE debug-use %edi, debug-use %noreg, ![[X_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-DAG: DBG_VALUE debug-use %esi, debug-use %noreg, ![[Y_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK-DAG: DBG_VALUE debug-use %edx, debug-use %noreg, ![[Z_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
# CHECK: RET
--- |
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-spill.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-spill.mir?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-spill.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values-spill.mir Thu Nov 30 08:48:53 2017
@@ -52,11 +52,11 @@
# GENERATE: ![[INTD:[0-9]+]] = !DILocalVariable(name: "intd",{{.*}})
#
# GENERATE: bb.1.if.end:
-# GENERATE: MOV32mr %rbp, 1, _, -48, _, killed %edx :: (store 4 into %stack.5)
+# GENERATE: MOV32mr %rbp, 1, %noreg, -48, %noreg, killed %edx :: (store 4 into %stack.5)
# GENERATE-NEXT: DBG_VALUE debug-use %rbp, 0, ![[INT0]], !DIExpression(DW_OP_constu, 48, DW_OP_minus)
-# GENERATE: MOV32mr %rbp, 1, _, -52, _, killed %r8d :: (store 4 into %stack.4)
+# GENERATE: MOV32mr %rbp, 1, %noreg, -52, %noreg, killed %r8d :: (store 4 into %stack.4)
# GENERATE-NEXT: DBG_VALUE debug-use %rbp, 0, ![[INTB]], !DIExpression(DW_OP_constu, 52, DW_OP_minus)
-# GENERATE: MOV32mr %rbp, 1, _, -56, _, killed %esi :: (store 4 into %stack.3)
+# GENERATE: MOV32mr %rbp, 1, %noreg, -56, %noreg, killed %esi :: (store 4 into %stack.3)
# GENERATE-NEXT: DBG_VALUE debug-use %rbp, 0, ![[INTD]], !DIExpression(DW_OP_constu, 56, DW_OP_minus)
#
# Check that the spill locations that are valid at the end of bb.1.if.end are
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-values.mir Thu Nov 30 08:48:53 2017
@@ -35,7 +35,7 @@
# CHECK: ![[N_VAR:[0-9]+]] = !DILocalVariable(name: "n",{{.*}})
#
# CHECK: bb.5.if.end.7:
-# CHECK: DBG_VALUE debug-use %ebx, debug-use _, ![[N_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
+# CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[N_VAR]], !DIExpression(), debug-location !{{[0-9]+}}
--- |
Modified: llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/live-debug-vars-unused-arg.mir Thu Nov 30 08:48:53 2017
@@ -150,9 +150,9 @@ body: |
# CHECKMIR: ![[ARGV:[0-9]+]] = !DILocalVariable(name: "argv", arg: 2
# CHECKMIR: name: main
# CHECKMIR: body:
-# CHECKMIR: DBG_VALUE debug-use %edi, debug-use _, ![[ARGC]]
-# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use _, ![[ARGC]]
-# CHECKMIR: DBG_VALUE debug-use %rsi, debug-use _, ![[ARGV]]
-# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use _, ![[ARGC]]
-# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use _, ![[ARGV]]
+# CHECKMIR: DBG_VALUE debug-use %edi, debug-use %noreg, ![[ARGC]]
+# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use %noreg, ![[ARGC]]
+# CHECKMIR: DBG_VALUE debug-use %rsi, debug-use %noreg, ![[ARGV]]
+# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use %noreg, ![[ARGC]]
+# CHECKMIR-NOT: DBG_VALUE debug-use %{{.*}}, debug-use %noreg, ![[ARGV]]
Modified: llvm/trunk/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/livedebugvalues-limit.mir Thu Nov 30 08:48:53 2017
@@ -25,13 +25,13 @@
; CHECK: ![[CS3]] = distinct !DILocation(line: 8, column: 3, scope: !{{[0-9]+}})
;
; CHECK: bb.1.if.then:
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use _, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
- ; CHECK-NOT: DBG_VALUE debug-use %ebx, debug-use _, ![[A_VAR]], !DIExpression(), debug-location
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use _, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS2]]
+ ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
+ ; CHECK-NOT: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location
+ ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS2]]
; CHECK: bb.2.if.end:
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use _, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
- ; CHECK-NOT: DBG_VALUE debug-use %ebx, debug-use _, ![[A_VAR]], !DIExpression(), debug-location
- ; CHECK: DBG_VALUE debug-use %ebx, debug-use _, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS3]]
+ ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[I_VAR]], !DIExpression(), debug-location ![[I_LOC]]
+ ; CHECK-NOT: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location
+ ; CHECK: DBG_VALUE debug-use %ebx, debug-use %noreg, ![[A_VAR]], !DIExpression(), debug-location ![[INLCS3]]
;
; ModuleID = 'livedebugvalues-limit.ll'
source_filename = "livedebugvalues-limit.c"
Modified: llvm/trunk/test/DebugInfo/MIR/X86/mlicm-hoist.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MIR/X86/mlicm-hoist.mir?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MIR/X86/mlicm-hoist.mir (original)
+++ llvm/trunk/test/DebugInfo/MIR/X86/mlicm-hoist.mir Thu Nov 30 08:48:53 2017
@@ -18,7 +18,7 @@
; out of a loop the debug information is not retained.
;
; CHECK-LABEL: bb.0.entry:
- ; CHECK: MOV64rm %rip, 1, _, target-flags(x86-gotpcrel) @x, _ :: (load 8 from got)
+ ; CHECK: MOV64rm %rip, 1, %noreg, target-flags(x86-gotpcrel) @x, %noreg :: (load 8 from got)
; CHECK-LABEL: bb.1.while.body:
;
; ModuleID = 'tx.ll'
Modified: llvm/trunk/test/DebugInfo/MSP430/sdagsplit-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/MSP430/sdagsplit-1.ll?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/MSP430/sdagsplit-1.ll (original)
+++ llvm/trunk/test/DebugInfo/MSP430/sdagsplit-1.ll Thu Nov 30 08:48:53 2017
@@ -13,10 +13,10 @@
; return 0;
; }
;
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use _, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 16), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use _, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 48, 16), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use _, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 16), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use _, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 16, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 48, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 16), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use %r{{[0-9]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 16, 16), debug-location !{{[0-9]+}}
; ModuleID = 'sdagsplit-1.c'
target datalayout = "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16"
Modified: llvm/trunk/test/DebugInfo/X86/bbjoin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/bbjoin.ll?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/bbjoin.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/bbjoin.ll Thu Nov 30 08:48:53 2017
@@ -11,12 +11,12 @@
; }
; CHECK: ![[X:.*]] = !DILocalVariable(name: "x",
; CHECK: bb.0.entry:
-; CHECK: DBG_VALUE 23, debug-use _, ![[X]],
+; CHECK: DBG_VALUE 23, debug-use %noreg, ![[X]],
; CHECK: DBG_VALUE %rsp, 0, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref),
; CHECK: bb.1.if.then:
-; CHECK: DBG_VALUE 43, debug-use _, ![[X]],
+; CHECK: DBG_VALUE 43, debug-use %noreg, ![[X]],
; CHECK: bb.2.if.end:
-; CHECK-NOT: DBG_VALUE 23, debug-use _, ![[X]],
+; CHECK-NOT: DBG_VALUE 23, debug-use %noreg, ![[X]],
; CHECK: RETQ %eax
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
Modified: llvm/trunk/test/DebugInfo/X86/sdag-salvage-add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sdag-salvage-add.ll?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/sdag-salvage-add.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/sdag-salvage-add.ll Thu Nov 30 08:48:53 2017
@@ -24,11 +24,11 @@
;
; CHECK: ![[S4:.*]] = !DILocalVariable(name: "s4",
; CHECK: ![[MYVAR:.*]] = !DILocalVariable(name: "myVar",
-; CHECK: DBG_VALUE debug-use %rax, debug-use _, ![[MYVAR]],
+; CHECK: DBG_VALUE debug-use %rax, debug-use %noreg, ![[MYVAR]],
; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
-; CHECK-NEXT: DBG_VALUE debug-use %rax, debug-use _, ![[S4]],
+; CHECK-NEXT: DBG_VALUE debug-use %rax, debug-use %noreg, ![[S4]],
; CHECK-SAME: !DIExpression(DW_OP_plus_uconst, 4096, DW_OP_stack_value)
-; CHECK-NEXT: %rdi = MOV64rm killed %rax, 1, _, 4096, _,
+; CHECK-NEXT: %rdi = MOV64rm killed %rax, 1, %noreg, 4096, %noreg,
source_filename = "test.c"
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
Modified: llvm/trunk/test/DebugInfo/X86/sdagsplit-1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sdagsplit-1.ll?rev=319447&r1=319446&r2=319447&view=diff
==============================================================================
--- llvm/trunk/test/DebugInfo/X86/sdagsplit-1.ll (original)
+++ llvm/trunk/test/DebugInfo/X86/sdagsplit-1.ll Thu Nov 30 08:48:53 2017
@@ -13,8 +13,8 @@
; return 0;
; }
;
-; CHECK-DAG: DBG_VALUE debug-use %{{[a-z]+}}, debug-use _, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !{{[0-9]+}}
-; CHECK-DAG: DBG_VALUE debug-use %{{[a-z]+}}, debug-use _, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use %{{[a-z]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !{{[0-9]+}}
+; CHECK-DAG: DBG_VALUE debug-use %{{[a-z]+}}, debug-use %noreg, !{{[0-9]+}}, !DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !{{[0-9]+}}
; ModuleID = 'sdagsplit-1.c'
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
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