[PATCH] D40604: [GlobalISel][IRTranslator] Fix crash during translation of zero sized loads and stores
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 30 06:23:32 PST 2017
aemerson updated this revision to Diff 124929.
aemerson edited the summary of this revision.
aemerson added a comment.
Updated patch with additional checking for zero sized arguments and returns.
Repository:
rL LLVM
https://reviews.llvm.org/D40604
Files:
lib/CodeGen/GlobalISel/IRTranslator.cpp
lib/Target/AArch64/AArch64CallLowering.cpp
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
Index: test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
===================================================================
--- test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -1636,3 +1636,16 @@
}
declare i64 @llvm.aarch64.ldxr.p0i32(i32*) nounwind
+
+%zerosize_type = type {}
+
+define %zerosize_type @test_empty_load_store(%zerosize_type *%ptr, %zerosize_type %in) noinline optnone {
+; CHECK-LABEL: name: test_empty_load_store
+; CHECK-NOT: G_STORE
+; CHECK-NOT: G_LOAD
+; CHECK: RET_ReallyLR
+entry:
+ store %zerosize_type undef, %zerosize_type* undef, align 4
+ %val = load %zerosize_type, %zerosize_type* %ptr, align 4
+ ret %zerosize_type %in
+}
Index: lib/Target/AArch64/AArch64CallLowering.cpp
===================================================================
--- lib/Target/AArch64/AArch64CallLowering.cpp
+++ lib/Target/AArch64/AArch64CallLowering.cpp
@@ -259,6 +259,8 @@
SmallVector<ArgInfo, 8> SplitArgs;
unsigned i = 0;
for (auto &Arg : F.args()) {
+ if (DL.getTypeStoreSize(Arg.getType()) == 0)
+ continue;
ArgInfo OrigArg{VRegs[i], Arg.getType()};
setArgFlags(OrigArg, i + AttributeList::FirstArgIndex, DL, F);
bool Split = false;
Index: lib/CodeGen/GlobalISel/IRTranslator.cpp
===================================================================
--- lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -238,6 +238,8 @@
bool IRTranslator::translateRet(const User &U, MachineIRBuilder &MIRBuilder) {
const ReturnInst &RI = cast<ReturnInst>(U);
const Value *Ret = RI.getReturnValue();
+ if (Ret && DL->getTypeStoreSize(Ret->getType()) == 0)
+ Ret = nullptr;
// The target may mess up with the insertion point, but
// this is not important as a return is the last instruction
// of the block anyway.
@@ -337,6 +339,9 @@
: MachineMemOperand::MONone;
Flags |= MachineMemOperand::MOLoad;
+ if (DL->getTypeStoreSize(LI.getType()) == 0)
+ return true;
+
unsigned Res = getOrCreateVReg(LI);
unsigned Addr = getOrCreateVReg(*LI.getPointerOperand());
@@ -355,6 +360,9 @@
: MachineMemOperand::MONone;
Flags |= MachineMemOperand::MOStore;
+ if (DL->getTypeStoreSize(SI.getValueOperand()->getType()) == 0)
+ return true;
+
unsigned Val = getOrCreateVReg(*SI.getValueOperand());
unsigned Addr = getOrCreateVReg(*SI.getPointerOperand());
@@ -1269,8 +1277,11 @@
// Lower the actual args into this basic block.
SmallVector<unsigned, 8> VRegArgs;
- for (const Argument &Arg: F.args())
+ for (const Argument &Arg: F.args()) {
+ if (DL->getTypeStoreSize(Arg.getType()) == 0)
+ continue; // Don't handle zero sized types.
VRegArgs.push_back(getOrCreateVReg(Arg));
+ }
if (!CLI->lowerFormalArguments(EntryBuilder, F, VRegArgs)) {
OptimizationRemarkMissed R("gisel-irtranslator", "GISelFailure",
MF->getFunction()->getSubprogram(),
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