[llvm] r319381 - First step towards more human-friendly PPC assembler output:
Joerg Sonnenberger via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 29 15:05:56 PST 2017
Author: joerg
Date: Wed Nov 29 15:05:56 2017
New Revision: 319381
URL: http://llvm.org/viewvc/llvm-project?rev=319381&view=rev
Log:
First step towards more human-friendly PPC assembler output:
- add -ppc-reg-with-percent-prefix option to use %r3 etc as register
names
- split off logic for Darwinish verbose conditional codes into a helper
function
- be explicit about Darwin vs AIX vs GNUish assembler flavors
Based on the patch from Alexandre Yukio Yamashita
Differential Revision: https://reviews.llvm.org/D39016
Modified:
llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/trunk/test/CodeGen/PowerPC/reg-names.ll
Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp?rev=319381&r1=319380&r2=319381&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp Wed Nov 29 15:05:56 2017
@@ -39,6 +39,12 @@ static cl::opt<bool>
ShowVSRNumsAsVR("ppc-vsr-nums-as-vr", cl::Hidden, cl::init(false),
cl::desc("Prints full register names with vs{31-63} as v{0-31}"));
+// Prints full register names with percent symbol.
+static cl::opt<bool>
+FullRegNamesWithPercent("ppc-reg-with-percent-prefix", cl::Hidden,
+ cl::init(false),
+ cl::desc("Prints full register names with percent"));
+
#define PRINT_ALIAS_INSTR
#include "PPCGenAsmWriter.inc"
@@ -445,28 +451,57 @@ void PPCInstPrinter::printTLSCall(const
O << '@' << MCSymbolRefExpr::getVariantKindName(refExp.getKind());
}
+/// showRegistersWithPercentPrefix - Check if this register name should be
+/// printed with a percentage symbol as prefix.
+bool PPCInstPrinter::showRegistersWithPercentPrefix(const char *RegName) const {
+ if (!FullRegNamesWithPercent || TT.isOSDarwin() || TT.getOS() == Triple::AIX)
+ return false;
-/// stripRegisterPrefix - This method strips the character prefix from a
-/// register name so that only the number is left. Used by for linux asm.
-static const char *stripRegisterPrefix(const char *RegName, unsigned RegNum,
- unsigned RegEncoding) {
- if (FullRegNames) {
- if (RegNum >= PPC::CR0EQ && RegNum <= PPC::CR7UN) {
- const char *CRBits[] =
- { "lt", "gt", "eq", "un",
- "4*cr1+lt", "4*cr1+gt", "4*cr1+eq", "4*cr1+un",
- "4*cr2+lt", "4*cr2+gt", "4*cr2+eq", "4*cr2+un",
- "4*cr3+lt", "4*cr3+gt", "4*cr3+eq", "4*cr3+un",
- "4*cr4+lt", "4*cr4+gt", "4*cr4+eq", "4*cr4+un",
- "4*cr5+lt", "4*cr5+gt", "4*cr5+eq", "4*cr5+un",
- "4*cr6+lt", "4*cr6+gt", "4*cr6+eq", "4*cr6+un",
- "4*cr7+lt", "4*cr7+gt", "4*cr7+eq", "4*cr7+un"
- };
- return CRBits[RegEncoding];
- }
- return RegName;
+ switch (RegName[0]) {
+ default:
+ return false;
+ case 'r':
+ case 'f':
+ case 'q':
+ case 'v':
+ case 'c':
+ return true;
}
+}
+/// getVerboseConditionalRegName - This method expands the condition register
+/// when requested explicitly or targetting Darwin.
+const char *PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum,
+ unsigned RegEncoding)
+ const {
+ if (!TT.isOSDarwin() && !FullRegNames)
+ return nullptr;
+ if (RegNum < PPC::CR0EQ || RegNum > PPC::CR7UN)
+ return nullptr;
+ const char *CRBits[] = {
+ "lt", "gt", "eq", "un",
+ "4*cr1+lt", "4*cr1+gt", "4*cr1+eq", "4*cr1+un",
+ "4*cr2+lt", "4*cr2+gt", "4*cr2+eq", "4*cr2+un",
+ "4*cr3+lt", "4*cr3+gt", "4*cr3+eq", "4*cr3+un",
+ "4*cr4+lt", "4*cr4+gt", "4*cr4+eq", "4*cr4+un",
+ "4*cr5+lt", "4*cr5+gt", "4*cr5+eq", "4*cr5+un",
+ "4*cr6+lt", "4*cr6+gt", "4*cr6+eq", "4*cr6+un",
+ "4*cr7+lt", "4*cr7+gt", "4*cr7+eq", "4*cr7+un"
+ };
+ return CRBits[RegEncoding];
+}
+
+// showRegistersWithPrefix - This method determines whether registers
+// should be number-only or include the prefix.
+bool PPCInstPrinter::showRegistersWithPrefix() const {
+ if (TT.getOS() == Triple::AIX)
+ return false;
+ return TT.isOSDarwin() || FullRegNamesWithPercent || FullRegNames;
+}
+
+/// stripRegisterPrefix - This method strips the character prefix from a
+/// register name so that only the number is left.
+static const char *stripRegisterPrefix(const char *RegName) {
switch (RegName[0]) {
case 'r':
case 'f':
@@ -502,10 +537,14 @@ void PPCInstPrinter::printOperand(const
Reg = PPC::VSX32 + (Reg - PPC::VF0);
}
- const char *RegName = getRegisterName(Reg);
- // The linux and AIX assembler does not take register prefixes.
- if (!isDarwinSyntax())
- RegName = stripRegisterPrefix(RegName, Reg, MRI.getEncodingValue(Reg));
+ const char *RegName;
+ RegName = getVerboseConditionRegName(Reg, MRI.getEncodingValue(Reg));
+ if (RegName == nullptr)
+ RegName = getRegisterName(Reg);
+ if (showRegistersWithPercentPrefix(RegName))
+ O << "%";
+ if (!showRegistersWithPrefix())
+ RegName = stripRegisterPrefix(RegName);
O << RegName;
return;
Modified: llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h?rev=319381&r1=319380&r2=319381&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h (original)
+++ llvm/trunk/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.h Wed Nov 29 15:05:56 2017
@@ -14,21 +14,24 @@
#ifndef LLVM_LIB_TARGET_POWERPC_INSTPRINTER_PPCINSTPRINTER_H
#define LLVM_LIB_TARGET_POWERPC_INSTPRINTER_PPCINSTPRINTER_H
+#include "llvm/ADT/Triple.h"
#include "llvm/MC/MCInstPrinter.h"
namespace llvm {
class PPCInstPrinter : public MCInstPrinter {
- bool IsDarwin;
+ Triple TT;
+private:
+ bool showRegistersWithPercentPrefix(const char *RegName) const;
+ bool showRegistersWithPrefix() const;
+ const char *getVerboseConditionRegName(unsigned RegNum,
+ unsigned RegEncoding) const;
+
public:
PPCInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
- const MCRegisterInfo &MRI, bool isDarwin)
- : MCInstPrinter(MAI, MII, MRI), IsDarwin(isDarwin) {}
-
- bool isDarwinSyntax() const {
- return IsDarwin;
- }
-
+ const MCRegisterInfo &MRI, Triple T)
+ : MCInstPrinter(MAI, MII, MRI), TT(T) {}
+
void printRegName(raw_ostream &OS, unsigned RegNo) const override;
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot,
const MCSubtargetInfo &STI) override;
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp?rev=319381&r1=319380&r2=319381&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp Wed Nov 29 15:05:56 2017
@@ -239,7 +239,7 @@ static MCInstPrinter *createPPCMCInstPri
const MCAsmInfo &MAI,
const MCInstrInfo &MII,
const MCRegisterInfo &MRI) {
- return new PPCInstPrinter(MAI, MII, MRI, T.isOSDarwin());
+ return new PPCInstPrinter(MAI, MII, MRI, T);
}
extern "C" void LLVMInitializePowerPCTargetMC() {
Modified: llvm/trunk/test/CodeGen/PowerPC/reg-names.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/reg-names.ll?rev=319381&r1=319380&r2=319381&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/reg-names.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/reg-names.ll Wed Nov 29 15:05:56 2017
@@ -1,5 +1,6 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -ppc-asm-full-reg-names < %s | FileCheck -check-prefix=CHECK-FN %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -ppc-reg-with-percent-prefix < %s | FileCheck -check-prefix=CHECK-PN %s
define i64 @test1(i64 %a, i64 %b) {
; CHECK-LABEL: @test1
@@ -10,8 +11,10 @@ entry:
; CHECK: mr 3, 4
; CHECK-FN: mr r3, r4
+; CHECK-PN: mr %r3, %r4
; CHECK: blr
; CHECK-FN: blr
+; CHECK-PN: blr
}
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