[PATCH] D35635: [ARM] Optimize {s,u}{add,sub}.with.overflow

[Joel Galenson via Phabricator via llvm-commits]

jgalenson added inline comments.


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Comment at: lib/Target/ARM/ARMISelLowering.cpp:4542-4543
+    // Reverse the condition code.
+    ARMCC::CondCodes CondCode =
+        (ARMCC::CondCodes)cast<const ConstantSDNode>(ARMcc)->getZExtValue();
+    CondCode = ARMCC::getOppositeCondition(CondCode);
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rogfer01 wrote:
> Apologies if this question looks a bit clueless about all the transformation, but why you need to reverse the condition code here?
No, it's a good question, and I'm a bit confused about this myself.

The getARMXALUOOp function seems to return the condition for whether there is not an overflow.  It doesn't seem to be documented anywhere, but for example, in its SADDO case, it uses the VC flag, which is the "no overflow" case.

Assuming that's right, then since these branches are branching when an overflow occurs, I need to invert the condition.

Does that logic seem right?


https://reviews.llvm.org/D35635