[PATCH] D40420: [CodeGen] Print "%vreg0" as "%0" in both MIR and debug output

Matthias Braun via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 29 11:01:29 PST 2017

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MatzeB accepted this revision.
MatzeB added a comment.

Still LGTM. For the record: Quentin was fine with the compromise proposal in another email thread.


https://reviews.llvm.org/D40420

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