[PATCH] D40554: [PowerPC] Fix bugs in sign-/zero-extension elimination

[Hiroshi Inoue via Phabricator via llvm-commits]

inouehrs marked 3 inline comments as done.
inouehrs added inline comments.


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Comment at: lib/Target/PowerPC/PPCInstrInfo.cpp:2164
 // i.e. 0 to 31-th bits are same as 32-th bit.
-static bool isSignExtendingOp(const MachineInstr &MI) {
-  int Opcode = MI.getOpcode();
+static bool isSignExtendingOp(const unsigned Reg,
+                              const MachineRegisterInfo *MRI) {
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nemanjai wrote:
> Similarly to `isZeroExtendingOp()`, this name no longer makes sense.
I changed the method name. Do you have idea on an alternative name?


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Comment at: lib/Target/PowerPC/PPCMIPeephole.cpp:196
 
+      if (!MI.isPHI())
+        for (auto & Use : MI.uses()) {
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nemanjai wrote:
> This whole section needs to be cleaned up. Lines too long. Code commented-out. Pre-processor conditions. Presumably leftovers from debugging during development.
> 
> Actually, on second look, this injects trap instructions for debugging and should probably just be removed.
Thank you so much for pointing this out. I removed debug code section.


https://reviews.llvm.org/D40554