[llvm] r319223 - [Hexagon] Use stable sort for HexagonShuffler to remove non-deterministic ordering
Mandeep Singh Grang via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 28 12:48:10 PST 2017
Author: mgrang
Date: Tue Nov 28 12:48:10 2017
New Revision: 319223
URL: http://llvm.org/viewvc/llvm-project?rev=319223&view=rev
Log:
[Hexagon] Use stable sort for HexagonShuffler to remove non-deterministic ordering
Summary:
This fixes failures in the following tests uncovered by D39245:
LLVM :: CodeGen/Hexagon/args.ll
LLVM :: CodeGen/Hexagon/constp-extract.ll
LLVM :: CodeGen/Hexagon/expand-condsets-basic.ll
LLVM :: CodeGen/Hexagon/gp-rel.ll
LLVM :: CodeGen/Hexagon/packetize_cond_inst.ll
LLVM :: CodeGen/Hexagon/simple_addend.ll
LLVM :: CodeGen/Hexagon/swp-stages4.ll
LLVM :: CodeGen/Hexagon/swp-vmult.ll
LLVM :: CodeGen/Hexagon/swp-vsum.ll
LLVM :: MC/Hexagon/align.s
LLVM :: MC/Hexagon/asmMap.s
LLVM :: MC/Hexagon/dis-duplex-p0.s
LLVM :: MC/Hexagon/double-vector-producer.s
LLVM :: MC/Hexagon/inst_select.ll
LLVM :: MC/Hexagon/instructions/j.s
Reviewers: colinl, kparzysz, adasgupt, slarin
Reviewed By: kparzysz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40227
Modified:
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp?rev=319223&r1=319222&r2=319223&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp Tue Nov 28 12:48:10 2017
@@ -465,7 +465,7 @@ bool HexagonShuffler::check() {
foundBranches[1]->Core.setUnits(jumpSlots[i].second);
HexagonUnitAuction AuctionCore(reservedSlots);
- std::sort(begin(), end(), HexagonInstr::lessCore);
+ std::stable_sort(begin(), end(), HexagonInstr::lessCore);
// see if things ok with that instruction being pinned to slot "slotJump"
bool bFail = false;
@@ -495,7 +495,7 @@ bool HexagonShuffler::check() {
slot3ISJ->Core.setUnits(saveUnits & slotThree);
HexagonUnitAuction AuctionCore(reservedSlots);
- std::sort(begin(), end(), HexagonInstr::lessCore);
+ std::stable_sort(begin(), end(), HexagonInstr::lessCore);
// see if things ok with that instruction being pinned to slot #3
bool bFail = false;
@@ -519,7 +519,7 @@ bool HexagonShuffler::check() {
if (validateSlots) {
HexagonUnitAuction AuctionCore(reservedSlots);
- std::sort(begin(), end(), HexagonInstr::lessCore);
+ std::stable_sort(begin(), end(), HexagonInstr::lessCore);
for (iterator I = begin(); I != end(); ++I)
if (!AuctionCore.bid(I->Core.getUnits())) {
@@ -528,7 +528,7 @@ bool HexagonShuffler::check() {
}
}
// Verify the CVI slot subscriptions.
- std::sort(begin(), end(), HexagonInstr::lessCVI);
+ std::stable_sort(begin(), end(), HexagonInstr::lessCVI);
// create vector of hvx instructions to check
HVXInstsT hvxInsts;
hvxInsts.clear();
@@ -584,7 +584,7 @@ bool HexagonShuffler::shuffle() {
if (slotWeight)
// Sort the packet, favoring source order,
// beginning after the previous slot.
- std::sort(ISJ, Packet.end());
+ std::stable_sort(ISJ, Packet.end());
else
// Skip unused slot.
++emptySlots;
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