[PATCH] D40417: [CodeGen] Print register names in lowercase in both MIR and debug output

Francis Visoiu Mistrih via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 28 09:16:29 PST 2017 

This revision was automatically updated to reflect the committed changes.
Closed by commit rL319187: [CodeGen] Print register names in lowercase in both MIR and debug output (authored by thegameg).

Changed prior to commit:
  https://reviews.llvm.org/D40417?vs=124147&id=124590#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D40417

Files:
  llvm/trunk/include/llvm/CodeGen/LivePhysRegs.h
  llvm/trunk/include/llvm/CodeGen/MachineOperand.h
  llvm/trunk/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/trunk/lib/CodeGen/AggressiveAntiDepBreaker.cpp
  llvm/trunk/lib/CodeGen/CriticalAntiDepBreaker.cpp
  llvm/trunk/lib/CodeGen/ExpandPostRAPseudos.cpp
  llvm/trunk/lib/CodeGen/ImplicitNullChecks.cpp
  llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
  llvm/trunk/lib/CodeGen/MachineCSE.cpp
  llvm/trunk/lib/CodeGen/MachineCopyPropagation.cpp
  llvm/trunk/lib/CodeGen/MachineSink.cpp
  llvm/trunk/lib/CodeGen/PeepholeOptimizer.cpp
  llvm/trunk/lib/CodeGen/README.txt
  llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
  llvm/trunk/lib/CodeGen/TargetRegisterInfo.cpp
  llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
  llvm/trunk/lib/CodeGen/VirtRegMap.cpp
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/trunk/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  llvm/trunk/lib/Target/AMDGPU/CaymanInstructions.td
  llvm/trunk/lib/Target/AMDGPU/EvergreenInstructions.td
  llvm/trunk/lib/Target/AMDGPU/SIFoldOperands.cpp
  llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/trunk/lib/Target/AMDGPU/SILowerControlFlow.cpp
  llvm/trunk/lib/Target/ARM/ARMFrameLowering.cpp
  llvm/trunk/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonBlockRanges.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonConstPropagation.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonCopyToCombine.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonHardwareLoops.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonNewValueJump.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonPeephole.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonSubtarget.cpp
  llvm/trunk/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
  llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp
  llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCShuffler.cpp
  llvm/trunk/lib/Target/Mips/MipsInstrInfo.cpp
  llvm/trunk/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/trunk/lib/Target/PowerPC/PPCBranchCoalescing.cpp
  llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp
  llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
  llvm/trunk/lib/Target/PowerPC/PPCInstrInfo.cpp
  llvm/trunk/lib/Target/PowerPC/PPCQPXLoadSplat.cpp
  llvm/trunk/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
  llvm/trunk/lib/Target/Sparc/SparcFrameLowering.cpp
  llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
  llvm/trunk/lib/Target/X86/README-SSE.txt
  llvm/trunk/lib/Target/X86/README-X86-64.txt
  llvm/trunk/lib/Target/X86/X86CallingConv.td
  llvm/trunk/lib/Target/X86/X86FastISel.cpp
  llvm/trunk/lib/Target/X86/X86FixupBWInsts.cpp
  llvm/trunk/lib/Target/X86/X86FloatingPoint.cpp
  llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
  llvm/trunk/lib/Target/X86/X86MCInstLower.cpp
  llvm/trunk/test/CodeGen/AArch64/aarch64-a57-fp-load-balancing.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-2012-05-22-LdStOptBug.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-csldst-mmo.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-dead-register-def-bug.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-misched-memdep-bug.ll
  llvm/trunk/test/CodeGen/AArch64/arm64-misched-multimmo.ll
  llvm/trunk/test/CodeGen/AArch64/loh.mir
  llvm/trunk/test/CodeGen/AArch64/machine-copy-prop.ll
  llvm/trunk/test/CodeGen/AArch64/phi-dbg.ll
  llvm/trunk/test/CodeGen/AArch64/scheduledag-constreg.mir
  llvm/trunk/test/CodeGen/AMDGPU/lds-output-queue.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.dbg.value.ll
  llvm/trunk/test/CodeGen/AMDGPU/schedule-regpressure.mir
  llvm/trunk/test/CodeGen/ARM/2014-01-09-pseudo_expand_implicit_reg.ll
  llvm/trunk/test/CodeGen/ARM/Windows/vla-cpsr.ll
  llvm/trunk/test/CodeGen/ARM/debug-info-arg.ll
  llvm/trunk/test/CodeGen/ARM/debug-info-branch-folding.ll
  llvm/trunk/test/CodeGen/ARM/sched-it-debug-nodes.mir
  llvm/trunk/test/CodeGen/BPF/sockex2.ll
  llvm/trunk/test/CodeGen/Mips/llvm-ir/call.ll
  llvm/trunk/test/CodeGen/PowerPC/addegluecrash.ll
  llvm/trunk/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
  llvm/trunk/test/CodeGen/PowerPC/byval-agg-info.ll
  llvm/trunk/test/CodeGen/PowerPC/fp64-to-int16.ll
  llvm/trunk/test/CodeGen/PowerPC/opt-cmp-inst-cr0-live.ll
  llvm/trunk/test/CodeGen/PowerPC/quadint-return.ll
  llvm/trunk/test/CodeGen/SystemZ/int-div-01.ll
  llvm/trunk/test/CodeGen/SystemZ/int-div-02.ll
  llvm/trunk/test/CodeGen/SystemZ/int-div-03.ll
  llvm/trunk/test/CodeGen/SystemZ/int-div-04.ll
  llvm/trunk/test/CodeGen/SystemZ/int-div-05.ll
  llvm/trunk/test/CodeGen/SystemZ/int-div-06.ll
  llvm/trunk/test/CodeGen/SystemZ/int-mul-08.ll
  llvm/trunk/test/CodeGen/SystemZ/int-mul-10.ll
  llvm/trunk/test/CodeGen/SystemZ/pr32505.ll
  llvm/trunk/test/CodeGen/X86/2010-03-05-EFLAGS-Redef.ll
  llvm/trunk/test/CodeGen/X86/2010-04-08-CoalescerBug.ll
  llvm/trunk/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
  llvm/trunk/test/CodeGen/X86/2010-05-28-Crash.ll
  llvm/trunk/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
  llvm/trunk/test/CodeGen/X86/GlobalISel/add-scalar.ll
  llvm/trunk/test/CodeGen/X86/GlobalISel/ext-x86-64.ll
  llvm/trunk/test/CodeGen/X86/GlobalISel/ext.ll
  llvm/trunk/test/CodeGen/X86/GlobalISel/gep.ll
  llvm/trunk/test/CodeGen/X86/add-sub-nsw-nuw.ll
  llvm/trunk/test/CodeGen/X86/add.ll
  llvm/trunk/test/CodeGen/X86/addcarry.ll
  llvm/trunk/test/CodeGen/X86/anyext.ll
  llvm/trunk/test/CodeGen/X86/atomic-eflags-reuse.ll
  llvm/trunk/test/CodeGen/X86/avx-cast.ll
  llvm/trunk/test/CodeGen/X86/avx-cmp.ll
  llvm/trunk/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
  llvm/trunk/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
  llvm/trunk/test/CodeGen/X86/avx-load-store.ll
  llvm/trunk/test/CodeGen/X86/avx-splat.ll
  llvm/trunk/test/CodeGen/X86/avx-vinsertf128.ll
  llvm/trunk/test/CodeGen/X86/avx-vzeroupper.ll
  llvm/trunk/test/CodeGen/X86/avx2-conversions.ll
  llvm/trunk/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
  llvm/trunk/test/CodeGen/X86/avx2-masked-gather.ll
  llvm/trunk/test/CodeGen/X86/avx2-shift.ll
  llvm/trunk/test/CodeGen/X86/avx2-vector-shifts.ll
  llvm/trunk/test/CodeGen/X86/avx512-arith.ll
  llvm/trunk/test/CodeGen/X86/avx512-build-vector.ll
  llvm/trunk/test/CodeGen/X86/avx512-calling-conv.ll
  llvm/trunk/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
  llvm/trunk/test/CodeGen/X86/avx512-cvt.ll
  llvm/trunk/test/CodeGen/X86/avx512-ext.ll
  llvm/trunk/test/CodeGen/X86/avx512-extract-subvector.ll
  llvm/trunk/test/CodeGen/X86/avx512-hadd-hsub.ll
  llvm/trunk/test/CodeGen/X86/avx512-insert-extract.ll
  llvm/trunk/test/CodeGen/X86/avx512-insert-extract_i1.ll
  llvm/trunk/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
  llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll
  llvm/trunk/test/CodeGen/X86/avx512-mask-op.ll
  llvm/trunk/test/CodeGen/X86/avx512-memfold.ll
  llvm/trunk/test/CodeGen/X86/avx512-regcall-Mask.ll
  llvm/trunk/test/CodeGen/X86/avx512-regcall-NoMask.ll
  llvm/trunk/test/CodeGen/X86/avx512-schedule.ll
  llvm/trunk/test/CodeGen/X86/avx512-select.ll
  llvm/trunk/test/CodeGen/X86/avx512-shift.ll
  llvm/trunk/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
  llvm/trunk/test/CodeGen/X86/avx512-trunc.ll
  llvm/trunk/test/CodeGen/X86/avx512-vbroadcast.ll
  llvm/trunk/test/CodeGen/X86/avx512-vec-cmp.ll
  llvm/trunk/test/CodeGen/X86/avx512-vec3-crash.ll
  llvm/trunk/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
  llvm/trunk/test/CodeGen/X86/avx512bw-mov.ll
  llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
  llvm/trunk/test/CodeGen/X86/avx512bwvl-intrinsics.ll
  llvm/trunk/test/CodeGen/X86/avx512bwvl-vec-test-testn.ll
  llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
  llvm/trunk/test/CodeGen/X86/avx512dq-intrinsics.ll
  llvm/trunk/test/CodeGen/X86/avx512dq-mask-op.ll
  llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
  llvm/trunk/test/CodeGen/X86/avx512dqvl-intrinsics.ll
  llvm/trunk/test/CodeGen/X86/avx512f-vec-test-testn.ll
  llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
  llvm/trunk/test/CodeGen/X86/avx512vl-intrinsics.ll
  llvm/trunk/test/CodeGen/X86/avx512vl-vec-cmp.ll
  llvm/trunk/test/CodeGen/X86/avx512vl-vec-masked-cmp.ll
  llvm/trunk/test/CodeGen/X86/avx512vl-vec-test-testn.ll
  llvm/trunk/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
  llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-128.ll
  llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-256.ll
  llvm/trunk/test/CodeGen/X86/bitcast-and-setcc-512.ll
  llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-sext.ll
  llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
  llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
  llvm/trunk/test/CodeGen/X86/bitcast-int-to-vector.ll
  llvm/trunk/test/CodeGen/X86/bitcast-setcc-128.ll
  llvm/trunk/test/CodeGen/X86/bitcast-setcc-256.ll
  llvm/trunk/test/CodeGen/X86/bitcast-setcc-512.ll
  llvm/trunk/test/CodeGen/X86/bitreverse.ll
  llvm/trunk/test/CodeGen/X86/bmi-schedule.ll
  llvm/trunk/test/CodeGen/X86/bmi.ll
  llvm/trunk/test/CodeGen/X86/bool-simplify.ll
  llvm/trunk/test/CodeGen/X86/bool-vector.ll
  llvm/trunk/test/CodeGen/X86/broadcastm-lowering.ll
  llvm/trunk/test/CodeGen/X86/bypass-slow-division-32.ll
  llvm/trunk/test/CodeGen/X86/bypass-slow-division-64.ll
  llvm/trunk/test/CodeGen/X86/clz.ll
  llvm/trunk/test/CodeGen/X86/cmov-into-branch.ll
  llvm/trunk/test/CodeGen/X86/cmov-promotion.ll
  llvm/trunk/test/CodeGen/X86/cmov.ll
  llvm/trunk/test/CodeGen/X86/coalescer-dce.ll
  llvm/trunk/test/CodeGen/X86/combine-abs.ll
  llvm/trunk/test/CodeGen/X86/compress_expand.ll
  llvm/trunk/test/CodeGen/X86/critical-edge-split-2.ll
  llvm/trunk/test/CodeGen/X86/ctpop-combine.ll
  llvm/trunk/test/CodeGen/X86/dagcombine-cse.ll
  llvm/trunk/test/CodeGen/X86/divide-by-constant.ll
  llvm/trunk/test/CodeGen/X86/divrem.ll
  llvm/trunk/test/CodeGen/X86/divrem8_ext.ll
  llvm/trunk/test/CodeGen/X86/eflags-copy-expansion.mir
  llvm/trunk/test/CodeGen/X86/extractelement-index.ll
  llvm/trunk/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll
  llvm/trunk/test/CodeGen/X86/fast-isel-cmp.ll
  llvm/trunk/test/CodeGen/X86/fast-isel-nontemporal.ll
  llvm/trunk/test/CodeGen/X86/fast-isel-sext-zext.ll
  llvm/trunk/test/CodeGen/X86/fast-isel-shift.ll
  llvm/trunk/test/CodeGen/X86/fixup-bw-copy.ll
  llvm/trunk/test/CodeGen/X86/fp_load_cast_fold.ll
  llvm/trunk/test/CodeGen/X86/ghc-cc.ll
  llvm/trunk/test/CodeGen/X86/ghc-cc64.ll
  llvm/trunk/test/CodeGen/X86/gpr-to-mask.ll
  llvm/trunk/test/CodeGen/X86/half.ll
  llvm/trunk/test/CodeGen/X86/handle-move.ll
  llvm/trunk/test/CodeGen/X86/horizontal-reduce-smax.ll
  llvm/trunk/test/CodeGen/X86/horizontal-reduce-smin.ll
  llvm/trunk/test/CodeGen/X86/horizontal-reduce-umax.ll
  llvm/trunk/test/CodeGen/X86/horizontal-reduce-umin.ll
  llvm/trunk/test/CodeGen/X86/iabs.ll
  llvm/trunk/test/CodeGen/X86/illegal-bitfield-loadstore.ll
  llvm/trunk/test/CodeGen/X86/imul.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-avx-v-constraint.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign.ll
  llvm/trunk/test/CodeGen/X86/inline-asm-tied.ll
  llvm/trunk/test/CodeGen/X86/lea-3.ll
  llvm/trunk/test/CodeGen/X86/lea-opt-cse3.ll
  llvm/trunk/test/CodeGen/X86/lea32-schedule.ll
  llvm/trunk/test/CodeGen/X86/loop-search.ll
  llvm/trunk/test/CodeGen/X86/lzcnt-schedule.ll
  llvm/trunk/test/CodeGen/X86/lzcnt-zext-cmp.ll
  llvm/trunk/test/CodeGen/X86/machine-cse.ll
  llvm/trunk/test/CodeGen/X86/machine-outliner-tailcalls.ll
  llvm/trunk/test/CodeGen/X86/masked_gather_scatter.ll
  llvm/trunk/test/CodeGen/X86/masked_memop.ll
  llvm/trunk/test/CodeGen/X86/maskmovdqu.ll
  llvm/trunk/test/CodeGen/X86/misched-copy.ll
  llvm/trunk/test/CodeGen/X86/movmsk.ll
  llvm/trunk/test/CodeGen/X86/mul-constant-i16.ll
  llvm/trunk/test/CodeGen/X86/mul-constant-i32.ll
  llvm/trunk/test/CodeGen/X86/mul-constant-result.ll
  llvm/trunk/test/CodeGen/X86/negate-i1.ll
  llvm/trunk/test/CodeGen/X86/norex-subreg.ll
  llvm/trunk/test/CodeGen/X86/oddshuffles.ll
  llvm/trunk/test/CodeGen/X86/or-lea.ll
  llvm/trunk/test/CodeGen/X86/phys_subreg_coalesce-3.ll
  llvm/trunk/test/CodeGen/X86/pmul.ll
  llvm/trunk/test/CodeGen/X86/popcnt-schedule.ll
  llvm/trunk/test/CodeGen/X86/popcnt.ll
  llvm/trunk/test/CodeGen/X86/pr22970.ll
  llvm/trunk/test/CodeGen/X86/pr26870.ll
  llvm/trunk/test/CodeGen/X86/pr28173.ll
  llvm/trunk/test/CodeGen/X86/pr28560.ll
  llvm/trunk/test/CodeGen/X86/pr29061.ll
  llvm/trunk/test/CodeGen/X86/pr30430.ll
  (108 more files...)

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