[PATCH] D40532: [globalisel][tablegen] Fix PR35375 by sign-extending the table value to match getConstantVRegVal()

[Daniel Sanders via Phabricator via llvm-commits]

dsanders created this revision.
Herald added subscribers: javed.absar, kristof.beyls.

https://reviews.llvm.org/D40532

Files:
  include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
  test/CodeGen/ARM/GlobalISel/pr35375.ll


Index: test/CodeGen/ARM/GlobalISel/pr35375.ll
===================================================================
--- /dev/null
+++ test/CodeGen/ARM/GlobalISel/pr35375.ll
@@ -0,0 +1,12 @@
+; RUN: llc -O0 -mtriple armv7-- -stop-before=expand-isel-pseudos < %s
+; RUN: llc -O0 -mtriple armv7-- -stop-before=expand-isel-pseudos -global-isel < %s
+
+; CHECK: PKHBT
+
+define arm_aapcscc i32 @pkh(i32 %x, i32 %y) {
+  %andx = and i32 %x, 65535
+  %shl = shl i32 %y, 1
+  %andy = and i32 %shl, 4294901760 ; same as -65536
+  %or = or i32 %andx, %andy
+  ret i32 %or
+}
Index: include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
===================================================================
--- include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
+++ include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
@@ -340,6 +340,11 @@
                              << InsnID << "]->getOperand(" << OpIdx
                              << "), Value=" << Value << ")\n");
       assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
+
+      // isOperandImmEqual() will sign-extend to 64-bits, so should we.
+      LLT Ty = MRI.getType(State.MIs[InsnID]->getOperand(OpIdx).getReg());
+      Value = SignExtend64(Value, Ty.getSizeInBits());
+
       if (!isOperandImmEqual(State.MIs[InsnID]->getOperand(OpIdx), Value,
                              MRI)) {
         if (handleReject() == RejectAndGiveUp)


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