[llvm] r319050 - [AMDGPU][MC][DISASSEMBLER][GFX9] Corrected decoding of GLOBAL/SCRATCH opcodes

Dmitry Preobrazhensky via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 27 09:14:35 PST 2017


Author: dpreobra
Date: Mon Nov 27 09:14:35 2017
New Revision: 319050

URL: http://llvm.org/viewvc/llvm-project?rev=319050&view=rev
Log:
[AMDGPU][MC][DISASSEMBLER][GFX9] Corrected decoding of GLOBAL/SCRATCH opcodes

See bug 35433: https://bugs.llvm.org/show_bug.cgi?id=35433

Differential Revision: https://reviews.llvm.org/D40493

Reviewers: artem.tamazov, SamWot, arsenm

Added:
    llvm/trunk/test/MC/Disassembler/AMDGPU/flat_gfx9.txt
Modified:
    llvm/trunk/lib/Target/AMDGPU/FLATInstructions.td
    llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
    llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h

Modified: llvm/trunk/lib/Target/AMDGPU/FLATInstructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/FLATInstructions.td?rev=319050&r1=319049&r2=319050&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/FLATInstructions.td (original)
+++ llvm/trunk/lib/Target/AMDGPU/FLATInstructions.td Mon Nov 27 09:14:35 2017
@@ -305,7 +305,7 @@ multiclass FLAT_Global_Atomic_Pseudo<
   def _SADDR : FLAT_AtomicNoRet_Pseudo <opName,
     (outs),
     (ins VReg_64:$vaddr, data_rc:$vdata, SReg_64:$saddr, offset_s13:$offset, slc:$slc),
-    " $vaddr, $vdata$saddr$offset$slc">,
+    " $vaddr, $vdata, $saddr$offset$slc">,
     AtomicNoRet <opName#"_saddr", 0> {
     let has_saddr = 1;
     let enabled_saddr = 1;
@@ -315,7 +315,7 @@ multiclass FLAT_Global_Atomic_Pseudo<
   def _SADDR_RTN : FLAT_AtomicRet_Pseudo <opName,
     (outs vdst_rc:$vdst),
       (ins VReg_64:$vaddr, data_rc:$vdata, SReg_64:$saddr, offset_s13:$offset, slc:$slc),
-    " $vdst, $vaddr, $vdata$saddr$offset glc$slc">,
+    " $vdst, $vaddr, $vdata, $saddr$offset glc$slc">,
     AtomicNoRet <opName#"_saddr", 1> {
      let has_saddr = 1;
      let enabled_saddr = 1;

Modified: llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp?rev=319050&r1=319049&r2=319050&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp Mon Nov 27 09:14:35 2017
@@ -72,9 +72,9 @@ void AMDGPUInstPrinter::printU16ImmDecOp
   O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff);
 }
 
-void AMDGPUInstPrinter::printS16ImmDecOperand(const MCInst *MI, unsigned OpNo,
+void AMDGPUInstPrinter::printS13ImmDecOperand(const MCInst *MI, unsigned OpNo,
                                               raw_ostream &O) {
-  O << formatDec(static_cast<int16_t>(MI->getOperand(OpNo).getImm()));
+  O << formatDec(SignExtend32<13>(MI->getOperand(OpNo).getImm()));
 }
 
 void AMDGPUInstPrinter::printU32ImmOperand(const MCInst *MI, unsigned OpNo,
@@ -129,7 +129,7 @@ void AMDGPUInstPrinter::printOffsetS13(c
   uint16_t Imm = MI->getOperand(OpNo).getImm();
   if (Imm != 0) {
     O << ((OpNo == 0)? "offset:" : " offset:");
-    printS16ImmDecOperand(MI, OpNo, O);
+    printS13ImmDecOperand(MI, OpNo, O);
   }
 }
 

Modified: llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h?rev=319050&r1=319049&r2=319050&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h (original)
+++ llvm/trunk/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h Mon Nov 27 09:14:35 2017
@@ -42,7 +42,7 @@ private:
   void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
   void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
   void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
-  void printS16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
+  void printS13ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
   void printU32ImmOperand(const MCInst *MI, unsigned OpNo,
                           const MCSubtargetInfo &STI, raw_ostream &O);
   void printNamedBit(const MCInst *MI, unsigned OpNo, raw_ostream &O,

Added: llvm/trunk/test/MC/Disassembler/AMDGPU/flat_gfx9.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/AMDGPU/flat_gfx9.txt?rev=319050&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/AMDGPU/flat_gfx9.txt (added)
+++ llvm/trunk/test/MC/Disassembler/AMDGPU/flat_gfx9.txt Mon Nov 27 09:14:35 2017
@@ -0,0 +1,85 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx901 -disassemble -show-encoding < %s | FileCheck %s
+
+# CHECK: flat_atomic_add v[0:1], v0    ; encoding: [0x00,0x00,0x08,0xdd,0x00,0x00,0x00,0x00]
+0x00,0x00,0x08,0xdd,0x00,0x00,0x00,0x00
+
+# CHECK: flat_atomic_add v[0:1], v0 offset:7    ; encoding: [0x07,0x00,0x08,0xdd,0x00,0x00,0x00,0x00]
+0x07,0x00,0x08,0xdd,0x00,0x00,0x00,0x00
+
+# CHECK: flat_atomic_add v0, v[0:1], v0 offset:4095 glc    ; encoding: [0xff,0x0f,0x09,0xdd,0x00,0x00,0x00,0x00]
+0xff,0x0f,0x09,0xdd,0x00,0x00,0x00,0x00
+
+# CHECK: flat_atomic_add v[0:1], v0 offset:4095 slc    ; encoding: [0xff,0x0f,0x0a,0xdd,0x00,0x00,0x00,0x00]
+0xff,0x0f,0x0a,0xdd,0x00,0x00,0x00,0x00
+
+# CHECK: flat_load_dword v0, v[0:1]    ; encoding: [0x00,0x00,0x50,0xdc,0x00,0x00,0x00,0x00]
+0x00,0x00,0x50,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: flat_load_dword v0, v[0:1] offset:7    ; encoding: [0x07,0x00,0x50,0xdc,0x00,0x00,0x00,0x00]
+0x07,0x00,0x50,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: flat_load_dword v0, v[0:1] offset:4095 glc    ; encoding: [0xff,0x0f,0x51,0xdc,0x00,0x00,0x00,0x00]
+0xff,0x0f,0x51,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: flat_store_byte v[0:1], v0    ; encoding: [0x00,0x00,0x60,0xdc,0x00,0x00,0x00,0x00]
+0x00,0x00,0x60,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: flat_store_byte v[0:1], v0 offset:7    ; encoding: [0x07,0x00,0x60,0xdc,0x00,0x00,0x00,0x00]
+0x07,0x00,0x60,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: flat_store_byte v[0:1], v0 offset:4095 glc    ; encoding: [0xff,0x0f,0x61,0xdc,0x00,0x00,0x00,0x00]
+0xff,0x0f,0x61,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: global_atomic_add v[2:3], v4, s[0:1]    ; encoding: [0x00,0x80,0x08,0xdd,0x02,0x04,0x00,0x00]
+0x00,0x80,0x08,0xdd,0x02,0x04,0x00,0x00
+
+# CHECK: global_atomic_add v[2:3], v4, s[0:1] offset:4095    ; encoding: [0xff,0x8f,0x08,0xdd,0x02,0x04,0x00,0x00]
+0xff,0x8f,0x08,0xdd,0x02,0x04,0x00,0x00
+
+# CHECK: global_atomic_add v[2:3], v4, s[0:1] offset:-4096    ; encoding: [0x00,0x90,0x08,0xdd,0x02,0x04,0x00,0x00]
+0x00,0x90,0x08,0xdd,0x02,0x04,0x00,0x00
+
+# CHECK: global_atomic_add v0, v[2:3], v4, s[0:1] offset:-1 glc    ; encoding: [0xff,0x9f,0x09,0xdd,0x02,0x04,0x00,0x00]
+0xff,0x9f,0x09,0xdd,0x02,0x04,0x00,0x00
+
+# CHECK: global_load_sbyte v0, v[2:3], s[0:1]    ; encoding: [0x00,0x80,0x44,0xdc,0x02,0x00,0x00,0x00]
+0x00,0x80,0x44,0xdc,0x02,0x00,0x00,0x00
+
+# CHECK: global_load_sbyte v0, v[2:3], s[0:1] offset:4095    ; encoding: [0xff,0x8f,0x44,0xdc,0x02,0x00,0x00,0x00]
+0xff,0x8f,0x44,0xdc,0x02,0x00,0x00,0x00
+
+# CHECK: global_load_sbyte v0, v[2:3], s[0:1] offset:-4096    ; encoding: [0x00,0x90,0x44,0xdc,0x02,0x00,0x00,0x00]
+0x00,0x90,0x44,0xdc,0x02,0x00,0x00,0x00
+
+# CHECK: global_store_dwordx2 v[2:3], v[4:5], s[0:1]    ; encoding: [0x00,0x80,0x74,0xdc,0x02,0x04,0x00,0x00]
+0x00,0x80,0x74,0xdc,0x02,0x04,0x00,0x00
+
+# CHECK: global_store_dwordx2 v[2:3], v[4:5], s[0:1] offset:4095    ; encoding: [0xff,0x8f,0x74,0xdc,0x02,0x04,0x00,0x00]
+0xff,0x8f,0x74,0xdc,0x02,0x04,0x00,0x00
+
+# CHECK: global_store_dwordx2 v[2:3], v[4:5], s[0:1] offset:-4096    ; encoding: [0x00,0x90,0x74,0xdc,0x02,0x04,0x00,0x00]
+0x00,0x90,0x74,0xdc,0x02,0x04,0x00,0x00
+
+# CHECK: scratch_load_dword v0, v0, off offset:-1    ; encoding: [0xff,0x5f,0x50,0xdc,0x00,0x00,0x7f,0x00]
+0xff,0x5f,0x50,0xdc,0x00,0x00,0x7f,0x00
+
+# CHECK: scratch_load_dword v0, off, s0    ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x00,0x00]
+0x00,0x40,0x50,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: scratch_load_dword v0, off, s0 offset:4095    ; encoding: [0xff,0x4f,0x50,0xdc,0x00,0x00,0x00,0x00]
+0xff,0x4f,0x50,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: scratch_load_dword v0, off, s0 offset:-4096    ; encoding: [0x00,0x50,0x50,0xdc,0x00,0x00,0x00,0x00]
+0x00,0x50,0x50,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: scratch_store_short v0, v0, off offset:-1    ; encoding: [0xff,0x5f,0x68,0xdc,0x00,0x00,0x7f,0x00]
+0xff,0x5f,0x68,0xdc,0x00,0x00,0x7f,0x00
+
+# CHECK: scratch_store_short off, v0, s0    ; encoding: [0x00,0x40,0x68,0xdc,0x00,0x00,0x00,0x00]
+0x00,0x40,0x68,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: scratch_store_short off, v0, s0 offset:4095    ; encoding: [0xff,0x4f,0x68,0xdc,0x00,0x00,0x00,0x00]
+0xff,0x4f,0x68,0xdc,0x00,0x00,0x00,0x00
+
+# CHECK: scratch_store_short off, v0, s0 offset:-4096    ; encoding: [0x00,0x50,0x68,0xdc,0x00,0x00,0x00,0x00]
+0x00,0x50,0x68,0xdc,0x00,0x00,0x00,0x00




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