[PATCH] D40001: [RISCV] MC layer support for the load/store instructions of standard compress instruction set
Shiva Chen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 26 22:03:04 PST 2017
shiva0217 updated this revision to Diff 124324.
shiva0217 edited the summary of this revision.
Repository:
rL LLVM
https://reviews.llvm.org/D40001
Files:
lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
lib/Target/RISCV/RISCV.td
lib/Target/RISCV/RISCVInstrFormats.td
lib/Target/RISCV/RISCVInstrFormatsC.td
lib/Target/RISCV/RISCVInstrInfo.td
lib/Target/RISCV/RISCVInstrInfoC.td
lib/Target/RISCV/RISCVRegisterInfo.td
lib/Target/RISCV/RISCVSubtarget.h
test/MC/RISCV/rv32c-invalid.s
test/MC/RISCV/rv32c-valid.s
test/MC/RISCV/rv64c-invalid.s
test/MC/RISCV/rv64c-valid.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D40001.124324.patch
Type: text/x-patch
Size: 25132 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20171127/04116089/attachment.bin>
More information about the llvm-commits
mailing list