[PATCH] D40373: [x86][icelake]GFNI

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 24 11:04:09 PST 2017


craig.topper added inline comments.


================
Comment at: include/llvm/IR/IntrinsicsX86.td:1347
+  // AVX512
+  def int_x86_avx512_mask_vgf2p8affineinvqb_128 :
+         GCCBuiltin<"__builtin_ia32_vgf2p8affineinvqb_v16qi_mask">,
----------------
Can we use __builtin_ia32_selectb_512 and  __builtin_ia32_vgf2p8affineinvqb_v16qi to implement these in the clang header instead of adding a separate masked intrinsic?

Its different than gcc, but consistent with other intrinsics in clang/llvm.

You should add __builtin_ia32_vgf2p8affineinvqb_v64qi without masking so that it can be consistent.


================
Comment at: include/llvm/IR/IntrinsicsX86.td:1407
+
+  def int_x86_gf2p8affineqb     :
+          GCCBuiltin<"__builtin_ia32_vgf2p8affineqb_v16qi">,
----------------
I'd prefer to see this named int_x86_gf2p8affineqb_128 and the 256-bit one named int_x86_gf2p8affineqb_256.


================
Comment at: include/llvm/IR/IntrinsicsX86.td:1423
+           [IntrNoMem]>;
+  def int_x86_vgf2p8mulb        :
+          GCCBuiltin<"__builtin_ia32_vgf2p8mulb_v32qi">,
----------------
Name this _256 and the one above _128.


================
Comment at: lib/Target/X86/X86.td:173
+def FeatureGFNI    : SubtargetFeature<"gfni", "HasGFNI", "true",
+                         "Enable Galios Field Arithmetic Instructions",
+                               [FeatureSSE2]>;
----------------
Isn't it Galois not Galios


================
Comment at: lib/Target/X86/X86ISelLowering.h:582
 
+      // Galios Field Arithmetic Instructions
+      GF2P8AFFINEINVQB, GF2P8AFFINEQB, GF2P8MULB,
----------------
Galois


================
Comment at: lib/Target/X86/X86InstrFragmentsSIMD.td:659
 
+// galios field arithmetic
+def X86GF2P8affineinvqb : SDNode<"X86ISD::GF2P8AFFINEINVQB", SDTBlend>;
----------------
galois


================
Comment at: lib/Target/X86/X86InstrSSE.td:8523
+                                      VR128, loadv2i64, i128mem, 1>;
+  let Predicates  = [HasGFNI, HasAVX, NoVLX] in {
+    defm V##NAME    : GF2P8AFFINE_rmi<Op, "v"##OpStr,
----------------
NoVLX should be NoVLX_Or_NoBWI


Repository:
  rL LLVM

https://reviews.llvm.org/D40373





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